usb.c

iar 安装使用的方法。其中包括一些工程模板

    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);

    //
    // Get the transmit interrupt status.
    //
    ulStatus = (HWREGH(ulBase + USB_O_TXIS));

    //
    // Get the receive interrupt status, these bits go into the second byte of
    // the returned value.
    //
    ulStatus |= (HWREGH(ulBase + USB_O_RXIS) << USB_INT_RX_SHIFT);

    //
    // Get the general interrupt status, these bits go into the upper 8 bits
    // of the returned value.
    //
    ulStatus |= (HWREGB(ulBase + USB_O_IS) << USB_INT_STATUS_SHIFT);

    //
    // Return the combined interrupt status.
    //
    return(ulStatus);
}

//*****************************************************************************
//
//! Disables the sources for USB interrupts.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulFlags specifies which interrupts to disable.
//!
//! This function will disable the USB controller from generating the
//! interrupts indicated by the \e ulFlags parameter.  There are three groups
//! of interrupt sources, IN Endpoints, OUT Endpoints, and general status
//! changes, specified by \b USB_INT_HOST_IN, \b USB_INT_HOST_OUT,
//! \b USB_INT_DEV_IN, \b USB_INT_DEV_OUT, and \b USB_INT_STATUS.  If
//! \b USB_INT_ALL is specified then all interrupts will be disabled.
//!
//! \return None.
//
//*****************************************************************************
void
USBIntDisable(unsigned long ulBase, unsigned long ulFlags)
{
    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);
    ASSERT((ulFlags & ~(USB_INT_ALL)) == 0);

    //
    // If any transmit interrupts were disabled then write the transmit
    // interrupt settings out to the hardware.
    //
    if(ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0))
    {
        HWREGH(ulBase + USB_O_TXIE) &=
            ~(ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN | USB_INT_EP0));
    }

    //
    // If any receive interrupts were disabled then write the receive interrupt
    // settings out to the hardware.
    //
    if(ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT))
    {
        HWREGH(ulBase + USB_O_RXIE) &=
            ~((ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT)) >>
              USB_INT_RX_SHIFT);
    }

    //
    // If any general interrupts were disabled then write the general interrupt
    // settings out to the hardware.
    //
    if(ulFlags & USB_INT_STATUS)
    {
        HWREGB(ulBase + USB_O_IE) &=
            ~((ulFlags & USB_INT_STATUS) >> USB_INT_STATUS_SHIFT);
    }
}

//*****************************************************************************
//
//! Enables the sources for USB interrupts.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulFlags specifies which interrupts to enable.
//!
//! This function will enable the USB controller's ability to generate the
//! interrupts indicated by the \e ulFlags parameter.  There are three
//! groups of interrupt sources, IN Endpoints, OUT Endpoints, and
//! general status changes, specified by \b USB_INT_HOST_IN,
//! \b USB_INT_HOST_OUT, \b USB_INT_DEV_IN, \b USB_INT_DEV_OUT, and
//! \b USB_STATUS.  If \b USB_INT_ALL is specified then all interrupts will be
//! enabled.
//!
//! \note A call must be made to enable the interrupt in the main interrupt
//! controller to receive interrupts.  The USBIntRegister() API performs this
//! controller level interrupt enable.  However if static interrupt handlers
//! are used then then a call to IntEnable() must be made in order to allow any
//! USB interrupts to occur.
//!
//! \return None.
//
//*****************************************************************************
void
USBIntEnable(unsigned long ulBase, unsigned long ulFlags)
{
    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);
    ASSERT((ulFlags & (~USB_INT_ALL)) == 0);

    //
    // If any transmit interrupts were enabled then write the transmit
    // interrupt settings out to the hardware.
    //
    if(ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN))
    {
        HWREGH(ulBase + USB_O_TXIE) |=
            ulFlags & (USB_INT_HOST_OUT | USB_INT_DEV_IN);
    }

    //
    // If any receive interrupts were enabled then write the receive interrupt
    // settings out to the hardware.
    //
    if(ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT))
    {
        HWREGH(ulBase + USB_O_RXIE) |=
            ((ulFlags & (USB_INT_HOST_IN | USB_INT_DEV_OUT)) >>
             USB_INT_RX_SHIFT);
    }

    //
    // If any general interrupts were enabled then write the general interrupt
    // settings out to the hardware.
    //
    if(ulFlags & USB_INT_STATUS)
    {
        HWREGB(ulBase + USB_O_IE) |=
            (ulFlags & USB_INT_STATUS) >> USB_INT_STATUS_SHIFT;
    }
}

//*****************************************************************************
//
//! Registers an interrupt handler for the USB controller.
//!
//! \param ulBase specifies the USB module base address.
//! \param pfnHandler is a pointer to the function to be called when a USB
//! interrupt occurs.
//!
//! This sets the handler to be called when a USB interrupt occurs.  This will
//! also enable the global USB interrupt in the interrupt controller.  The
//! specific desired USB interrupts must be enabled via a separate call to
//! USBIntEnable().  It is the interrupt handler's responsibility to clear the
//! interrupt sources via a call to USBIntStatus().
//!
//! \sa IntRegister() for important information about registering interrupt
//! handlers.
//!
//! \return None.
//
//*****************************************************************************
void
USBIntRegister(unsigned long ulBase, void(*pfnHandler)(void))
{
    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);

    //
    // Register the interrupt handler.
    //
    IntRegister(INT_USB0, pfnHandler);

    //
    // Enable the USB interrupt.
    //
    IntEnable(INT_USB0);
}

//*****************************************************************************
//
//! Unregisters an interrupt handler for the USB controller.
//!
//! \param ulBase specifies the USB module base address.
//!
//! This function unregister the interrupt handler.  This function will also
//! disable the USB interrupt in the interrupt controller.
//!
//! \sa IntRegister() for important information about registering or
//! unregistering interrupt handlers.
//!
//! \return None.
//
//*****************************************************************************
void
USBIntUnregister(unsigned long ulBase)
{
    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);

    //
    // Unregister the interrupt handler.
    //
    IntUnregister(INT_USB0);

    //
    // Disable the CAN interrupt.
    //
    IntDisable(INT_USB0);
}

//*****************************************************************************
//
//! Returns the current status of an endpoint.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulEndpoint is the endpoint to access.
//!
//! This function will return the status of a given endpoint.  If any of these
//! status bits need to be cleared, then these these values must be cleared by
//! calling the USBDevEndpointStatusClear() or USBHostEndpointStatusClear()
//! functions.
//!
//! The following are the status flags for host mode:
//!
//! - \b USB_HOST_IN_PID_ERROR - PID error on the given endpoint.
//! - \b USB_HOST_IN_NOT_COMP - The device failed to respond to an IN request.
//! - \b USB_HOST_IN_STALL - A stall was received on an IN endpoint.
//! - \b USB_HOST_IN_DATA_ERROR - There was a CRC or bit-stuff error on an IN
//!   endpoint in Isochronous mode.
//! - \b USB_HOST_IN_NAK_TO - NAKs received on this IN endpoint for more than
//!   the specified timeout period.
//! - \b USB_HOST_IN_ERROR - Failed to communicate with a device using this IN
//!   endpoint.
//! - \b USB_HOST_IN_FIFO_FULL - This IN endpoint's FIFO is full.
//! - \b USB_HOST_IN_PKTRDY - Data packet ready on this IN endpoint.
//! - \b USB_HOST_OUT_NAK_TO - NAKs received on this OUT endpoint for more than
//!   the specified timeout period.
//! - \b USB_HOST_OUT_NOT_COMP - The device failed to respond to an OUT
//!   request.
//! - \b USB_HOST_OUT_STALL - A stall was received on this OUT endpoint.
//! - \b USB_HOST_OUT_ERROR - Failed to communicate with a device using this
//!   OUT endpoint.
//! - \b USB_HOST_OUT_FIFO_NE - This endpoint's OUT FIFO is not empty.
//! - \b USB_HOST_OUT_PKTPEND - The data transfer on this OUT endpoint has not
//!   completed.
//! - \b USB_HOST_EP0_NAK_TO - NAKs received on endpoint zero for more than the
//!   specified timeout period.
//! - \b USB_HOST_EP0_ERROR - The device failed to respond to a request on
//!   endpoint zero.
//! - \b USB_HOST_EP0_IN_STALL - A stall was received on endpoint zero for an
//!   IN transaction.
//! - \b USB_HOST_EP0_IN_PKTRDY - Data packet ready on endpoint zero for an IN
//!   transaction.
//!
//! The following are the status flags for device mode:
//!
//! - \b USB_DEV_OUT_SENT_STALL - A stall was sent on this OUT endpoint.
//! - \b USB_DEV_OUT_DATA_ERROR - There was a CRC or bit-stuff error on an OUT
//!   endpoint.
//! - \b USB_DEV_OUT_OVERRUN - An OUT packet was not loaded due to a full FIFO.
//! - \b USB_DEV_OUT_FIFO_FULL - The OUT endpoint's FIFO is full.
//! - \b USB_DEV_OUT_PKTRDY - There is a data packet ready in the OUT
//!   endpoint's FIFO.
//! - \b USB_DEV_IN_NOT_COMP - A larger packet was split up, more data to come.
//! - \b USB_DEV_IN_SENT_STALL - A stall was sent on this IN endpoint.
//! - \b USB_DEV_IN_UNDERRUN - Data was requested on the IN endpoint and no
//!   data was ready.
//! - \b USB_DEV_IN_FIFO_NE - The IN endpoint's FIFO is not empty.
//! - \b USB_DEV_IN_PKTPEND - The data transfer on this IN endpoint has not
//!   completed.
//! - \b USB_DEV_EP0_SETUP_END - A control transaction ended before Data End
//!   condition was sent.
//! - \b USB_DEV_EP0_SENT_STALL - A stall was sent on endpoint zero.
//! - \b USB_DEV_EP0_IN_PKTPEND - The data transfer on endpoint zero has not
//!   completed.
//! - \b USB_DEV_EP0_OUT_PKTRDY - There is a data packet ready in endpoint
//!   zero's OUT FIFO.
//!
//! \return The current status flags for the endpoint depending on mode.
//
//*****************************************************************************
unsigned long
USBEndpointStatus(unsigned long ulBase, unsigned long ulEndpoint)
{
    unsigned long ulStatus;

    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);
    ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
           (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3));

    //
    // Get the TX portion of the endpoint status.
    //
    ulStatus = HWREGH(ulBase + EP_OFFSET(ulEndpoint) + USB_O_TXCSRL1);

    //
    // Get the RX portion of the endpoint status.
    //
    ulStatus |= ((HWREGH(ulBase + EP_OFFSET(ulEndpoint) + USB_O_RXCSRL1)) <<
                 USB_RX_EPSTATUS_SHIFT);

    //
    // Return the endpoint status.
    //
    return(ulStatus);
}

//*****************************************************************************
//
//! Clears the status bits in this endpoint in host mode.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulEndpoint is the endpoint to access.
//! \param ulFlags are the status bits that will be cleared.
//!
//! This function will clear the status of any bits that are passed in the
//! \e ulFlags parameter.  The \e ulFlags parameter can take the value returned
//! from the USBEndpointStatus() call.
//!
//! \note This function should only be called in host mode.
//!
//! \return None.
//
//*****************************************************************************
void
USBHostEndpointStatusClear(unsigned long ulBase, unsigned long ulEndpoint,
                           unsigned long ulFlags)
{
    //
    // Check the arguments.
    //
    ASSERT(ulBase == USB0_BASE);
    ASSERT((ulEndpoint == USB_EP_0) || (ulEndpoint == USB_EP_1) ||
           (ulEndpoint == USB_EP_2) || (ulEndpoint == USB_EP_3));

    //
    // Clear the specified flags for the endpoint.
    //
    if(ulEndpoint == USB_EP_0)
    {
        HWREGB(ulBase + USB_O_CSRL0) &= ~ulFlags;
    }
    else
    {
        HWREGB(ulBase + USB_O_TXCSRL1 + EP_OFFSET(ulEndpoint)) &= ~ulFlags;
        HWREGB(ulBase + USB_O_RXCSRL1 + EP_OFFSET(ulEndpoint)) &=
            ~(ulFlags >> USB_RX_EPSTATUS_SHIFT);
    }
}

//*****************************************************************************
//
//! Clears the status bits in this endpoint in device mode.
//!
//! \param ulBase specifies the USB module base address.
//! \param ulEndpoint is the endpoint to access.
//! \param ulFlags are the status bits that will be cleared.
//!
//! This function will clear the status of any bits that are passed in the
//! \e ulFlags parameter.  The \e ulFlags parameter can take the value returned
//! from the USBEndpointStatus() call.
//!
//! \note This function should only be called in device mode.
//!
//! \return None.
//
//*****************************************************************************
void
USBDevEndpointStatusClear(unsigned long ulBase, unsigned long ulEndpoint,
                          unsigned long ulFlags)
{