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📄 hw_pwm.h

📁 iar 安装使用的方法。其中包括一些工程模板
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//*****************************************************************************
//
// hw_pwm.h - Defines and Macros for Pulse Width Modulation (PWM) ports
//
// Copyright (c) 2005-2008 Luminary Micro, Inc.  All rights reserved.
// 
// Software License Agreement
// 
// Luminary Micro, Inc. (LMI) is supplying this software for use solely and
// exclusively on LMI's microcontroller products.
// 
// The software is owned by LMI and/or its suppliers, and is protected under
// applicable copyright laws.  All rights are reserved.  You may not combine
// this software with "viral" open-source software in order to form a larger
// program.  Any use in violation of the foregoing restrictions may subject
// the user to criminal sanctions under applicable laws, as well as to civil
// liability for the breach of the terms and conditions of this license.
// 
// THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
// OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
// LMI SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
// CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
// 
// This is part of revision 2752 of the Stellaris Peripheral Driver Library.
//
//*****************************************************************************

#ifndef __HW_PWM_H__
#define __HW_PWM_H__

//*****************************************************************************
//
// The following are defines for the PWM Module Register offsets.
//
//*****************************************************************************
#define PWM_O_CTL               0x00000000  // PWM Master Control register
#define PWM_O_SYNC              0x00000004  // PWM Time Base Sync register
#define PWM_O_ENABLE            0x00000008  // PWM Output Enable register
#define PWM_O_INVERT            0x0000000C  // PWM Output Inversion register
#define PWM_O_FAULT             0x00000010  // PWM Output Fault register
#define PWM_O_INTEN             0x00000014  // PWM Interrupt Enable register
#define PWM_O_RIS               0x00000018  // PWM Interrupt Raw Status reg.
#define PWM_O_ISC               0x0000001C  // PWM Interrupt Status register
#define PWM_O_STATUS            0x00000020  // PWM Status register
#define PWM_O_FAULTVAL          0x00000024  // PWM Fault Condition Value
#define PWM_O_0_CTL             0x00000040  // PWM0 Control
#define PWM_O_0_INTEN           0x00000044  // PWM0 Interrupt and Trigger
                                            // Enable
#define PWM_O_0_RIS             0x00000048  // PWM0 Raw Interrupt Status
#define PWM_O_0_ISC             0x0000004C  // PWM0 Interrupt Status and Clear
#define PWM_O_0_LOAD            0x00000050  // PWM0 Load
#define PWM_O_0_COUNT           0x00000054  // PWM0 Counter
#define PWM_O_0_CMPA            0x00000058  // PWM0 Compare A
#define PWM_O_0_CMPB            0x0000005C  // PWM0 Compare B
#define PWM_O_0_GENA            0x00000060  // PWM0 Generator A Control
#define PWM_O_0_GENB            0x00000064  // PWM0 Generator B Control
#define PWM_O_0_DBCTL           0x00000068  // PWM0 Dead-Band Control
#define PWM_O_0_DBRISE          0x0000006C  // PWM0 Dead-Band Rising-Edge Delay
#define PWM_O_0_DBFALL          0x00000070  // PWM0 Dead-Band
                                            // Falling-Edge-Delay
#define PWM_O_0_FLTSRC0         0x00000074  // PWM0 Fault Source 0
#define PWM_O_0_MINFLTPER       0x0000007C  // PWM0 Minimum Fault Period
#define PWM_O_1_CTL             0x00000080  // PWM1 Control
#define PWM_O_1_INTEN           0x00000084  // PWM1 Interrupt Enable
#define PWM_O_1_RIS             0x00000088  // PWM1 Raw Interrupt Status
#define PWM_O_1_ISC             0x0000008C  // PWM1 Interrupt Status and Clear
#define PWM_O_1_LOAD            0x00000090  // PWM1 Load
#define PWM_O_1_COUNT           0x00000094  // PWM1 Counter
#define PWM_O_1_CMPA            0x00000098  // PWM1 Compare A
#define PWM_O_1_CMPB            0x0000009C  // PWM1 Compare B
#define PWM_O_1_GENA            0x000000A0  // PWM1 Generator A Control
#define PWM_O_1_GENB            0x000000A4  // PWM1 Generator B Control
#define PWM_O_1_DBCTL           0x000000A8  // PWM1 Dead-Band Control
#define PWM_O_1_DBRISE          0x000000AC  // PWM1 Dead-Band Rising-Edge Delay
#define PWM_O_1_DBFALL          0x000000B0  // PWM1 Dead-Band
                                            // Falling-Edge-Delay
#define PWM_O_1_FLTSRC0         0x000000B4  // PWM1 Fault Source 0
#define PWM_O_1_MINFLTPER       0x000000BC  // PWM1 Minimum Fault Period
#define PWM_O_2_CTL             0x000000C0  // PWM2 Control
#define PWM_O_2_INTEN           0x000000C4  // PWM2 InterruptEnable
#define PWM_O_2_RIS             0x000000C8  // PWM2 Raw Interrupt Status
#define PWM_O_2_ISC             0x000000CC  // PWM2 Interrupt Status and Clear
#define PWM_O_2_LOAD            0x000000D0  // PWM2 Load
#define PWM_O_2_COUNT           0x000000D4  // PWM2 Counter
#define PWM_O_2_CMPA            0x000000D8  // PWM2 Compare A
#define PWM_O_2_CMPB            0x000000DC  // PWM2 Compare B
#define PWM_O_2_GENA            0x000000E0  // PWM2 Generator A Control
#define PWM_O_2_GENB            0x000000E4  // PWM2 Generator B Control
#define PWM_O_2_DBCTL           0x000000E8  // PWM2 Dead-Band Control
#define PWM_O_2_DBRISE          0x000000EC  // PWM2 Dead-Band Rising-Edge Delay
#define PWM_O_2_DBFALL          0x000000F0  // PWM2 Dead-Band
                                            // Falling-Edge-Delay
#define PWM_O_2_FLTSRC0         0x000000F4  // PWM2 Fault Source 0
#define PWM_O_2_MINFLTPER       0x000000FC  // PWM2 Minimum Fault Period
#define PWM_O_3_CTL             0x00000100  // PWM3 Control
#define PWM_O_3_INTEN           0x00000104  // PWM3 Interrupt and Trigger
                                            // Enable
#define PWM_O_3_RIS             0x00000108  // PWM3 Raw Interrupt Status
#define PWM_O_3_ISC             0x0000010C  // PWM3 Interrupt Status and Clear
#define PWM_O_3_LOAD            0x00000110  // PWM3 Load
#define PWM_O_3_COUNT           0x00000114  // PWM3 Counter
#define PWM_O_3_CMPA            0x00000118  // PWM3 Compare A
#define PWM_O_3_CMPB            0x0000011C  // PWM3 Compare B
#define PWM_O_3_GENA            0x00000120  // PWM3 Generator A Control
#define PWM_O_3_GENB            0x00000124  // PWM3 Generator B Control
#define PWM_O_3_DBCTL           0x00000128  // PWM3 Dead-Band Control
#define PWM_O_3_DBRISE          0x0000012C  // PWM3 Dead-Band Rising-Edge Delay
#define PWM_O_3_DBFALL          0x00000130  // PWM3 Dead-Band
                                            // Falling-Edge-Delay
#define PWM_O_3_FLTSRC0         0x00000134  // PWM3 Fault Source 0
#define PWM_O_3_MINFLTPER       0x0000013C  // PWM3 Minimum Fault Period
#define PWM_O_0_FLTSEN          0x00000800  // PWM0 Fault Pin Logic Sense
#define PWM_O_0_FLTSTAT0        0x00000804  // PWM0 Fault Status 0
#define PWM_O_1_FLTSEN          0x00000880  // PWM1 Fault Pin Logic Sense
#define PWM_O_1_FLTSTAT0        0x00000884  // PWM1 Fault Status 0
#define PWM_O_2_FLTSEN          0x00000900  // PWM2 Fault Pin Logic Sense
#define PWM_O_2_FLTSTAT0        0x00000904  // PWM2 Fault Status 0
#define PWM_O_3_FLTSEN          0x00000980  // PWM3 Fault Pin Logic Sense
#define PWM_O_3_FLTSTAT0        0x00000984  // PWM3 Fault Status 0

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM Master Control
// register.
//
//*****************************************************************************
#define PWM_CTL_GLOBALSYNC3     0x00000008  // Update PWM Generator 3.
#define PWM_CTL_GLOBALSYNC2     0x00000004  // Update PWM Generator 2.
#define PWM_CTL_GLOBALSYNC1     0x00000002  // Update PWM Generator 1.
#define PWM_CTL_GLOBALSYNC0     0x00000001  // Update PWM Generator 0.

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM Time Base Sync
// register.
//
//*****************************************************************************
#define PWM_SYNC_SYNC3          0x00000008  // Reset generator 3 counter
#define PWM_SYNC_SYNC2          0x00000004  // Reset generator 2 counter
#define PWM_SYNC_SYNC1          0x00000002  // Reset generator 1 counter
#define PWM_SYNC_SYNC0          0x00000001  // Reset generator 0 counter

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM Output Enable
// register.
//
//*****************************************************************************
#define PWM_ENABLE_PWM7EN       0x00000080  // PWM7 pin enable
#define PWM_ENABLE_PWM6EN       0x00000040  // PWM6 pin enable
#define PWM_ENABLE_PWM5EN       0x00000020  // PWM5 pin enable
#define PWM_ENABLE_PWM4EN       0x00000010  // PWM4 pin enable
#define PWM_ENABLE_PWM3EN       0x00000008  // PWM3 pin enable
#define PWM_ENABLE_PWM2EN       0x00000004  // PWM2 pin enable
#define PWM_ENABLE_PWM1EN       0x00000002  // PWM1 pin enable
#define PWM_ENABLE_PWM0EN       0x00000001  // PWM0 pin enable

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM Inversion register.
//
//*****************************************************************************
#define PWM_INVERT_PWM7INV      0x00000080  // PWM7 pin invert
#define PWM_INVERT_PWM6INV      0x00000040  // PWM6 pin invert
#define PWM_INVERT_PWM5INV      0x00000020  // PWM5 pin invert
#define PWM_INVERT_PWM4INV      0x00000010  // PWM4 pin invert
#define PWM_INVERT_PWM3INV      0x00000008  // PWM3 pin invert
#define PWM_INVERT_PWM2INV      0x00000004  // PWM2 pin invert
#define PWM_INVERT_PWM1INV      0x00000002  // PWM1 pin invert
#define PWM_INVERT_PWM0INV      0x00000001  // PWM0 pin invert

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM Fault register.
//
//*****************************************************************************
#define PWM_FAULT_FAULT7        0x00000080  // PWM7 pin fault
#define PWM_FAULT_FAULT6        0x00000040  // PWM6 pin fault
#define PWM_FAULT_FAULT5        0x00000020  // PWM5 pin fault
#define PWM_FAULT_FAULT4        0x00000010  // PWM4 pin fault
#define PWM_FAULT_FAULT3        0x00000008  // PWM3 pin fault
#define PWM_FAULT_FAULT2        0x00000004  // PWM2 pin fault
#define PWM_FAULT_FAULT1        0x00000002  // PWM1 pin fault
#define PWM_FAULT_FAULT0        0x00000001  // PWM0 pin fault

//*****************************************************************************
//
// The following are defines for the bit fields in the PWM Status register.
//
//*****************************************************************************
#define PWM_STATUS_FAULT3       0x00000008  // Fault3 Interrupt Status.
#define PWM_STATUS_FAULT2       0x00000004  // Fault2 Interrupt Status.
#define PWM_STATUS_FAULT1       0x00000002  // Fault1 Interrupt Status.
#define PWM_STATUS_FAULT0       0x00000001  // Fault0 Interrupt Status.

//*****************************************************************************
//
// The following are defines for the PWM Generator standard offsets.
//
//*****************************************************************************
#define PWM_O_X_CTL             0x00000000  // Gen Control Reg
#define PWM_O_X_INTEN           0x00000004  // Gen Int/Trig Enable Reg
#define PWM_O_X_RIS             0x00000008  // Gen Raw Int Status Reg
#define PWM_O_X_ISC             0x0000000C  // Gen Int Status Reg
#define PWM_O_X_LOAD            0x00000010  // Gen Load Reg
#define PWM_O_X_COUNT           0x00000014  // Gen Counter Reg
#define PWM_O_X_CMPA            0x00000018  // Gen Compare A Reg
#define PWM_O_X_CMPB            0x0000001C  // Gen Compare B Reg
#define PWM_O_X_GENA            0x00000020  // Gen Generator A Ctrl Reg
#define PWM_O_X_GENB            0x00000024  // Gen Generator B Ctrl Reg
#define PWM_O_X_DBCTL           0x00000028  // Gen Dead Band Ctrl Reg
#define PWM_O_X_DBRISE          0x0000002C  // Gen DB Rising Edge Delay Reg
#define PWM_O_X_DBFALL          0x00000030  // Gen DB Falling Edge Delay Reg
#define PWM_O_X_FLTSRC0         0x00000034  // Fault pin, comparator condition
#define PWM_O_X_MINFLTPER       0x0000003C  // Fault minimum period extension
#define PWM_GEN_0_OFFSET        0x00000040  // PWM0 base
#define PWM_GEN_1_OFFSET        0x00000080  // PWM1 base
#define PWM_GEN_2_OFFSET        0x000000C0  // PWM2 base
#define PWM_GEN_3_OFFSET        0x00000100  // PWM3 base

//*****************************************************************************
//
// The following are defines for the PWM_X Control Register bit definitions.
//
//*****************************************************************************

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