f2407.h

2407的例子代码

//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
//Filename: f2407.      |
//     |
//Last Modified: 12/07/05|
//     |
//Description: LF2407 DSP register definitions      |
//~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
#ifndef _F2407__H_
#define _F2407__H_
#include "ioports.h"

//Core registers
#define    IMR       (unsigned int*) 0x0004   //Interrupt mask reg
#define    GREG      (unsigned int*) 0x0005   //Global memory allocation reg
#define    IFR       (unsigned int*) 0x0006   //Interrupt flag reg

//System configuration and interrupt registers
#define    PIRQR0    (unsigned int*) 0x7010   //Peripheral interrupt request reg 0
#define    PIRQR1    (unsigned int*) 0x7011   //Peripheral interrupt request reg 1
#define    PIRQR2    (unsigned int*) 0x7012   //Peripheral interrupt request reg 2 
#define    PIACKR0   (unsigned int*) 0x7014   //Peripheral interrupt acknowledge reg 0
#define    PIACKR1   (unsigned int*) 0x7015   //Peripheral interrupt acknowledge reg 1
#define    PIACKR2   (unsigned int*) 0x7016   //Peripheral interrupt acknowledge reg 2
#define    SCSR1     (unsigned int*) 0x7018   //System control & status reg 1
#define    SCSR2     (unsigned int*) 0x7019   //System control & status reg 2
#define    DINR      (unsigned int*) 0x701C   //Device identification reg
#define    PIVR      (unsigned int*) 0x701E   //Peripheral interrupt vector reg

//Watchdog timer (WD) registers
#define    WDCNTR    (unsigned int*) 0x7023   //WD counter reg
#define    WDKEY     (unsigned int*) 0x7025   //WD reset key reg
#define    WDCR      (unsigned int*) 0x7029   //WD timer control reg
//Serial Peripheral Interface (SPI) registers
#define    SPICCR    (unsigned int*) 0x7040   //SPI configuration control reg
#define    SPICTL    (unsigned int*) 0x7041   //SPI operation control reg
#define    SPISTS    (unsigned int*) 0x7042   //SPI status reg
#define    SPIBRR    (unsigned int*) 0x7044   //SPI baud rate reg
#define    SPIRXEMU  (unsigned int*) 0x7046   //SPI emulation buffer reg
#define    SPIRXBUF  (unsigned int*) 0x7047   //SPI serial receive buffer reg
#define    SPITXBUF  (unsigned int*) 0x7048   //SPI serial transmit buffer reg
#define    SPIDAT    (unsigned int*) 0x7049   //SPI serial data reg
#define    SPIPRI    (unsigned int*) 0x704F   //SPI priority control reg

//SCI registers
#define    SCICCR    (unsigned int*) 0x7050   //SCI communication control reg
#define    SCICTL1   (unsigned int*) 0x7051   //SCI control reg 1
#define    SCIHBAUD  (unsigned int*) 0x7052   //SCI baud-select reg, high bits
#define    SCILBAUD  (unsigned int*) 0x7053   //SCI baud-select reg, low bits
#define    SCICTL2   (unsigned int*) 0x7054   //SCI control reg 2
#define    SCIRXST   (unsigned int*) 0x7055   //SCI receiver status reg
#define    SCIRXEMU  (unsigned int*) 0x7056   //SCI emulation data buffer reg
#define    SCIRXBUF  (unsigned int*) 0x7057   //SCI receiver data buffer reg
#define    SCITXBUF  (unsigned int*) 0x7059   //SCI transmit data buffer reg
#define    SCIPRI    (unsigned int*) 0x705F   //SCI priority control reg

//External interrupt configuration registers
#define    XINT1CR   (unsigned int*) 0x7070   //Ext interrupt 1 config reg
#define    XINT2CR   (unsigned int*) 0x7071   //Ext interrupt 2 config reg

//Digital I/O registers
#define    MCRA      (unsigned int*) 0x7090   //I/O mux control reg A
#define    MCRB      (unsigned int*) 0x7092   //I/O mux control reg B
#define    MCRC      (unsigned int*) 0x7094   //I/O mux control reg C
#define    PADATDIR  (unsigned int*) 0x7098   //I/O port A data & dir reg
#define    PBDATDIR  (unsigned int*) 0x709A   //I/O port B data & dir reg
#define    PCDATDIR  (unsigned int*) 0x709C   //I/O port C data & dir reg
#define    PDDATDIR  (unsigned int*) 0x709E   //I/O port D data & dir reg
#define    PEDATDIR  (unsigned int*) 0x7095   //I/O port E data & dir reg
#define    PFDATDIR  (unsigned int*) 0x7096   //I/O port F data & dir reg

//Analog-to-Digital Converter (ADC) registers
#define    ADCTRL1   (unsigned int*) 0x70A0   //ADC control reg 1
#define    ADCTRL2   (unsigned int*) 0x70A1   //ADC control reg 2
#define    MAX_CONV  (unsigned int*) 0x70A2   //Maximum conversion channels reg
#define    CHSELSEQ1 (unsigned int*) 0x70A3   //Channel select sequencing control reg 1
#define    CHSELSEQ2 (unsigned int*) 0x70A4   //Channel select sequencing control reg 2
#define    CHSELSEQ3 (unsigned int*) 0x70A5   //Channel select sequencing control reg 3
#define    CHSELSEQ4 (unsigned int*) 0x70A6   //Channel select sequencing control reg 4
#define    AUTO_SEQ_SR (unsigned int*) 0x70A7   //Autosequence status reg
#define    RESULT0   (unsigned int*) 0x70A8   //Conversion result buffer reg 0
#define    RESULT1   (unsigned int*) 0x70A9   //Conversion result buffer reg 1
#define    RESULT2   (unsigned int*) 0x70AA   //Conversion result buffer reg 2
#define    RESULT3   (unsigned int*) 0x70AB   //Conversion result buffer reg 3
#define    RESULT4   (unsigned int*) 0x70AC   //Conversion result buffer reg 4
#define    RESULT5   (unsigned int*) 0x70AD   //Conversion result buffer reg 5
#define    RESULT6   (unsigned int*) 0x70AE   //Conversion result buffer reg 6
#define    RESULT7   (unsigned int*) 0x70AF   //Conversion result buffer reg 7
#define    RESULT8   (unsigned int*) 0x70B0   //Conversion result buffer reg 8
#define    RESULT9   (unsigned int*) 0x70B1   //Conversion result buffer reg 9
#define    RESULT10  (unsigned int*) 0x70B2   //Conversion result buffer reg 10
#define    RESULT11  (unsigned int*) 0x70B3   //Conversion result buffer reg 11
#define    RESULT12  (unsigned int*) 0x70B4   //Conversion result buffer reg 12
#define    RESULT13  (unsigned int*) 0x70B5   //Conversion result buffer reg 13
#define    RESULT14  (unsigned int*) 0x70B6   //Conversion result buffer reg 14
#define    RESULT15  (unsigned int*) 0x70B7   //Conversion result buffer reg 15
#define    CALIBRATION (unsigned int*) 0x70B8   //Calibration result reg

//Controller Area Network (CAN) registers
#define    MDER      (unsigned int*) 0x7100   //CAN mailbox direction/enable reg
#define    TCR       (unsigned int*) 0x7101   //CAN transmission control reg
#define    RCR       (unsigned int*) 0x7102   //CAN receive control reg
#define    MCR       (unsigned int*) 0x7103   //CAN master control reg
#define    BCR2      (unsigned int*) 0x7104   //CAN bit config reg 2
#define    BCR1      (unsigned int*) 0x7105   //CAN bit config reg 1
#define    ESR       (unsigned int*) 0x7106   //CAN error status reg
#define    GSR       (unsigned int*) 0x7107   //CAN global status reg
#define    CEC       (unsigned int*) 0x7108   //CAN trans and rcv err counters
#define    CAN_IFR   (unsigned int*) 0x7109   //CAN interrupt flag reg 
#define    CAN_IMR   (unsigned int*) 0x710a   //CAN interrupt mask reg
#define    LAM0_    (unsigned int*) 0x710b   //CAN local acceptance mask MBX0/1
#define    LAM0_L    (unsigned int*) 0x710c   //CAN local acceptance mask MBX0/1
#define    LAM1_    (unsigned int*) 0x710d   //CAN local acceptance mask MBX2/3
#define    LAM1_L    (unsigned int*) 0x710e   //CAN local acceptance mask MBX2/3

#define    MSGID0L   (unsigned int*) 0x7200   //CAN message ID for mailbox 0 (lower 16 bits)
#define    MSGID0   (unsigned int*) 0x7201   //CAN message ID for mailbox 0 (upper 16 bits)
#define    MSGCTRL0  (unsigned int*) 0x7202   //CAN RTR and DLC for mailbox 0
#define    MBX0A     (unsigned int*) 0x7204   //CAN 2 of 8 bytes of mailbox 0
#define    MBX0B     (unsigned int*) 0x7205   //CAN 2 of 8 bytes of mailbox 0
#define    MBX0C     (unsigned int*) 0x7206   //CAN 2 of 8 bytes of mailbox 0
#define    MBX0D     (unsigned int*) 0x7207   //CAN 2 of 8 bytes of mailbox 0

#define    MSGID1L   (unsigned int*) 0x7208   //CAN message ID for mailbox 1 (lower 16 bits)
#define    MSGID1   (unsigned int*) 0x7209   //CAN message ID for mailbox 1 (upper 16 bits)
#define    MSGCTRL1  (unsigned int*) 0x720A   //CAN RTR and DLC for mailbox 1
#define    MBX1A     (unsigned int*) 0x720C   //CAN 2 of 8 bytes of mailbox 1
#define    MBX1B     (unsigned int*) 0x720D   //CAN 2 of 8 bytes of mailbox 1
#define    MBX1C     (unsigned int*) 0x720E   //CAN 2 of 8 bytes of mailbox 1