cpu.cpp

获取CPU信息的类

// CPU.cpp : Defines the entry point for the console application.
//

#include "stdafx.h"
#include "cpuid.h"
#include "stdio.h"

char strCacheInfo[][100] =
{
	"Null descriptor",
	"Instruction TLB: 4 KByte pages, 4-way set associative, 32 entries",
	"Instruction TLB: 4 MByte pages, 4-way set associative, 2 entries",
	"Data TLB: 4 KByte pages, 4-way set associative, 64 entries",
	"Data TLB: 4 MByte pages, 4-way set associative, 8 entries",
	"Data TLB1: 4 MByte pages, 4-way set associative, 32 entries",
	"1st-level instruction cache: 8 KBytes, 4-way set associative, 32 byte line size",
	"\0",
	"1st-level instruction cache: 16 KBytes, 4-way set associative, 32 byte line size",
	"\0",
	"1st-level data cache: 8 KBytes, 2-way set associative, 32 byte line size",
	"Instruction TLB: 4 MByte pages, 4-way set associative, 4 entries",
	"1st-level data cache: 16 KBytes, 4-way set associative, 32 byte line size",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"3rd-level cache: 512 KBytes, 4-way set associative, 64 byte line size, 2 lines per sector",
	"3rd-level cache: 1 MBytes, 8-way set associative, 64 byte line size, 2 lines per sector",
	"",
	"3rd-level cache: 2 MBytes, 8-way set associative, 64 byte line size, 2 lines per sector",
	"\0",
	"\0",
	"\0",
	"3rd-level cache: 4 MBytes, 8-way set associative, 64 byte line size, 2 lines per sector",
	"\0",
	"\0",
	"1st-level data cache: 32 KBytes, 8-way set associative, 64 byte line size",
	"\0",
	"\0",
	"\0",
	"1st-level instruction cache: 32 KBytes, 8-way set associative, 64 byte line size",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"No 2nd-level cache or, if processor contains a valid 2nd-level cache, no 3rd-level cache",
	"2nd-level cache: 128 KBytes, 4-way set associative, 32 byte line size",
	"2nd-level cache: 256 KBytes, 4-way set associative, 32 byte line size",
	"2nd-level cache: 512 KBytes, 4-way set associative, 32 byte line size",
	"2nd-level cache: 1 MByte, 4-way set associative, 32 byte line size",
	"2nd-level cache: 2 MByte, 4-way set associative, 32 byte line size",
	"3rd-level cache: 4 MByte, 4-way set associative, 64 byte line size",
	"3rd-level cache: 8 MByte, 8-way set associative, 64 byte line size",
	"\0",
	"2nd-level cache: 4 MByte, 16-way set associative, 64 byte line size",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"Instruction TLB: 4 KByte and 2-MByte or 4-MByte pages, 64 entries",
	"Instruction TLB: 4 KByte and 2-MByte or 4-MByte pages, 128 entries",
	"Instruction TLB: 4 KByte and 2-MByte or 4-MByte pages, 256 entries",
	"\0",
	"\0",
	"\0",
	"Data TLB0: 4 MByte pages, 4-way set associative, 16 entries",
	"Data TLB0: 4 KByte pages, 4-way associative, 16 entries",
	"\0",
	"\0",
	"\0",
	"Data TLB: 4 KByte and 4 MByte pages, 64 entries",
	"Data TLB: 4 KByte and 4 MByte pages,128 entries",
	"Data TLB: 4 KByte and 4 MByte pages,256 entries",
	"\0",
	"\0",
	"1st-level data cache: 16 KByte, 8-way set associative, 64 byte line size",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"1st-level data cache: 8 KByte, 4-way set associative, 64 byte line size",
	"1st-level data cache: 16 KByte, 4-way set associative, 64 byte line size",
	"1st-level data cache: 32 KByte, 4-way set associative, 64 byte line size",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"Trace cache: 12 K- op, 8-way set associative",
	"Trace cache: 16 K- op, 8-way set associative",
	"Trace cache: 32 K- op, 8-way set associative",
	"\0",
	"\0",
	"\0",
	"\0",
	"\0",
	"2nd-level cache: 1 MByte, 4-way set associative, 64byte line size",
	"2nd-level cache: 128 KByte, 8-way set associative, 64 byte line size, 2 lines per sector",
	"2nd-level cache: 256 KByte, 8-way set associative, 64 byte line size, 2 lines per sector",
	"2nd-level cache: 512 KByte, 8-way set associative, 64 byte line size, 2 lines per sector",
	"2nd-level cache: 1 MByte, 8-way set associative, 64 byte line size, 2 lines per sector",
	"2nd-level cache: 2 MByte, 8-way set associative, 64byte line size",
	"\0",
	"2nd-level cache: 512 KByte, 2-way set associative, 64-byte line size",
	"\0",
	"\0",
	"2nd-level cache: 256 KByte, 8-way set associative, 32 byte line size",
	"2nd-level cache: 512 KByte, 8-way set associative, 32 byte line size",
	"2nd-level cache: 1 MByte, 8-way set associative, 32 byte line size",
	"2nd-level cache: 2 MByte, 8-way set associative, 32 byte line size",
	"2nd-level cache: 512 KByte, 4-way set associative, 64 byte line size",
	"2nd-level cache: 1 MByte, 8-way set associative, 64 byte line size",
	"","","","","","","","",
	"","","","","","","","","","","","","","","","",
	"","","","","","","","","","","","","","","","",
	"Instruction TLB: 4 KByte pages, 4-way set associative, 128 entries","","",
	"Data TLB: 4 KByte pages, 4-way set associative, 128 entries",
	"Data TLB1: 4 KByte pages, 4-way associative, 256 entries",
	"","","","","","","","","","","",
	"","","","","","","","","","","","","","","","",
	"","","","","","","","","","","","","","","","",
	"","","","","","","","","","","","","","","","",
	"64-Byte prefetching",
	"128-Byte prefetching",
};

int main(int argc, char* argv[])
{
	CCPUID cpuid;

	cpuid.Run();
	if(cpuid.bIsSupportCPUID)
		printf("This CPU is support CPUID Instruction.\n");
	else
		printf("This CPU is not support CPUID Instruction.\n");

	printf("Maxinum input Value for Basic CPUID information : 0x%X\n", cpuid.dwBaseMaxValue);
	printf("Maxinum input Value for Extended Function CPUID information : 0x%X\n", cpuid.dwExMaxValue);
	printf("\n-------------------------------------------------------------------------\n\n");
	
	printf("CPU厂商:  %s\n", cpuid.sFactory);
	printf("CPU型号:  %s\n", cpuid.sProcessorStr);
	printf("Famil : %X  Model : %X  Stepping ID : %X\n", cpuid.VI.iFamily, cpuid.VI.iModel, cpuid.VI.iSteppingID);
	printf("Brand ID : %d    0x%X\n\n", cpuid.iBrandIndex, cpuid.dwBaseFeatureInfo);

	printf("The CPU have %d Thread(s) %d Core(s).\n", cpuid.iThreads, cpuid.iCores);
	printf("Intel 64 bits technology : %d\n", cpuid.bIntel64);

	printf("Is support EST : %d\n", cpuid.bEST);

	printf("Is support HTT : %d\n", cpuid.bHTT);
	printf("Is support MMX : %d\n", cpuid.bMMX);
	printf("Is support SSE : %d\n", cpuid.bSSE);
	printf("Is support SSE2 : %d\n", cpuid.bSSE2);
	printf("Is support SSE3 : %d\n", cpuid.bSSE3);
	printf("Is support SSSE3 : %d\n", cpuid.bSSSE3);

	printf("Cache and TLB Infomation :\n\t\t\tEAX : 0x%08X\n\t\t\tEBX : 0x%08X\n\t\t\tECX : 0x%08X\n\t\t\tEDX : 0x%08X\n",\
		cpuid.dwCacheTLB[0], cpuid.dwCacheTLB[1], cpuid.dwCacheTLB[2], cpuid.dwCacheTLB[3]);

	printf("Extended Processor Feature : 0x%X\n\n", cpuid.dwExFeature);


	printf("%s\n", strCacheInfo[cpuid.dwCacheTLB[0] & 0x0FF]);
	printf("%s\n", strCacheInfo[(cpuid.dwCacheTLB[0] & 0x0FF00)     >> 8 ]);
	printf("%s\n", strCacheInfo[(cpuid.dwCacheTLB[0] & 0x0FF000000) >> 24]);
	printf("%s\n", strCacheInfo[(cpuid.dwCacheTLB[0] & 0x0FF0000)   >> 16]);

	printf("%s\n", strCacheInfo[(cpuid.dwCacheTLB[3] & 0x0FF0000)   >> 16]);
	printf("%s\n", strCacheInfo[(cpuid.dwCacheTLB[3] & 0x0FF00)     >> 8 ]);
	printf("%s\n", strCacheInfo[(cpuid.dwCacheTLB[3] & 0x0FF000000) >> 24]);
	printf("%s\n", strCacheInfo[cpuid.dwCacheTLB[3] & 0x0FF]);

	system("pause");
	return 0;
}