active.cc

ml-rsim 多处理器模拟器 支持类bsd操作系统

		  unsigned char *dp;
		  YS__logmsg(proc->proc_id / ARCH_cpus,
			     "[%i] %9.2f: %5x\t%s\t[%08x]=",
			     proc->proc_id,
			     YS__Simtime,
			     tmpinst->pc,
			     inames[tmpinst->code.instruction],
			     tmpinst->addr);
		  dp = (unsigned char*)(&tmpinst->rdvalf);
		  if (tmpinst->code.rd_regtype == REG_INT)
		    YS__logmsg(proc->proc_id / ARCH_cpus,
			       "%08X",
			       tmpinst->rdvali);
		  else if (tmpinst->code.rd_regtype == REG_INTPAIR)
		    YS__logmsg(proc->proc_id / ARCH_cpus,
			       "%08X %08X",
			       tmpinst->rdvalipair.a,
			       tmpinst->rdvalipair.b);
		  else if (tmpinst->code.rd_regtype == REG_INT64)
		    YS__logmsg(proc->proc_id / ARCH_cpus,
			       "%016llX",
			       tmpinst->rdvalll);
		  else if (tmpinst->code.rd_regtype == REG_FP)
		    YS__logmsg(proc->proc_id / ARCH_cpus,
			       "%f (%02X%02X%02X%02X%02X%02X%02X%02X)",
			       tmpinst->rdvalf,
			       *dp++, *dp++, *dp++, *dp++,
			       *dp++, *dp++, *dp++, *dp++);
		  else if (tmpinst->code.rd_regtype == REG_FPPAIR)
		    YS__logmsg(proc->proc_id / ARCH_cpus,
			       "%f",
			       tmpinst->rdvalf);
		  else if (tmpinst->code.rd_regtype == REG_FPHALF)
		    {
		      dp = (unsigned char*)(&tmpinst->rdvalfh);
		      YS__logmsg(proc->proc_id / ARCH_cpus,
				 "%f (%02X%02X%02X%02X)",
				 tmpinst->rdvalfh, *dp++, *dp++, *dp++, *dp++);
		    }
		  if ((tmpinst->code.rd_regtype == REG_INT) ||
		      (tmpinst->code.rd_regtype == REG_INTPAIR) ||
		      (tmpinst->code.rd_regtype == REG_INT64))
		    YS__logmsg(proc->proc_id / ARCH_cpus,
			       " (R%02i)\t",
			       tmpinst->code.rd);
		  else
		    YS__logmsg(proc->proc_id / ARCH_cpus,
			       " (F%02i)\t",
			       tmpinst->code.rd);
		}
	    }
	  else   // !uMem => other instruction
	    {
	      YS__logmsg(proc->proc_id / ARCH_cpus,
			 "[%i] %9.2f: %5x\t%s\tR%02i = ",
			 proc->proc_id,
			 YS__Simtime,
			 tmpinst->pc,
			 inames[tmpinst->code.instruction],
			 tmpinst->code.rd);
	      dp = (unsigned char*)(&tmpinst->rdvalfh);
	      if (tmpinst->code.rd_regtype == REG_INT)
		YS__logmsg(proc->proc_id / ARCH_cpus,
			   "%08X",
			   tmpinst->rdvali);
	      else if (tmpinst->code.rd_regtype == REG_INTPAIR)
		YS__logmsg(proc->proc_id / ARCH_cpus,
			   "%08X %08X",
			   tmpinst->rdvalipair.a,
			   tmpinst->rdvalipair.b);
	      else if (tmpinst->code.rd_regtype == REG_INT64)
		YS__logmsg(proc->proc_id / ARCH_cpus,
			   "%016llX",
			   tmpinst->rdvalll);
	      else if (tmpinst->code.rd_regtype == REG_FP)
		{
		  dp = (unsigned char*)(&tmpinst->rdvalf);
		  YS__logmsg(proc->proc_id / ARCH_cpus,
			     "%f (%02X%02X%02X%02X%02X%02X%02X%02X)",
			     tmpinst->rdvalf, *dp++, *dp++, *dp++, *dp++,
			     *dp++, *dp++, *dp++, *dp++);
		}
	      else if (tmpinst->code.rd_regtype == REG_FPPAIR)
		YS__logmsg(proc->proc_id / ARCH_cpus,
			   "%f",
			   tmpinst->rdvalf);
	      else if (tmpinst->code.rd_regtype == REG_FPHALF)
		{
		  dp = (unsigned char*)(&tmpinst->rdvalfh);
		  YS__logmsg(proc->proc_id / ARCH_cpus,
			     "%f (%02X%02X%02X%02X)",
			     tmpinst->rdvalfh, *dp++, *dp++, *dp++, *dp++);
		}
	      if ((tmpinst->code.rd_regtype == REG_INT) ||
		  (tmpinst->code.rd_regtype == REG_INTPAIR) ||
		  (tmpinst->code.rd_regtype == REG_INT64))
		YS__logmsg(proc->proc_id / ARCH_cpus,
			   " (R%02i)\t",
			   tmpinst->code.rd);
	      else
		YS__logmsg(proc->proc_id / ARCH_cpus,
			   " (F%02i)\t",
			   tmpinst->code.rd);
	    }

	  YS__logmsg(proc->proc_id / ARCH_cpus,
		     "\t%c\n",
		     proc->interrupt_pending ? '*' : ' ');

	  if (tmpinst->code.wpchange)
	    YS__logmsg(proc->proc_id / ARCH_cpus,
		       "  New CWP: %i\n", tmpinst->win_num);

  }
#endif

      gradded++;
 
      if ((PSTATE_GET_DTE(proc->pstate)) &&
	  (tmpinst->unit_type == uMEM))
	proc->mem_refs++;
         
      GraduateTagConverter(ptr->tag, proc);

      int lastcount = proc->curr_cycle-proc->last_counted;
 
      if (lastcount > 0 || proc->graduate_rate == 0)
	// how much do we need to account for this tag
	{
#ifndef NOSTAT
	  // we account in this fashion if we have
	  // infinite grad rate, single grad rate, or if
	  // we have finite multiple grads but we didn't
	  // have a completely busy cycle last time
 
	  if (tmpinst->miss != L1DHIT)
	    {
	      // if it's a miss, count it in its miss
	      // latency in addition to its regular latency
 
	      switch (lattype[tmpinst->code.instruction])
		{
		case lRD:
		  StatrecUpdate(proc->lat_contrs[lRDmiss],
				lastcount,
				1);
		  break;
		case lWT:
		  StatrecUpdate(proc->lat_contrs[lWTmiss],
				lastcount,
				1);
		  break;
		case lRMW:
		  StatrecUpdate(proc->lat_contrs[lRMWmiss],
				lastcount,
				1);
		  break;
		default:
		  // don't know why we're here
		  break;
		}
	    }
 
	  if (tmpinst->partial_overlap)
	    StatrecUpdate(proc->partial_otime, lastcount, 1);
      
	  StatrecUpdate(proc->lat_contrs[lattype[tmpinst->code.instruction]],
			lastcount, 1);
                    
	  switch(lattype[tmpinst->code.instruction])
	    {
	    case lRD:
	      StatrecUpdate(proc->lat_contrs[lRD_L1 + (int)tmpinst->miss],
			    lastcount,
			    1);
 
	      if (tmpinst->latepf)
		{
		  StatrecUpdate(proc->lat_contrs[lattype[tmpinst->code.instruction] + lRMW_PFlate-lRMW],
				lastcount,
				1);
		}
	      break;

		  
	    case lWT:
	      StatrecUpdate(proc->lat_contrs[lWT_L1+(int)tmpinst->miss],
			    lastcount,
			    1);
	      if (tmpinst->latepf)
		{
		  StatrecUpdate(proc->lat_contrs[lattype[tmpinst->code.instruction]+lRMW_PFlate-lRMW],
				lastcount,
				1);
		}
	      break;

		  
	    case lRMW:
	      StatrecUpdate(proc->lat_contrs[lRMW_L1+(int)tmpinst->miss],
			    lastcount,
			    1);
	      if (tmpinst->latepf)
		{
		  StatrecUpdate(proc->lat_contrs[lattype[tmpinst->code.instruction]+lRMW_PFlate-lRMW],
				lastcount,
				1);
		}
	      break;

		  
	    default:
	      break;
	    }
#endif
                    
	  proc->last_counted = proc->curr_cycle;
	}

      proc->last_graduated = proc->curr_cycle;
      busy++;
            
      proc->graduation_count++;
      proc->graduates++;

      if (tmpinst->unit_type == uMEM)
	{
	  proc->active_instr[uMEM]--;
	}

      
      if (tmpinst->partial_overlap)
	proc->partial_overlaps++;
            
      DeleteInstance(tmpinst, proc);

 
      Deleteactivelistelement(ptr, proc);
    }
  while ((gradded != proc->graduate_rate) &&
         (ptr = q->PeekHead()) && 
         (ptr->done) &&
         (ptr->cycledone + simulate_ilp <= cycle));


  // meaningless for infinite (0) graduation rates
  if (busy == proc->graduate_rate && proc->graduate_rate > 0)
    {
#ifndef NOSTAT
      StatrecUpdate(proc->lat_contrs[lBUSY], 1, 1);
#endif
      proc->last_counted = proc->curr_cycle + 1;
    }
 
  return NULL;                            // in other words, no exception
}



/*************************************************************************/
/* flush_active_list: empty elements from the list on a misprediction or */
/*                  : exception. Free registers in the process.          */
/*                  : returns -1 for empty active list , 0 on success    */
/*                  : -2 if element not found in list,                   */
/*************************************************************************/

int activelist::flush_active_list(long long tag, ProcState * proc)
{
  activelistelement *ptr;

#ifdef COREFILE
  if (proc->curr_cycle > DEBUG_TIME)
    fprintf(corefile, " FLUSH EVERYTHING AFTER %lld\n", tag);
#endif

  if (q->NumInQueue() == 0)
    return -1;

  while (q->NumInQueue())
    {
      ptr = q->PeekTail();

      if (ptr->tag <= tag)
	break;

      q->DeleteFromTail(ptr);

      /* *** THIS IS ALWAYS LAST IN TAG CONVERTER */
      instance *tmpinst = TagCvtTail(ptr->tag, proc);

      if (tmpinst == NULL)
	{
#ifdef COREFILE
	  if (proc->curr_cycle > DEBUG_TIME)
	    fprintf(corefile,
		    "Something is wrong, I dont have translation for tag %lld",
		    ptr->tag);
#endif
	  return (-1);
	}

      /* Remove entry from active list */
#ifdef COREFILE
      if (proc->curr_cycle > DEBUG_TIME)
	fprintf(corefile,
		"Tag %lld is being flushed from active list \n", 
		ptr->tag);
#endif

      if (UpdateTagtail(ptr->tag, proc) == 2)
	{
	  FlushTagConverter(ptr->tag, proc);

	  /* We need to free the registers but only ONCE */
	  if (tmpinst->code.rd_regtype == REG_FP || 
	      tmpinst->code.rd_regtype == REG_FPHALF)
	    {
	      proc->fpregbusy[tmpinst->prd] = 0;
	      proc->free_fp_list->addfreereg(tmpinst->prd);
	      proc->dist_stallq_fp[tmpinst->prd].ClearAll(proc);
	    }
	  else
	    {	// INT, INT64, INTPAIR?
	      proc->intregbusy[tmpinst->prd] = 0;
	      if (tmpinst->prd != 0)
		proc->free_int_list->addfreereg(tmpinst->prd);
	      proc->dist_stallq_int[tmpinst->prd].ClearAll(proc);

	      proc->intregbusy[tmpinst->prdp] = 0;
	      if (tmpinst->prdp != 0)
		proc->free_int_list->addfreereg(tmpinst->prdp);
	      proc->dist_stallq_int[tmpinst->prdp].ClearAll(proc);
	    }

	  proc->intregbusy[tmpinst->prcc] = 0;
	  if (tmpinst->prcc != 0)
	    proc->free_int_list->addfreereg(tmpinst->prcc);
	  proc->dist_stallq_int[tmpinst->prcc].ClearAll(proc);

	  if (STALL_ON_FULL &&
	      ((tmpinst->unit_type != uMEM &&
		tmpinst->issuetime == LLONG_MAX) ||
	       (stat_sched && tmpinst->unit_type == uMEM && 
		tmpinst->addrissuetime == LLONG_MAX)))  // it wasn't issued
	    proc->active_instr[tmpinst->unit_type]--;
	  

	  if (STALL_ON_FULL && tmpinst->unit_type == uMEM && !stat_sched)
	    proc->active_instr[uMEM]--;
	  
	  if (tmpinst->code.sync)
	    proc->sync = 0;

          if (tmpinst->code.wpchange &&
              !(tmpinst->strucdep > 0 && tmpinst->strucdep < 5) &&
              tmpinst->exception_code != WINOVERFLOW &&
              tmpinst->exception_code != WINUNDERFLOW &&
	      tmpinst->exception_code != CLEANWINDOW)
            /* unupdate CWP that has been changed */
	    {
	      if (tmpinst->code.wpchange != WPC_FLUSHW)
		{
		  proc->cwp = unsigned (proc->cwp + NUM_WINS -
					tmpinst->code.wpchange) %
		    NUM_WINS;
		  proc->cansave += tmpinst->code.wpchange;
		  proc->canrestore -= tmpinst->code.wpchange;

#ifdef COREFILE
		  if (YS__Simtime > DEBUG_TIME)
		    fprintf(corefile,
			    "Flushing winchange instr. CANSAVE %d, CANRESTORE %d\n",
			    proc->cansave, proc->canrestore);
#endif
		}
	    }
	  DeleteInstance(tmpinst, proc);
	}
      Deleteactivelistelement(ptr, proc);
    }

  return 0;
}



int activelist::fp_ahead(long long tag, ProcState * proc)
{
  int                index, numelts;
  activelistelement *ptr;
  
  numelts = q->NumInQueue();
  
  for (index = 0; index < numelts; index += 2)
    {
      q->PeekElt(ptr, index);
      instance *tmpinst = GetTagCvtByPosn(ptr->tag, index / 2, proc);

      if (tmpinst->tag >= tag)
	return(0);

      if (tmpinst->unit_type == uFP)
	return(1);
    }

  return(0);
}




#ifdef COREFILE
void PrintGradInstr(instance *inst)
{
  if (GetSimTime() <= DEBUG_TIME) 
    return;

  fprintf(corefile, "Graduating pc %d tag %lld: %s", inst->pc,
	  inst->tag, inames[inst->code.instruction]);

  switch (inst->code.rd_regtype)
    {
    case REG_INT:
      if (inst->lrd != ZEROREG)
	fprintf(corefile, " i%d->%d", inst->lrd, inst->rdvali);
      break;
    case REG_FP:
      fprintf(corefile, " f%d->%f", inst->lrd, inst->rdvalf);
      break;
    case REG_FPHALF:
      fprintf(corefile, " fh%d->%f", inst->lrd, inst->rdvalfh);
      break;
    case REG_INTPAIR:
      if (inst->lrd != ZEROREG)
	fprintf(corefile, " i%d->%d i%d->%d", inst->lrd, inst->rdvalipair.a, 
		inst->lrd + 1, inst->rdvalipair.b);
      else
	fprintf(corefile, " i%d->%d", inst->lrd + 1, inst->rdvalipair.b);
      break;
    case REG_INT64:
      fprintf(corefile, " ll%d->%lld", inst->lrd, inst->rdvalll);
      break;
    default:
      fprintf(corefile, " rdX = XXX");
      break;
    }

  if (inst->lrcc != ZEROREG)
    fprintf(corefile, " i%d->%d", inst->lrcc, inst->rccvali);

  if (IsStore(inst) && !IsRMW(inst))
    {
      switch (inst->code.rs1_regtype)
	{
	case REG_INT:
	  fprintf(corefile, " i%d->[%d]", inst->rs1vali, inst->addr);
	  break;
	case REG_FP:
	  fprintf(corefile, " f%f->[%d]", inst->rs1valf, inst->addr);
	  break;
	case REG_FPHALF:
	  fprintf(corefile, " fh%f->[%d]", inst->rs1valfh, inst->addr);
	  break;
	case REG_INTPAIR:
	  fprintf(corefile, " i%d->[%d] i%d->[%d]", 
		  inst->rs1valipair.a, inst->addr, 
		  inst->rs1valipair.b, inst->addr + 4);
	  break;
	case REG_INT64:
	  fprintf(corefile, " ll%lld->[%d]", inst->rs1valll, inst->addr);
	  break;
	default:
	  break;
	}
    }
  fprintf(corefile, "\n");
}
#endif