instance.h

ml-rsim 多处理器模拟器 支持类bsd操作系统

  MAX_EXCEPT
};


extern const char *enames[];



/*******************************************************************/
/***** class instance defintion:a dynamic instruction **************/
/*******************************************************************/

struct instance
{
  /************************* General Variables *****************************/
  long long tag;             /* Unique tag identifier                      */

  instr     code;            /* the static instruction referenced          */

  unsigned  pc;              /* program counter                            */
  unsigned  npc;             /* next pc value                              */
  unsigned  newpc;           /* default:0, not filled in until instr compl */

  char      win_num;         /* Window number                              */
  char      inuse;           /* indicates use of instance                  */
  UTYPE     unit_type;       /* Unit type associated with instruction      */
  char      stallqs;         /* counts # of mini-stallqs                   */

  except    exception_code;  /* 0 for no exception?                        */
  HIT_TYPE  miss;            /* mark type of cache miss                    */

  
  /**************************** Memory address *****************************/

  unsigned  addr;            /* the address of the memory instruction      */
  unsigned  finish_addr;     /* the "end address" of the memory instruction*/

  long long vsbfwd;	     /* forwards from virtual store buffer         */
  

  
  /**************************** Time Variables *****************************/

  double    time_active_list;  /* time from active list                    */
  double    time_addr_ready;   /* time from address ready                  */
  double    time_issued;       /* time from issue                          */
  long long issuetime;         /* cycle # when it was issued; should be
			          initialized to MAX_INT                   */
  long long addrissuetime;     /* cycle # when sent to address generation
			          unit; used for static scheduling only    */

  /**************************** Status Variables *****************************/

  
  long long memprogress;     /* lists current state of memory instruction  */
  long long completion;      /* time for completion                        */

  int       addr_attributes;   /* page attributes from TLB                 */

  char      addr_ready;        /* has address generation happened yet?     */
  char      busybits;          /* indicate "busy'ness" of rs1, rs2 and rd  */
  char      in_memunit;        /* flag a memory operation in memory unit   */
  char      mem_ready;         /* memory op marked ready to issue?         */

  char      global_perform;    /* has mem operation been globally performed*/
  char      limbo;	       /* flag "limbo" ambiguous memory ops        */
  char      kill;	       /* kill instruction flag                    */
  char      partial_overlap;   /* indicate presense of partial overlaps
				  between memory operations                */

  char      prefetched;        /* flag a prefetch instruction              */
  char      latepf;	       /* flag a late prefetch                     */
  char      mispredicted;      /* Result of prediction, set at completion  */
  char      taken;             /* the return value of StartCtlXfer         */

  unsigned  branch_pred;       /* pc predicted, filled in at decode        */

  
  /************************** dependence records ***************************/
  char      truedep; 	       /* true dependence                          */
  char      addrdep;	       /* address dependence                       */
  char      strucdep;	       /* structural dependence                    */
  char      branchdep;	       /* control dependence                       */

  
  /************************** Registers Numbers ****************************/

  /* Logical register numbers after taking into effect of window pointer. */
  short     lrs1;
  short     lrs2;
  short     lrscc;
  short     lrd;
  short     lrcc; 
    
  /* Physical register numbers */
  short     prs1;
  short     prs2;
  short     prscc;   
  short     prd;
  short     prcc;          

  /* this is used for instructions where dest. reg is an FPHALF.  Since FPs 
     are mapped/renamed by doubles, these are effectively RMWs */
  short     lrsd;
  short     prsd; 

  /* for INT_PAIR ops */
  short     prs1p;
  short     prdp;


#ifdef PAD_INSTANCE
  int __pad__;
#endif
  /************************** Registers Values *****************************/

  union
  {        /* destination */
    int    rdvali;
    double rdvalf;
    float  rdvalfh;
    struct
    {
       int a, b;
    } rdvalipair;
    long long rdvalll;
  };
    
  union
  {	/* register source 1 */
    int    rs1vali;
    double rs1valf;
    float  rs1valfh;
    struct
    {
      int a, b;
    } rs1valipair;
    long long rs1valll;
  };
    
  union
  {	/* register source 2 */
    int     rs2vali;
    double  rs2valf;
    float   rs2valfh;
    long long rs2valll;   /* rs2 can't have an int reg pair with this ISA */
  };

  int    rsccvali;        /* value of source condition code */
  int    rccvali;         /* Only integer values */
  double rsdvalf; 	  /* the value of prsd */

public:
  int decode_instruction(ProcState *proc);   // see pipestages.cc

  inline void copy(instance *i)
  {
    long long *src, *dest;
    int n;

    src = (long long*)this;
    dest = (long long*)i;
    for (n = 0; n < sizeof(instance) / sizeof(long long); n++)
      dest[n] = src[n];    
  }

  inline instance()
  { tag = 0; }

  inline instance(instr *instrn)
  {
    instrn->copy(&code); // code = *instrn;
  }

  inline instance(instance *inst)  /* copy contructor */
  {
    inst->copy(this);
  }

  inline ~instance() 
  { tag=-1; } /* reassign tag */
};

#endif