tlc5620_avalon_interface.v

nios 嵌入式系统基础教程配套实验 定制基于AVALON总线的用户外设实验

/****************************************Copyright (c)**************************************************
**                               Guangzhou ZHIYUAN ELECTRONIC CO.,LTD.
**                                      Research centre
**                         http://www.zyinside.com, http://www.zlgmcu.com
**
**---------------------------------------File Info-----------------------------------------------------
** File name:			tlc5620_avalon_interface.v
** Last modified Date:	2005-12-14
** Last Version:		1.0
** Descriptions:		tlc5620 avalon interface
**------------------------------------------------------------------------------------------------------
** Created by:			ZhouShuwu
** Created date:		2005-12-14
** Version:				1.0
** Descriptions:		The original version
**
**------------------------------------------------------------------------------------------------------
** Modified by:			
** Modified date:		
** Version:				
** Descriptions:		
**
**------------------------------------------------------------------------------------------------------
********************************************************************************************************/
module tlc5620_avalon_interface(
	//Avalon Signals
	clock,
	reset_n,
	chip_select,
	address,
	write,
	write_data,
	
    //tlc5620 Output Signals	
	dac_clk,
	dac_data,
	dac_load,
	dac_ldac	

 );

		//Avalon_Slave_tlc5620 Avalon I/O
		input 			clock;		 	//System clock - tied to all blocks
		input 			reset_n;		//System reset - tied to all blocks
		input 			chip_select;	//Avalon Chip select
		input [1:0]		address;	    //Avalon Address bus 
		input 			write;			//Avalon Write signal
		input [31:0]	write_data;		//Avalon Write data bus

		
		//Avalon_Slave_tlc5620 Exported I/O
		output 			dac_clk;		//tlc5620 output signal
		output 			dac_data;		//tlc5620 output signal
		output 			dac_load;		//tlc5620 output signal
		output 			dac_ldac;		//tlc5620 output signal
	
wire [31:0] tlc5620_clock_divide;  		//clock_divide wire from register file to tlc5620_task_logic
wire [10:0] tlc5620_write_data;    		//write_data value from register file to tlc5620_task_logic
wire 	    tlc5620_write_act;       	//write_act signal from register file to tlc5620_task_logic

//tlc5620 Instance
tlc5620_task_logic U1(
	    .clock(clock ),
	    .reset_n(reset_n),
	    //********************
	    .clock_divide(tlc5620_clock_divide),
	    .write_data(tlc5620_write_data),
	    .write_act(tlc5620_write_act),
	    .dac_clk(dac_clk),
	    .dac_data(dac_data),
	    .dac_load(dac_load),
	    .dac_ldac(dac_ldac)   
		);

//Register File instance
tlc5620_register_file U2(	
		.clock(clock),
		.reset_n(reset_n),
		.chip_select(chip_select),
		.address(address),
		.write(write),
		.write_data(write_data),

		//********************
		.tlc5620_clock_divide(tlc5620_clock_divide),
		.tlc5620_write_data(tlc5620_write_data),
		.tlc5620_write_act(tlc5620_write_act)
		);

endmodule