⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 smartsopc_flash_programmer.map.qmsg

📁 nios 嵌入式系统基础教程实验 创建目标板FLASH编程
💻 QMSG
📖 第 1 页 / 共 5 页
字号:
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 8 asmi.v(345) " "Warning: Verilog HDL assignment warning at asmi.v(345): truncated value with size 32 to match size of target (8)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 345 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(346) " "Warning: Verilog HDL assignment warning at asmi.v(346): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 346 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(347) " "Warning: Verilog HDL assignment warning at asmi.v(347): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 347 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(348) " "Warning: Verilog HDL assignment warning at asmi.v(348): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 348 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(349) " "Warning: Verilog HDL assignment warning at asmi.v(349): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 349 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "16 8 asmi.v(355) " "Warning: Verilog HDL assignment warning at asmi.v(355): truncated value with size 16 to match size of target (8)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 355 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(356) " "Warning: Verilog HDL assignment warning at asmi.v(356): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 356 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(360) " "Warning: Verilog HDL assignment warning at asmi.v(360): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 360 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(364) " "Warning: Verilog HDL assignment warning at asmi.v(364): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 364 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(368) " "Warning: Verilog HDL assignment warning at asmi.v(368): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 368 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(372) " "Warning: Verilog HDL assignment warning at asmi.v(372): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 372 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(376) " "Warning: Verilog HDL assignment warning at asmi.v(376): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 376 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(381) " "Warning: Verilog HDL assignment warning at asmi.v(381): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 381 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(383) " "Warning: Verilog HDL assignment warning at asmi.v(383): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 383 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(384) " "Warning: Verilog HDL assignment warning at asmi.v(384): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 384 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(385) " "Warning: Verilog HDL assignment warning at asmi.v(385): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 385 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(391) " "Warning: Verilog HDL assignment warning at asmi.v(391): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 391 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(392) " "Warning: Verilog HDL assignment warning at asmi.v(392): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 392 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(394) " "Warning: Verilog HDL assignment warning at asmi.v(394): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 394 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 asmi.v(396) " "Warning: Verilog HDL assignment warning at asmi.v(396): truncated value with size 32 to match size of target (1)" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 396 0 0 } }  } 0}
{ "Warning" "WVRFX_VRFC_CONDITION_EXP_IS_CONST" "asmi.v(403) " "Warning: (10037) Verilog HDL or VHDL warning at asmi.v(403): condition expression evaluates to a constant" {  } { { "asmi.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 403 0 0 } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "tornado_asmi_atom SmartSOPC_Flash_Programmer:inst\|asmi:the_asmi\|tornado_asmi_atom:the_tornado_asmi_atom " "Info: Elaborating entity \"tornado_asmi_atom\" for hierarchy \"SmartSOPC_Flash_Programmer:inst\|asmi:the_asmi\|tornado_asmi_atom:the_tornado_asmi_atom\"" {  } { { "asmi.v" "the_tornado_asmi_atom" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/asmi.v" 529 -1 0 } }  } 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cpu_0_data_master_arbitrator SmartSOPC_Flash_Programmer:inst\|cpu_0_data_master_arbitrator:the_cpu_0_data_master " "Info: Elaborating entity \"cpu_0_data_master_arbitrator\" for hierarchy \"SmartSOPC_Flash_Programmer:inst\|cpu_0_data_master_arbitrator:the_cpu_0_data_master\"" {  } { { "SmartSOPC_Flash_Programmer.v" "the_cpu_0_data_master" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 3610 -1 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 SmartSOPC_Flash_Programmer.v(434) " "Warning: Verilog HDL assignment warning at SmartSOPC_Flash_Programmer.v(434): truncated value with size 32 to match size of target (1)" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 434 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 SmartSOPC_Flash_Programmer.v(440) " "Warning: Verilog HDL assignment warning at SmartSOPC_Flash_Programmer.v(440): truncated value with size 32 to match size of target (1)" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 440 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "24 1 SmartSOPC_Flash_Programmer.v(448) " "Warning: Verilog HDL assignment warning at SmartSOPC_Flash_Programmer.v(448): truncated value with size 24 to match size of target (1)" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 448 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 SmartSOPC_Flash_Programmer.v(497) " "Warning: Verilog HDL assignment warning at SmartSOPC_Flash_Programmer.v(497): truncated value with size 32 to match size of target (1)" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 497 0 0 } }  } 0}
{ "Warning" "WVRFX_VRFC_CONDITION_EXP_IS_CONST" "SmartSOPC_Flash_Programmer.v(498) " "Warning: (10037) Verilog HDL or VHDL warning at SmartSOPC_Flash_Programmer.v(498): condition expression evaluates to a constant" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 498 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 SmartSOPC_Flash_Programmer.v(499) " "Warning: Verilog HDL assignment warning at SmartSOPC_Flash_Programmer.v(499): truncated value with size 32 to match size of target (1)" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 499 0 0 } }  } 0}
{ "Warning" "WVRFX_VRFC_CONDITION_EXP_IS_CONST" "SmartSOPC_Flash_Programmer.v(545) " "Warning: (10037) Verilog HDL or VHDL warning at SmartSOPC_Flash_Programmer.v(545): condition expression evaluates to a constant" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 545 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 SmartSOPC_Flash_Programmer.v(557) " "Warning: Verilog HDL assignment warning at SmartSOPC_Flash_Programmer.v(557): truncated value with size 32 to match size of target (1)" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 557 0 0 } }  } 0}
{ "Warning" "WVRFX_VRFC_CONDITION_EXP_IS_CONST" "SmartSOPC_Flash_Programmer.v(558) " "Warning: (10037) Verilog HDL or VHDL warning at SmartSOPC_Flash_Programmer.v(558): condition expression evaluates to a constant" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 558 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 1 SmartSOPC_Flash_Programmer.v(568) " "Warning: Verilog HDL assignment warning at SmartSOPC_Flash_Programmer.v(568): truncated value with size 32 to match size of target (1)" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 568 0 0 } }  } 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 16 SmartSOPC_Flash_Programmer.v(583) " "Warning: Verilog HDL assignment warning at SmartSOPC_Flash_Programmer.v(583): truncated value with size 32 to match size of target (16)" {  } { { "SmartSOPC_Flash_Programmer.v" "" { Text "C:/altera/kits/nios2/examples/SmartSOPC_Flash_Programmer/system/SmartSOPC_Flash_Programmer.v" 583 0 0 } }  } 0}

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -