proj.tan.summary

液晶模块输出VHDL程序 程序实现的功能是标准的16×2字符型液晶模块上显示字符串

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 33.793 ns
From           : lcd:inst|state[2]
To             : LCD_D[3]
From Clock     : clk
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 151.10 MHz ( period = 6.618 ns )
From           : lcd:inst|state[2]
To             : lcd:inst|state[4]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Clock Hold: 'clk'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : lcd:inst|lcd_e
To             : lcd:inst|lcd_e
From Clock     : clk
To Clock       : clk
Failed Paths   : 12

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 12

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