ppc860i2c.h

这是mpc860 iic总线驱动程序源代码

#define I2C_PRINTF if( I2C_printf_switch == TRUE ) printf

#define I2C_MAX_BUF_LEN 0x50

#define I2C_PARAM_OFFSET         0x3C80  /*param offset*/
#define I2C_RELOCAT_OFFSET       0x1ec0
#define I2C_NEW_BASE_ADRS      ( I2C_RELOCAT_OFFSET+ 0x2000 )

/* I2C Parameter RAM Memory Map */
#define I2C_PARAM_RBASE             0x00
#define I2C_PARAM_TBASE             0x02
#define I2C_PARAM_RFCR              0x04
#define I2C_PARAM_TFCR              0x05
#define I2C_PARAM_MRBLR             0x06

/*for i2c microcode initial*/
#define I2C_PARAM_RSTATE             0x08
#define I2C_PARAM_RBPTR              0x10
#define I2C_PARAM_TSTATE             0x18
#define I2C_PARAM_TBPTR              0x20


#define M860_I2C_BD_RBASE 0x29C0
#define M860_I2C_BD_TBASE 0x29C8
#define M860_PPC_LITTLE_ENDIAN 0x10 /*PowerPC little-endian.*/
#define M860_ADD_TYPE 0x0    /*addretype AT[1-3]  0*/

/* offset from BD base to transmit BD, since there is just one BD each */
#define M860_I2C_BD_STAT_OFF    0    /* offset to status field */
#define M860_I2C_BD_LEN_OFF    2    /* offset to data length field */
#define M860_I2C_BD_ADDR_OFF    4    /* offset to address pointer field */

#define M860_I2C_32_WR(addr, value) (* ((VUINT32 *)(addr)) = ((VUINT32) (value)))
 
#define M860_I2C_16_WR(addr, value) (* ((VUINT16 *)(addr)) = ((VUINT16) (value)))
 
#define M860_I2C_8_WR(addr, value) (* ((VUINT8 *)(addr)) = ((VUINT8) (value)))
 
#define M860_I2C_32_RD(addr, value) ((value) = (* (VUINT32 *) ((VUINT32 *)(addr))))
 
#define M860_I2C_16_RD(addr, value) ((value) = (* (VUINT16 *) ((VUINT16 *)(addr))))
 
#define M860_I2C_8_RD(addr, value) ((value) = (* (VUINT8 *) ((VUINT8 *)(addr))))

typedef struct          /* I2C_PARAM */
{		                /* offset description*/
    volatile _USHORT16  rbase;	/* 00 Rx buffer descriptor base address */
    volatile _USHORT16      tbase;	/* 02 Tx buffer descriptor base address */
    volatile _CHAR8    rfcr;	/* 04 Rx function code */
    volatile _CHAR8       tfcr;	/* 05 Tx function code */
    volatile _USHORT16      mrblr;	/* 06 maximum receive buffer length */
    volatile _UINT32    rstate;	/* 08 Rx internal state */
    volatile _UINT32      rptr;	/* 0C Rx internal data pointer */
    volatile _USHORT16      rbptr;	/* 10 Rx buffer descriptor pointer */
    volatile _USHORT16      res1;	/* 12 reserved/internal */
    volatile _UINT32      res2;	/* 14 reserved/internal */
    volatile _UINT32      tstate;	/* 18 Tx internal state */
    volatile _UINT32      res3;	/* 1C reserved/internal */
    volatile _USHORT16      tbptr;	/* 20 Tx buffer descriptor pointer */
    volatile _USHORT16      res4;	/* 22 reserved/internal */
    volatile _UINT32      res5;	/* 24 reserved/internal */
} I2C_PARAM;

_VOID ppc860I2C_Init();

_ULONG32 I2CSend( _UCHAR8 *buffer, _USHORT16 length );

_ULONG32  I2CReceive(_UCHAR8 *buffer, _USHORT16 *length);

_ULONG32 I2CWrite(_UCHAR8 ucTargetAddr,_UCHAR8 ucWordAddr,_UCHAR8 *buffer,_USHORT16 length);

_ULONG32 I2CCurrentAddrRead( _UCHAR8 ucTargetAddr, _UCHAR8 *buffer,_USHORT16 length );

#if 0
/*
 * Definitions of the parameter area RAM.
 * Note that different structures are overlaid
 * at the same offsets for the different modes
 * of operation.
 *
 * History:
 * 12/12/95	lvn	Bundled multiple files from MSIL into this file
 * 6/18/96     saw     Replaced:
 *                        volatile unsigned long	simt_tbscr;
 *	                     volatile unsigned long	simt_rtcsc;
 *	                           With:
 *                        volatile unsigned short	simt_tbscr;
 *                        volatile unsigned char	RESERVED100[0x2];
 *                        volatile unsigned short	simt_rtcsc;
 *                        volatile unsigned char	RESERVED110[0x2];
 * 10/4/96      saw    Filled in PCMCIA section.
 * 11/21/96     saw    Changed address of PIP PBODR to 0xac2 from 0xac0.
 * 12/18/96     saw    Renamed Registers:
 *                        scc_gsmra -> scc_gsmr_l
 *                        scc_gsmrb -> scc_gsmr_h
 *  1/6/97      sgj    Created 860 version from 8xx code standard
 *
 */

/*****************************************************************
	HDLC parameter RAM
*****************************************************************/

struct hdlc_pram {
	/*
	 * SCC parameter RAM
	 */
	unsigned short	rbase;		/* RX BD base address */
	unsigned short	tbase;		/* TX BD base address */
	unsigned char	rfcr;		/* Rx function code */
	unsigned char	tfcr;		/* Tx function code */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */
	unsigned short	rcount;		/* Rx internal byte count */
	unsigned long	rtemp;		/* Rx temp */
	unsigned long	tstate;		/* Tx internal state */
	unsigned long	tptr;		/* Tx internal data pointer */
	unsigned short	tbptr;		/* Tx BD pointer */
	unsigned short	tcount;		/* Tx byte count */
	unsigned long	ttemp;		/* Tx temp */
	unsigned long	rcrc;		/* temp receive CRC */
	unsigned long	tcrc;		/* temp transmit CRC */

	/*
	 * HDLC specific parameter RAM
	 */
	unsigned char	RESERVED1[4];	/* Reserved area */
	unsigned long	c_mask;		/* CRC constant */
	unsigned long	c_pres;		/* CRC preset */
	unsigned short	disfc;		/* discarded frame counter */
	unsigned short	crcec;		/* CRC error counter */
	unsigned short	abtsc;		/* abort sequence counter */
	unsigned short	nmarc;		/* nonmatching address rx cnt */
	unsigned short	retrc;		/* frame retransmission cnt */
	unsigned short	mflr;		/* maximum frame length reg */
	unsigned short	max_cnt;	/* maximum length counter */
	unsigned short	rfthr;		/* received frames threshold */
	unsigned short	rfcnt;		/* received frames count */
	unsigned short	hmask;		/* user defined frm addr mask */
	unsigned short	haddr1;	/* user defined frm address 1 */
	unsigned short	haddr2;	/* user defined frm address 2 */
	unsigned short	haddr3;	/* user defined frm address 3 */
	unsigned short	haddr4;	/* user defined frm address 4 */
	unsigned short	tmp;	/* temp */
	unsigned short	tmp_mb;	/* temp */
};


/*****************************************************************
	ASYNC HDLC parameter RAM
*****************************************************************/

struct async_hdlc_pram {
	/*
	 * SCC parameter RAM
	 */
	unsigned short	rbase;		/* RX BD base address */
	unsigned short	tbase;		/* TX BD base address */
	unsigned char	rfcr;		/* Rx function code */
	unsigned char	tfcr;		/* Tx function code */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */
	unsigned short	rcount;		/* Rx internal byte count */
	unsigned long	rtemp;		/* Rx temp */
	unsigned long	tstate;		/* Tx internal state */
	unsigned long	tptr;		/* Tx internal data pointer */
	unsigned short	tbptr;		/* Tx BD pointer */
	unsigned short	tcount;		/* Tx byte count */
	unsigned long	ttemp;		/* Tx temp */
	unsigned long	rcrc;		/* temp receive CRC */
	unsigned long	tcrc;		/* temp transmit CRC */

	/*
	 * ASYNC HDLC specific parameter RAM
	 */
	unsigned char	RESERVED1[4];	/* Reserved area */
	unsigned long	c_mask;		/* CRC constant */
	unsigned long	c_pres;		/* CRC preset */
	unsigned short	bof;		/* begining of flag character */
	unsigned short	eof;		/* end of flag character */
	unsigned short	esc;		/* control escape character */
	unsigned char	RESERVED2[4];	/* Reserved area */
	unsigned short	zero;		/* zero */
	unsigned char	RESERVED3[2];	/* Reserved area */
	unsigned short	rfthr;		/* received frames threshold */
	unsigned char	RESERVED4[4];	/* Reserved area */
	unsigned long	txctl_tbl;	/* Tx ctl char mapping table */
	unsigned long	rxctl_tbl;	/* Rx ctl char mapping table */
	unsigned short	nof;		/* Number of opening flags */
};


/*****************************************************************
	UART parameter RAM
*****************************************************************/

/*
 * bits in uart control characters table
 */
#define	CC_INVALID	0x8000		/* control character is valid */
#define	CC_REJ		0x4000		/* don't store char in buffer */
#define	CC_CHAR		0x00ff		/* control character */

/* UART */
struct uart_pram {
	/*
	 * SCC parameter RAM
	 */
	unsigned short	rbase;		/* RX BD base address */
	unsigned short	tbase;		/* TX BD base address */
	unsigned char	rfcr;		/* Rx function code */
	unsigned char	tfcr;		/* Tx function code */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */
	unsigned short	rcount;		/* Rx internal byte count */
	unsigned long	rx_temp;	/* Rx temp */
	unsigned long	tstate;		/* Tx internal state */
	unsigned long	tptr;		/* Tx internal data pointer */
	unsigned short	tbptr;		/* Tx BD pointer */
	unsigned short	tcount;		/* Tx byte count */
	unsigned long	ttemp;		/* Tx temp */
	unsigned long	rcrc;		/* temp receive CRC */
	unsigned long	tcrc;		/* temp transmit CRC */

	/*
	 * UART specific parameter RAM
	 */
	unsigned char	RESERVED1[8];	/* Reserved area */
	unsigned short	max_idl;	/* maximum idle characters */
	unsigned short	idlc;		/* rx idle counter (internal) */
	unsigned short	brkcr;		/* break count register */

	unsigned short	parec;		/* Rx parity error counter */
	unsigned short	frmer;		/* Rx framing error counter */
	unsigned short	nosec;		/* Rx noise counter */
	unsigned short	brkec;		/* Rx break character counter */
	unsigned short	brkln;		/* Reaceive break length */

	unsigned short	uaddr1;		/* address character 1 */
	unsigned short	uaddr2;		/* address character 2 */
	unsigned short	rtemp;		/* temp storage */
	unsigned short	toseq;		/* Tx out of sequence char */
	unsigned short	cc[8];		/* Rx control characters */
	unsigned short	rccm;		/* Rx control char mask */
	unsigned short	rccr;		/* Rx control char register */
	unsigned short	rlbc;		/* Receive last break char */
};



/*****************************************************************
	BISYNC parameter RAM
*****************************************************************/

struct bisync_pram {
	/*
	 * SCC parameter RAM
	 */
	unsigned short	rbase;		/* RX BD base address */
	unsigned short	tbase;		/* TX BD base address */
	unsigned char	rfcr;		/* Rx function code */
	unsigned char	tfcr;		/* Tx function code */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */
	unsigned short	rcount;		/* Rx internal byte count */
	unsigned long	rtemp;		/* Rx temp */
	unsigned long	tstate;		/* Tx internal state */
	unsigned long	tptr;		/* Tx internal data pointer */
	unsigned short	tbptr;		/* Tx BD pointer */
	unsigned short	tcount;		/* Tx byte count */
	unsigned long	ttemp;		/* Tx temp */
	unsigned long	rcrc;		/* temp receive CRC */
	unsigned long	tcrc;		/* temp transmit CRC */

	/*
	 * BISYNC specific parameter RAM
	 */
	unsigned char	RESERVED1[4];	/* Reserved area */
	unsigned long	crcc;		/* CRC Constant Temp Value */
	unsigned short	prcrc;		/* Preset Receiver CRC-16/LRC */
	unsigned short	ptcrc;		/* Preset Transmitter CRC-16/LRC */
	unsigned short	parec;		/* Receive Parity Error Counter */
	unsigned short	bsync;		/* BISYNC SYNC Character */
	unsigned short	bdle;		/* BISYNC DLE Character */
	unsigned short	cc[8];		/* Rx control characters */
	unsigned short	rccm;		/* Receive Control Character Mask */
};

/*****************************************************************
	IOM2 parameter RAM
	(overlaid on tx bd[5] of SCC channel[2])
*****************************************************************/
struct iom2_pram {
	unsigned short	ci_data;	/* ci data */
	unsigned short	monitor_data;	/* monitor data */
	unsigned short	tstate;		/* transmitter state */
	unsigned short	rstate;		/* receiver state */
};

/*****************************************************************
	SPI/SMC parameter RAM
	(overlaid on tx bd[6,7] of SCC channel[2])
*****************************************************************/

#define	SPI_R	0x8000		/* Ready bit in BD */

struct spi_pram {
	unsigned short	rbase;		/* Rx BD Base Address */
	unsigned short	tbase;		/* Tx BD Base Address */
	unsigned char	rfcr;		/* Rx function code */
	unsigned char	tfcr;		/* Tx function code */
	unsigned short	mrblr;		/* Rx buffer length */
	unsigned long	rstate;		/* Rx internal state */
	unsigned long	rptr;		/* Rx internal data pointer */
	unsigned short	rbptr;		/* rb BD Pointer */