bit_rev.asm

详细的OFDM设计过程

;******************************************************************************
;* TMS320C6x C/C++ Codegen                                    PC Version 4.36 *
;* Date/Time created: Tue May 31 14:03:12 2005                                *
;******************************************************************************

;******************************************************************************
;* GLOBAL FILE PARAMETERS                                                     *
;*                                                                            *
;*   Architecture      : TMS320C671x                                          *
;*   Optimization      : Enabled at level 3                                   *
;*   Optimizing for    : Speed 1st, size 2nd                                  *
;*                       Based on options: -o3, -ms1                          *
;*   Endian            : Little                                               *
;*   Interrupt Thrshld : Disabled                                             *
;*   Memory Model      : Large                                                *
;*   Calls to RTS      : Far                                                  *
;*   Pipelining        : Limited                                              *
;*   Speculative Load  : Disabled                                             *
;*   Memory Aliases    : Presume are aliases (pessimistic)                    *
;*   Debug Info        : COFF Debug                                           *
;*                                                                            *
;******************************************************************************

	.asg	A15, FP
	.asg	B14, DP
	.asg	B15, SP
	.global	$bss

	.file	"bit_rev.c"
;	c:\ti\c6000\cgtools\bin\opt6x.exe -i0 -v6710 -q -O3 -Z1 C:\DOCUME~1\SBPRJ-~1\LOCALS~1\Temp\TI2620_2 C:\DOCUME~1\SBPRJ-~1\LOCALS~1\Temp\TI2620_5 -w F:/black05/DSP/recieverSINE/Debug 

	.sect	".text"
	.global	_bit_rev
	.sym	_bit_rev,_bit_rev, 32, 2, 0
	.func	26

;******************************************************************************
;* FUNCTION NAME: _bit_rev                                                    *
;*                                                                            *
;*   Regs Modified     : A0,A1,A3,A5,A6,A7,A8,A9,B0                           *
;*   Regs Used         : A0,A1,A3,A4,A5,A6,A7,A8,A9,B0,B3,B4                  *
;*   Local Frame Size  : 0 Args + 0 Auto + 0 Save = 0 byte                    *
;******************************************************************************

;******************************************************************************
;*                                                                            *
;* Using -g (debug) with optimization (-o3) may disable key optimizations!    *
;*                                                                            *
;******************************************************************************
_bit_rev:
;** --------------------------------------------------------------------------*
	.line	2
	.sym	_x,4, 22, 17, 32
	.sym	_n,20, 4, 17, 32
	.sym	_itemp,6, 6, 4, 32
	.sym	_rtemp,6, 6, 4, 32
	.sym	_k,3, 4, 4, 32
	.sym	_j,0, 4, 4, 32
	.sym	_i,7, 4, 4, 32
	.sym	_x,4, 22, 4, 32
	.sym	_n,20, 4, 4, 32
	.line	7
           CMPLT   .L2     B4,3,B0           ; |32| 
   [ B0]   B       .S1     L4                ; |32| 
   [!B0]   SHR     .S1X    B4,1,A9
           NOP             4
           ; BRANCH OCCURS                   ; |32| 
;** --------------------------------------------------------------------------*
	.line	9
           SUB     .D2     B4,2,B0           ; |34| 
	.line	6
           ZERO    .D1     A0                ; |31| 
	.line	7
           MVK     .S1     0x1,A7            ; |32| 
;** --------------------------------------------------------------------------*
;**   BEGIN LOOP L1
;** --------------------------------------------------------------------------*
L1:    
	.line	9
           MV      .D1     A9,A3             ; |34| 
	.line	10
           CMPGT   .L1     A3,A0,A1          ; |35| 
   [ A1]   B       .S1     L3                ; |35| 
           NOP             5
           ; BRANCH OCCURS                   ; |35| 
;*----------------------------------------------------------------------------*
;*   SOFTWARE PIPELINE INFORMATION
;*
;*      Disqualified loop: Suppressed to prevent code expansion
;*----------------------------------------------------------------------------*
L2:    
	.line	12
           SUB     .D1     A0,A3,A0          ; |37| 
	.line	14
           SHR     .S1     A3,1,A3           ; |39| 
           CMPGT   .L1     A3,A0,A1          ; |39| 
   [!A1]   B       .S1     L2                ; |39| 
           NOP             5
           ; BRANCH OCCURS                   ; |39| 
;** --------------------------------------------------------------------------*
L3:    
	.line	15
           ADD     .D1     A3,A0,A0          ; |40| 
	.line	16
           CMPLT   .L1     A7,A0,A1          ; |41| 
	.line	18
   [ A1]   ADD     .D1     A0,A0,A5          ; |43| 
   [ A1]   LDW     .D1T1   *+A4[A5],A6       ; |43| 
	.line	19
   [ A1]   ADD     .D1     A7,A7,A3          ; |44| 
   [ A1]   LDW     .D1T1   *+A4[A3],A8       ; |44| 
           NOP             4
   [ A1]   STW     .D1T1   A8,*+A4[A5]       ; |44| 
	.line	20
   [ A1]   STW     .D1T1   A6,*+A4[A3]       ; |45| 
	.line	21
   [ A1]   ADDAD   .D1     A4,A0,A3          ; |46| 
   [ A1]   ADD     .D1     4,A3,A3           ; |46| 
   [ A1]   LDW     .D1T1   *A3,A6            ; |46| 
	.line	22
   [ A1]   ADDAD   .D1     A4,A7,A5          ; |47| 
   [ A1]   ADD     .D1     4,A5,A5           ; |47| 
   [ A1]   LDW     .D1T1   *A5,A8            ; |47| 
           NOP             4
   [ A1]   STW     .D1T1   A8,*A3            ; |47| 
	.line	23
   [ A1]   STW     .D1T1   A6,*A5            ; |48| 
	.line	25
           SUB     .D2     B0,1,B0           ; |50| 
   [ B0]   B       .S1     L1                ; |50| 
           ADD     .D1     1,A7,A7           ; |50| 
           NOP             4
           ; BRANCH OCCURS                   ; |50| 
;** --------------------------------------------------------------------------*
L4:    
	.line	26
           RET     .S2     B3                ; |51| 
           NOP             5
           ; BRANCH OCCURS                   ; |51| 
	.endfunc	51,000000000h,0



;******************************************************************************
;* TYPE INFORMATION                                                           *
;******************************************************************************