pci_top.hier_info

PIC 的ip 有用的着的拿去看看吧 对于开发pci总线会有很大帮助的

PciClk => PciAdressReg[7].CLK
PciClk => PciAdressReg[6].CLK
PciClk => PciAdressReg[5].CLK
PciClk => PciAdressReg[4].CLK
PciClk => PciAdressReg[3].CLK
PciClk => PciAdressReg[2].CLK
PciClk => PciCbeReg[3].CLK
PciClk => PciCbeReg[2].CLK
PciClk => PciCbeReg[1].CLK
PciClk => PciCbeReg[0].CLK
PciClk => Com[1].CLK
PciClk => Com[0].CLK
PciClk => BaseAddress0[31].CLK
PciClk => BaseAddress0[30].CLK
PciClk => BaseAddress0[29].CLK
PciClk => BaseAddress0[28].CLK
PciClk => BaseAddress0[27].CLK
PciClk => BaseAddress0[26].CLK
PciClk => BaseAddress0[25].CLK
PciClk => BaseAddress0[24].CLK
PciClk => BaseAddress0[23].CLK
PciClk => BaseAddress0[22].CLK
PciClk => BaseAddress0[21].CLK
PciClk => BaseAddress0[20].CLK
PciClk => BaseAddress0[19].CLK
PciClk => BaseAddress0[18].CLK
PciClk => BaseAddress0[17].CLK
PciClk => BaseAddress0[16].CLK
PciClk => BaseAddress0[15].CLK
PciClk => BaseAddress0[14].CLK
PciClk => BaseAddress0[13].CLK
PciClk => BaseAddress0[12].CLK
PciClk => BaseAddress0[11].CLK
PciClk => BaseAddress0[10].CLK
PciClk => BaseAddress0[9].CLK
PciClk => BaseAddress0[8].CLK
PciClk => BaseAddress0[7].CLK
PciClk => BaseAddress0[6].CLK
PciClk => BaseAddress0[5].CLK
PciClk => BaseAddress0[4].CLK
PciClk => BaseAddress1[31].CLK
PciClk => BaseAddress1[30].CLK
PciClk => BaseAddress1[29].CLK
PciClk => BaseAddress1[28].CLK
PciClk => BaseAddress1[27].CLK
PciClk => BaseAddress1[26].CLK
PciClk => BaseAddress1[25].CLK
PciClk => BaseAddress1[24].CLK
PciClk => BaseAddress1[23].CLK
PciClk => BaseAddress1[22].CLK
PciClk => BaseAddress1[21].CLK
PciClk => BaseAddress1[20].CLK
PciClk => BaseAddress1[19].CLK
PciClk => BaseAddress1[18].CLK
PciClk => InterruptLine[7].CLK
PciClk => InterruptLine[6].CLK
PciClk => InterruptLine[5].CLK
PciClk => InterruptLine[4].CLK
PciClk => InterruptLine[3].CLK
PciClk => InterruptLine[2].CLK
PciClk => InterruptLine[1].CLK
PciClk => InterruptLine[0].CLK
PciClk => PciPar~reg0.CLK
PciClk => INT_SCAN_COUNTER[18].CLK
PciClk => INT_SCAN_COUNTER[17].CLK
PciClk => INT_SCAN_COUNTER[16].CLK
PciClk => INT_SCAN_COUNTER[15].CLK
PciClk => INT_SCAN_COUNTER[14].CLK
PciClk => INT_SCAN_COUNTER[13].CLK
PciClk => INT_SCAN_COUNTER[12].CLK
PciClk => INT_SCAN_COUNTER[11].CLK
PciClk => INT_SCAN_COUNTER[10].CLK
PciClk => INT_SCAN_COUNTER[9].CLK
PciClk => INT_SCAN_COUNTER[8].CLK
PciClk => INT_SCAN_COUNTER[7].CLK
PciClk => INT_SCAN_COUNTER[6].CLK
PciClk => INT_SCAN_COUNTER[5].CLK
PciClk => INT_SCAN_COUNTER[4].CLK
PciClk => INT_SCAN_COUNTER[3].CLK
PciClk => INT_SCAN_COUNTER[2].CLK
PciClk => INT_SCAN_COUNTER[1].CLK
PciClk => INT_SCAN_COUNTER[0].CLK
PciClk => PciDevsel_~reg0.CLK
PciClk => PciStateMachine~6.IN1
PciClk => PciAdOutSelect~6.IN1
PciFrame_ => PciStop_~0.OUTPUTSELECT
PciFrame_ => Selector3.IN1
PciFrame_ => Selector0.IN2
PciFrame_ => Selector4.IN2
PciFrame_ => PciDevsel_~0.OUTPUTSELECT
PciFrame_ => PciStop_~2.OUTPUTSELECT
PciFrame_ => PciCycleBegin.CLK
PciFrame_ => always0~1.IN0
PciFrame_ => always3~0.IN1
PciIdsel => always0~2.IN0
PciIdsel => always0~4.IN1
PciIrdy_ => Selector5.IN3
PciIrdy_ => Selector2.IN3
PciIrdy_ => Selector1.IN3
PciIrdy_ => PciTrdy_~0.OUTPUTSELECT
PciIrdy_ => ConfigWriteEnable~1.OUTPUTSELECT
PciIrdy_ => PciStop_~1.OUTPUTSELECT
PciIrdy_ => Selector4.IN1
PciIrdy_ => E8051Rd_~0.OUTPUTSELECT
PciIrdy_ => PciAdOutEnable~2.OUTPUTSELECT
PciIrdy_ => Selector0.IN1
PciIrdy_ => E8051IoRd_~0.OUTPUTSELECT
PciIrdy_ => E8051IoWr_~0.OUTPUTSELECT
PciIrdy_ => E8051Wr_~0.OUTPUTSELECT
PciIrdy_ => InnerIoWriteStrobe~0.OUTPUTSELECT
PciIrdy_ => PciStateMachine~2.DATAB
PciDevsel_ <= PciDevsel_~reg0.DB_MAX_OUTPUT_PORT_TYPE
PciTrdy_ <= PciTrdy_~reg0.DB_MAX_OUTPUT_PORT_TYPE
PciStop_ <= PciStop_~reg0.DB_MAX_OUTPUT_PORT_TYPE
PciPar <= PciPar~reg0.DB_MAX_OUTPUT_PORT_TYPE
PciCbe_[0] => WideXor4.IN3
PciCbe_[0] => Equal7.IN1
PciCbe_[0] => Equal8.IN3
PciCbe_[0] => Equal9.IN2
PciCbe_[0] => Equal10.IN3
PciCbe_[0] => Equal11.IN1
PciCbe_[0] => Equal12.IN3
PciCbe_[0] => Equal13.IN1
PciCbe_[0] => Equal14.IN0
PciCbe_[0] => PciCbeReg[0].DATAIN
PciCbe_[1] => WideXor4.IN2
PciCbe_[1] => Equal7.IN3
PciCbe_[1] => Equal8.IN2
PciCbe_[1] => Equal9.IN3
PciCbe_[1] => Equal10.IN2
PciCbe_[1] => Equal11.IN3
PciCbe_[1] => Equal12.IN2
PciCbe_[1] => Equal13.IN0
PciCbe_[1] => Equal14.IN3
PciCbe_[1] => PciCbeReg[1].DATAIN
PciCbe_[2] => WideXor4.IN1
PciCbe_[2] => Equal7.IN0
PciCbe_[2] => Equal8.IN0
PciCbe_[2] => Equal9.IN1
PciCbe_[2] => Equal10.IN1
PciCbe_[2] => Equal11.IN2
PciCbe_[2] => Equal12.IN1
PciCbe_[2] => Equal13.IN3
PciCbe_[2] => Equal14.IN2
PciCbe_[2] => PciCbeReg[2].DATAIN
PciCbe_[3] => WideXor4.IN0
PciCbe_[3] => Equal7.IN2
PciCbe_[3] => Equal8.IN1
PciCbe_[3] => Equal9.IN0
PciCbe_[3] => Equal10.IN0
PciCbe_[3] => Equal11.IN0
PciCbe_[3] => Equal12.IN0
PciCbe_[3] => Equal13.IN2
PciCbe_[3] => Equal14.IN1
PciCbe_[3] => PciCbeReg[3].DATAIN
PciAdIn[0] => E8051P0Out~7.DATAA
PciAdIn[0] => InnerIoReg[0].DATAIN
PciAdIn[0] => Equal16.IN1
PciAdIn[0] => Com[0].DATAIN
PciAdIn[0] => InterruptLine[0].DATAIN
PciAdIn[1] => E8051P0Out~6.DATAA
PciAdIn[1] => InnerIoReg[1].DATAIN
PciAdIn[1] => Equal16.IN0
PciAdIn[1] => Com[1].DATAIN
PciAdIn[1] => InterruptLine[1].DATAIN
PciAdIn[2] => E8051P0Out~5.DATAA
PciAdIn[2] => InnerIoReg[2].DATAIN
PciAdIn[2] => PciAdressReg[2].DATAIN
PciAdIn[2] => InterruptLine[2].DATAIN
PciAdIn[3] => E8051P0Out~4.DATAA
PciAdIn[3] => InnerIoReg[3].DATAIN
PciAdIn[3] => PciAdressReg[3].DATAIN
PciAdIn[3] => InterruptLine[3].DATAIN
PciAdIn[4] => E8051P0Out~3.DATAA
PciAdIn[4] => InnerIoReg[4].DATAIN
PciAdIn[4] => PciAdressReg[4].DATAIN
PciAdIn[4] => BaseAddress0[4].DATAIN
PciAdIn[4] => InterruptLine[4].DATAIN
PciAdIn[5] => E8051P0Out~2.DATAA
PciAdIn[5] => InnerIoReg[5].DATAIN
PciAdIn[5] => PciAdressReg[5].DATAIN
PciAdIn[5] => BaseAddress0[5].DATAIN
PciAdIn[5] => InterruptLine[5].DATAIN
PciAdIn[6] => E8051P0Out~1.DATAA
PciAdIn[6] => InnerIoReg[6].DATAIN
PciAdIn[6] => PciAdressReg[6].DATAIN
PciAdIn[6] => BaseAddress0[6].DATAIN
PciAdIn[6] => InterruptLine[6].DATAIN
PciAdIn[7] => E8051P0Out~0.DATAA
PciAdIn[7] => BUTTON_INT_CLEAR~0.IN1
PciAdIn[7] => PciAdressReg[7].DATAIN
PciAdIn[7] => BaseAddress0[7].DATAIN
PciAdIn[7] => InterruptLine[7].DATAIN
PciAdIn[8] => Equal15.IN2
PciAdIn[8] => PciAdressReg[8].DATAIN
PciAdIn[8] => BaseAddress0[8].DATAIN
PciAdIn[9] => Equal15.IN1
PciAdIn[9] => PciAdressReg[9].DATAIN
PciAdIn[9] => BaseAddress0[9].DATAIN
PciAdIn[10] => Equal15.IN0
PciAdIn[10] => PciAdressReg[10].DATAIN
PciAdIn[10] => BaseAddress0[10].DATAIN
PciAdIn[11] => PciAdressReg[11].DATAIN
PciAdIn[11] => BaseAddress0[11].DATAIN
PciAdIn[12] => PciAdressReg[12].DATAIN
PciAdIn[12] => BaseAddress0[12].DATAIN
PciAdIn[13] => PciAdressReg[13].DATAIN
PciAdIn[13] => BaseAddress0[13].DATAIN
PciAdIn[14] => PciAdressReg[14].DATAIN
PciAdIn[14] => BaseAddress0[14].DATAIN
PciAdIn[15] => PciAdressReg[15].DATAIN
PciAdIn[15] => BaseAddress0[15].DATAIN
PciAdIn[16] => PciAdressReg[16].DATAIN
PciAdIn[16] => BaseAddress0[16].DATAIN
PciAdIn[17] => PciAdressReg[17].DATAIN
PciAdIn[17] => BaseAddress0[17].DATAIN
PciAdIn[18] => PciAdressReg[18].DATAIN
PciAdIn[18] => BaseAddress0[18].DATAIN
PciAdIn[18] => BaseAddress1[18].DATAIN
PciAdIn[19] => PciAdressReg[19].DATAIN
PciAdIn[19] => BaseAddress0[19].DATAIN
PciAdIn[19] => BaseAddress1[19].DATAIN
PciAdIn[20] => PciAdressReg[20].DATAIN
PciAdIn[20] => BaseAddress0[20].DATAIN
PciAdIn[20] => BaseAddress1[20].DATAIN
PciAdIn[21] => PciAdressReg[21].DATAIN
PciAdIn[21] => BaseAddress0[21].DATAIN
PciAdIn[21] => BaseAddress1[21].DATAIN
PciAdIn[22] => PciAdressReg[22].DATAIN
PciAdIn[22] => BaseAddress0[22].DATAIN
PciAdIn[22] => BaseAddress1[22].DATAIN
PciAdIn[23] => PciAdressReg[23].DATAIN
PciAdIn[23] => BaseAddress0[23].DATAIN
PciAdIn[23] => BaseAddress1[23].DATAIN
PciAdIn[24] => PciAdressReg[24].DATAIN
PciAdIn[24] => BaseAddress0[24].DATAIN
PciAdIn[24] => BaseAddress1[24].DATAIN
PciAdIn[25] => PciAdressReg[25].DATAIN
PciAdIn[25] => BaseAddress0[25].DATAIN
PciAdIn[25] => BaseAddress1[25].DATAIN
PciAdIn[26] => PciAdressReg[26].DATAIN
PciAdIn[26] => BaseAddress0[26].DATAIN
PciAdIn[26] => BaseAddress1[26].DATAIN
PciAdIn[27] => PciAdressReg[27].DATAIN
PciAdIn[27] => BaseAddress0[27].DATAIN
PciAdIn[27] => BaseAddress1[27].DATAIN
PciAdIn[28] => PciAdressReg[28].DATAIN
PciAdIn[28] => BaseAddress0[28].DATAIN
PciAdIn[28] => BaseAddress1[28].DATAIN
PciAdIn[29] => PciAdressReg[29].DATAIN
PciAdIn[29] => BaseAddress0[29].DATAIN
PciAdIn[29] => BaseAddress1[29].DATAIN
PciAdIn[30] => PciAdressReg[30].DATAIN
PciAdIn[30] => BaseAddress0[30].DATAIN
PciAdIn[30] => BaseAddress1[30].DATAIN
PciAdIn[31] => PciAdressReg[31].DATAIN
PciAdIn[31] => BaseAddress0[31].DATAIN
PciAdIn[31] => BaseAddress1[31].DATAIN
PciAdOut[0] <= PciAdOut~47.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[1] <= PciAdOut~46.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[2] <= PciAdOut~45.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[3] <= PciAdOut~44.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[4] <= PciAdOut~43.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[5] <= PciAdOut~42.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[6] <= PciAdOut~41.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[7] <= PciAdOut~40.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[8] <= PciAdOut~39.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[9] <= PciAdOut~38.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[10] <= PciAdOut~37.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[11] <= PciAdOut~36.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[12] <= PciAdOut~35.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[13] <= PciAdOut~34.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[14] <= PciAdOut~33.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[15] <= PciAdOut~32.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[16] <= PciAdOut~31.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[17] <= PciAdOut~30.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[18] <= PciAdOut~29.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[19] <= PciAdOut~28.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[20] <= PciAdOut~27.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[21] <= PciAdOut~26.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[22] <= PciAdOut~25.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[23] <= PciAdOut~24.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[24] <= PciAdOut~23.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[25] <= PciAdOut~22.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[26] <= PciAdOut~21.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[27] <= PciAdOut~20.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[28] <= PciAdOut~19.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[29] <= PciAdOut~18.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[30] <= PciAdOut~17.DB_MAX_OUTPUT_PORT_TYPE
PciAdOut[31] <= PciAdOut~16.DB_MAX_OUTPUT_PORT_TYPE
PciIntA_ <= PciIntA_~0.DB_MAX_OUTPUT_PORT_TYPE
PciAdOutEnable <= PciAdOutEnable~reg0.DB_MAX_OUTPUT_PORT_TYPE
PciParOutEnable <= PciParOutEnable~reg0.DB_MAX_OUTPUT_PORT_TYPE
PciDevselTrdyStopOutEnable <= PciDevselTrdyStopOutEnable~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P0OutEnable <= E8051P0OutEnable~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Ale <= E8051Ale~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Al[0] <= E8051Al[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Al[1] <= E8051Al[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Al[2] <= E8051Al[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Al[3] <= E8051Al[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Al[4] <= E8051Al[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Al[5] <= E8051Al[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Al[6] <= E8051Al[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Al[7] <= E8051Al[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P2[0] <= E8051P2[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P2[1] <= E8051P2[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P2[2] <= E8051P2[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P2[3] <= E8051P2[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P2[4] <= E8051P2[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P2[5] <= E8051P2[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P2[6] <= E8051P2[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P2[7] <= E8051P2[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051P0In[0] => PciAdOut~7.DATAB
E8051P0In[1] => PciAdOut~6.DATAB
E8051P0In[2] => PciAdOut~5.DATAB
E8051P0In[3] => PciAdOut~4.DATAB
E8051P0In[4] => PciAdOut~3.DATAB
E8051P0In[5] => PciAdOut~2.DATAB
E8051P0In[6] => PciAdOut~1.DATAB
E8051P0In[7] => PciAdOut~0.DATAB
E8051P0Out[0] <= E8051P0Out~7.DB_MAX_OUTPUT_PORT_TYPE
E8051P0Out[1] <= E8051P0Out~6.DB_MAX_OUTPUT_PORT_TYPE
E8051P0Out[2] <= E8051P0Out~5.DB_MAX_OUTPUT_PORT_TYPE
E8051P0Out[3] <= E8051P0Out~4.DB_MAX_OUTPUT_PORT_TYPE
E8051P0Out[4] <= E8051P0Out~3.DB_MAX_OUTPUT_PORT_TYPE
E8051P0Out[5] <= E8051P0Out~2.DB_MAX_OUTPUT_PORT_TYPE
E8051P0Out[6] <= E8051P0Out~1.DB_MAX_OUTPUT_PORT_TYPE
E8051P0Out[7] <= E8051P0Out~0.DB_MAX_OUTPUT_PORT_TYPE
E8051Wr_ <= E8051Wr_~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051Rd_ <= E8051Rd_~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051IoWr_ <= E8051IoWr_~reg0.DB_MAX_OUTPUT_PORT_TYPE
E8051IoRd_ <= E8051IoRd_~reg0.DB_MAX_OUTPUT_PORT_TYPE
LocalReset_ <= LocalReset_~0.DB_MAX_OUTPUT_PORT_TYPE
LocalInt_ => BUTTON_INT_REG.DATAIN