pci_top.hif

PIC 的ip 有用的着的拿去看看吧 对于开发pci总线会有很大帮助的

HIF003
--
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	lpm_xor.tdf
	{
		lpm_xor [USE_LPM_FOR_AHDL_OPERATORS,LPM_WIDTH,LPM_SIZE] []
		{
			2 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=1,LPM_SIZE=8] [DATA7_0,DATA6_0,DATA5_0,DATA4_0,DATA3_0,DATA2_0,DATA1_0,DATA0_0,RESULT0];
			3 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=1,LPM_SIZE=4] [DATA3_0,DATA2_0,DATA1_0,DATA0_0,RESULT0];
		}
	}
	lpm_add_sub.tdf
	{
		lpm_add_sub [USE_LPM_FOR_AHDL_OPERATORS,LPM_WIDTH,LPM_REPRESENTATION=SIGNED,LPM_DIRECTION=DEFAULT,ONE_INPUT_IS_CONSTANT=NO,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=5,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY,STYLE] [aglobal.inc,altshift.inc,bypassff.inc,look_add.inc,addcore.inc,lpm_add_sub.inc]
		{
			6 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=19,LPM_REPRESENTATION=UNSIGNED,LPM_DIRECTION=ADD,ONE_INPUT_IS_CONSTANT=YES,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=10,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10KA,STYLE=NORMAL] [DATAA18,DATAA17,DATAA16,DATAA15,DATAA14,DATAA13,DATAA12,DATAA11,DATAA10,DATAA9,DATAA8,DATAA7,DATAA6,DATAA5,DATAA4,DATAA3,DATAA2,DATAA1,DATAA0,DATAB18,DATAB17,DATAB16,DATAB15,DATAB14,DATAB13,DATAB12,DATAB11,DATAB10,DATAB9,DATAB8,DATAB7,DATAB6,DATAB5,DATAB4,DATAB3,DATAB2,DATAB1,DATAB0,RESULT0,RESULT1,RESULT2,RESULT3,RESULT4,RESULT5,RESULT6,RESULT7,RESULT8,RESULT9,RESULT10,RESULT11,RESULT12,RESULT13,RESULT14,RESULT15,RESULT16,RESULT17,RESULT18];
			1 [USE_LPM_FOR_AHDL_OPERATORS=OFF,LPM_WIDTH=4,LPM_REPRESENTATION=UNSIGNED,LPM_DIRECTION=ADD,ONE_INPUT_IS_CONSTANT=YES,LPM_PIPELINE=0,MAXIMIZE_SPEED=5,OPTIMIZE_FOR_SPEED=10,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10KA,STYLE=NORMAL] [DATAA3,DATAA2,DATAA1,DATAA0,DATAB3,DATAB2,DATAB1,DATAB0,RESULT0,RESULT1,RESULT2,RESULT3];
		}
	}
	addcore.tdf
	{
		addcore [USE_LPM_FOR_AHDL_OPERATORS,width,CONSTANT_CIN,CARRY_CHAIN,CARRY_CHAIN_LENGTH,DEVICE_FAMILY] [aglobal.inc,addcore.inc]
		{
			7 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=8,CONSTANT_CIN=1,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10KA] [cin,datab0,datab1,datab2,dataa0,dataa1,dataa2,bp_out,bg_out,result0,result1,result2];
			8 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=8,CONSTANT_CIN=1,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10KA] [cin,datab0,datab1,datab2,datab3,datab4,datab5,datab6,datab7,dataa0,dataa1,dataa2,dataa3,dataa4,dataa5,dataa6,dataa7,bp_out,bg_out,result0,result1,result2,result3,result4,result5,result6,result7];
			5 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=8,CONSTANT_CIN=1,CARRY_CHAIN=IGNORE,CARRY_CHAIN_LENGTH=32,DEVICE_FAMILY=FLEX10KA] [cin,datab0,datab1,datab2,datab3,dataa0,dataa1,dataa2,dataa3,bp_out,bg_out,result0,result1,result2,result3];
		}
	}
	look_add.tdf
	{
		look_add [USE_LPM_FOR_AHDL_OPERATORS,width,CARRY_CHAIN,DEVICE_FAMILY] [aglobal.inc,look_add.inc]
		{
			9 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=3,CARRY_CHAIN=IGNORE,DEVICE_FAMILY=FLEX10KA] [cin,bp_in0,bp_in1,bp_in2,bg_in0,bg_in1,bg_in2,cout0,cout1,cout2];
			12 [USE_LPM_FOR_AHDL_OPERATORS=OFF,width=1,CARRY_CHAIN=IGNORE,DEVICE_FAMILY=FLEX10KA] [cin,bp_in0,bg_in0,cout0];
		}
	}
	altshift.tdf
	{
		altshift [USE_LPM_FOR_AHDL_OPERATORS,WIDTH=4,DEPTH=0] []
		{
			10 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=19,DEPTH=0] [data0,data1,data2,data3,data4,data5,data6,data7,data8,data9,data10,data11,data12,data13,data14,data15,data16,data17,data18,result0,result1,result2,result3,result4,result5,result6,result7,result8,result9,result10,result11,result12,result13,result14,result15,result16,result17,result18];
			11 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=1,DEPTH=0] [data0,result0];
			13 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=4,DEPTH=0] [data0,data1,data2,data3,result0,result1,result2,result3];
		}
	}
	impl_eab.tdf
	{
		impl_eab [USE_LPM_FOR_AHDL_OPERATORS,Width,Ad_Width,FILE] [altrom.inc]
		{
			14 [USE_LPM_FOR_AHDL_OPERATORS=OFF,Width=11,Ad_Width=9,FILE="pci_top(1).mif"] [Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8,Q9,Q10,Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Address8];
			16 [USE_LPM_FOR_AHDL_OPERATORS=OFF,Width=11,Ad_Width=9,FILE="pci_top(2).mif"] [Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8,Q9,Q10,Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Address8];
			18 [USE_LPM_FOR_AHDL_OPERATORS=OFF,Width=5,Ad_Width=7,FILE="pci_top(3).mif"] [Q0,Q1,Q2,Q3,Q4,Address0,Address1,Address2,Address3,Address4,Address5,Address6];
			20 [USE_LPM_FOR_AHDL_OPERATORS=OFF,Width=1,Ad_Width=8,FILE="pci_top(4).mif"] [Q0,Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7];
			22 [USE_LPM_FOR_AHDL_OPERATORS=OFF,Width=1,Ad_Width=8,FILE="pci_top(5).mif"] [Q0,Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7];
			24 [USE_LPM_FOR_AHDL_OPERATORS=OFF,Width=1,Ad_Width=8,FILE="pci_top(6).mif"] [Q0,Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7];
			26 [USE_LPM_FOR_AHDL_OPERATORS=OFF,Width=1,Ad_Width=8,FILE="pci_top(7).mif"] [Q0,Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7];
		}
	}
	altrom.tdf
	{
		altrom [USE_LPM_FOR_AHDL_OPERATORS,WIDTH,AD_WIDTH,NUMWORDS,FILE,REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY] [aglobal.inc,lpm_mux.inc,lpm_decode.inc,memmodes.inc]
		{
			15 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=11,AD_WIDTH=9,NUMWORDS=512,FILE="pci_top(1).mif",REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY=FLEX10KA] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Address8,Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8,Q9,Q10];
			17 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=11,AD_WIDTH=9,NUMWORDS=512,FILE="pci_top(2).mif",REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY=FLEX10KA] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Address8,Q0,Q1,Q2,Q3,Q4,Q5,Q6,Q7,Q8,Q9,Q10];
			19 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=5,AD_WIDTH=7,NUMWORDS=128,FILE="pci_top(3).mif",REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY=FLEX10KA] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Q0,Q1,Q2,Q3,Q4];
			21 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=1,AD_WIDTH=8,NUMWORDS=256,FILE="pci_top(4).mif",REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY=FLEX10KA] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Q0];
			23 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=1,AD_WIDTH=8,NUMWORDS=256,FILE="pci_top(5).mif",REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY=FLEX10KA] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Q0];
			25 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=1,AD_WIDTH=8,NUMWORDS=256,FILE="pci_top(6).mif",REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY=FLEX10KA] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Q0];
			27 [USE_LPM_FOR_AHDL_OPERATORS=OFF,WIDTH=1,AD_WIDTH=8,NUMWORDS=256,FILE="pci_top(7).mif",REGISTERINPUTMODE=DEFAULT,DEVICE_FAMILY=FLEX10KA] [Address0,Address1,Address2,Address3,Address4,Address5,Address6,Address7,Q0];
		}
	}
}
TREE
{
	pci_top::(0,0):(0): pci_top.v
	{
		pcicore:4:(120,0):(184,pci_core1): pcicore.v
		{
			lpm_xor:3:(648,0):(2601): lpm_xor.tdf;
			lpm_xor:2:(647,0):(2600): lpm_xor.tdf;
			lpm_xor:2:(646,0):(2599): lpm_xor.tdf;
			lpm_xor:2:(645,0):(2598): lpm_xor.tdf;
			lpm_xor:2:(644,0):(2597): lpm_xor.tdf;
			lpm_add_sub:6:(668,0):(2596): lpm_add_sub.tdf
			{
				altshift:11:(226,2):(250,oflow_ext_latency_ffs): altshift.tdf;
				altshift:11:(224,2):(242,carry_ext_latency_ffs): altshift.tdf;
				altshift:10:(222,2):(198,result_ext_latency_ffs): altshift.tdf;
				look_add:9:(216,4):(184,look_aheader): look_add.tdf;
				addcore:8:(215,9):(153,adder0): addcore.tdf;
				addcore:8:(215,9):(122,adder1): addcore.tdf;
				addcore:7:(215,9):(91,adder2): addcore.tdf;
			}
		}
	}
}