📄 pcicore.rpt
字号:
- 4 - B 13 OR2 s 0 4 0 1 ~817~13
- 4 - B 14 OR2 s 0 4 0 1 ~817~14
- 4 - B 18 OR2 s 0 4 0 1 ~817~15
- 6 - C 19 OR2 s 0 4 0 1 ~817~16
- 2 - B 14 AND2 s 0 4 0 1 ~817~17
- 3 - B 20 AND2 s 0 4 0 1 ~817~18
- 6 - A 01 OR2 ! 1 1 0 1 :882
- 8 - A 09 OR2 ! 1 1 0 1 :883
- 7 - A 09 OR2 ! 1 1 0 1 :884
- 5 - A 09 OR2 ! 1 1 0 1 :885
- 5 - B 06 OR2 ! 1 1 0 1 :886
- 2 - B 09 OR2 ! 1 1 0 1 :887
- 3 - B 08 OR2 ! 1 1 0 1 :888
- 3 - B 03 OR2 ! 1 1 0 1 :889
- 2 - B 19 OR2 ! 1 1 0 1 :890
- 5 - B 13 OR2 ! 1 1 0 1 :891
- 1 - B 19 OR2 ! 1 1 0 1 :892
- 5 - B 22 OR2 ! 1 1 0 1 :893
- 3 - B 16 OR2 ! 1 1 0 1 :894
- 2 - B 18 OR2 ! 1 1 0 1 :895
- 8 - B 16 AND2 s ! 0 4 0 14 ~928~1
- 3 - A 01 DFFE + ! 0 3 0 2 BaseAddress131 (:958)
- 4 - A 09 DFFE + ! 0 3 0 2 BaseAddress130 (:959)
- 2 - A 09 DFFE + ! 0 3 0 2 BaseAddress129 (:960)
- 3 - A 09 DFFE + ! 0 3 0 2 BaseAddress128 (:961)
- 4 - B 06 DFFE + ! 0 3 0 2 BaseAddress127 (:962)
- 5 - B 09 DFFE + ! 0 3 0 2 BaseAddress126 (:963)
- 4 - B 08 DFFE + ! 0 3 0 2 BaseAddress125 (:964)
- 2 - B 03 DFFE + ! 0 3 0 2 BaseAddress124 (:965)
- 3 - B 19 DFFE + ! 0 3 0 2 BaseAddress123 (:966)
- 6 - B 13 DFFE + ! 0 3 0 2 BaseAddress122 (:967)
- 5 - B 19 DFFE + ! 0 3 0 2 BaseAddress121 (:968)
- 1 - B 22 DFFE + ! 0 3 0 2 BaseAddress120 (:969)
- 4 - B 16 DFFE + ! 0 3 0 2 BaseAddress119 (:970)
- 3 - B 18 DFFE + ! 0 3 0 2 BaseAddress118 (:971)
- 7 - B 13 OR2 s 0 4 0 1 ~1028~1
- 3 - B 14 OR2 s 0 4 0 1 ~1028~2
- 7 - B 18 OR2 s 0 4 0 1 ~1028~3
- 1 - B 20 AND2 s 0 3 0 1 ~1028~4
- 4 - A 12 OR2 s 0 4 0 1 ~1028~5
- 8 - A 18 OR2 s 0 4 0 1 ~1028~6
- 1 - B 09 OR2 s 0 4 0 1 ~1028~7
- 1 - B 08 OR2 s 0 4 0 1 ~1028~8
- 5 - A 12 AND2 s 0 4 0 1 ~1028~9
- 8 - B 20 OR2 0 4 0 4 :1050
- 4 - A 05 AND2 0 2 0 5 :1064
- 2 - A 05 AND2 0 4 0 1 :1077
- 7 - A 04 AND2 s 0 2 0 4 ~1095~1
- 2 - A 11 AND2 s 0 4 0 1 ~1095~2
- 3 - A 04 AND2 0 3 0 4 :1095
- 7 - A 06 AND2 0 4 0 3 :1104
- 4 - A 04 AND2 0 4 0 1 :1127
- 5 - A 04 AND2 0 3 0 1 :1136
- 2 - A 06 AND2 0 4 0 2 :1145
- 8 - A 06 AND2 0 4 0 8 :1168
- 8 - A 05 OR2 ! 0 4 0 5 :1191
- 3 - A 03 WIRE s 0 0 0 1 ~1214~1
- 7 - A 07 OR2 s 0 2 0 5 ~1220~1
- 2 - A 10 AND2 s 1 2 0 1 ~1220~2
- 4 - A 14 OR2 s 4 0 0 1 ~1220~3
- 5 - A 14 OR2 s 1 3 0 1 ~1220~4
- 6 - A 14 OR2 s 0 4 0 1 ~1220~5
- 1 - A 06 OR2 s 0 4 0 1 ~1220~6
- 7 - A 14 OR2 s 1 3 0 1 ~1220~7
- 2 - A 04 OR2 s 0 3 0 2 ~1223~1
- 8 - A 04 OR2 s 0 4 0 1 ~1223~2
- 6 - A 04 AND2 s 0 3 0 1 ~1226~1
- 1 - A 03 OR2 s ! 0 4 0 1 ~1226~2
- 4 - A 08 OR2 s 1 3 0 1 ~1229~1
- 6 - A 08 OR2 s 0 4 0 1 ~1229~2
- 2 - A 14 DFFE + 0 4 0 19 PciStateMachine3 (:1233)
- 1 - A 04 DFFE + 1 3 0 19 PciStateMachine2 (:1234)
- 8 - A 03 DFFE + 0 4 0 15 PciStateMachine1 (:1235)
- 1 - A 08 DFFE + 0 4 0 16 PciStateMachine0 (:1236)
- 4 - A 06 OR2 s ! 0 4 0 1 ~1253~1
- 7 - A 03 DFFE + ! 1 2 1 0 :1256
- 2 - A 03 DFFE + ! 1 2 1 0 :1276
- 8 - A 07 OR2 s 0 2 0 7 ~1312~1
- 4 - A 03 AND2 s ! 2 2 0 1 ~1312~2
- 5 - A 03 DFFE + ! 1 2 1 0 :1314
- 1 - A 19 AND2 0 2 0 2 :1330
- 2 - A 08 OR2 s 0 4 0 2 ~1357~1
- 2 - A 19 DFFE + 0 3 0 9 PciAdOutSelect1 (:1359)
- 7 - A 19 DFFE + 0 3 0 9 PciAdOutSelect0 (:1360)
- 6 - A 24 AND2 0 3 0 11 :1398
- 5 - C 18 AND2 0 4 0 4 :1476
- 8 - A 01 AND2 0 4 0 1 :1526
- 7 - A 01 AND2 0 4 0 1 :1527
- 2 - A 24 AND2 0 4 0 1 :1528
- 6 - B 06 AND2 0 2 0 1 :1530
- 8 - B 13 AND2 0 2 0 1 :1535
- 6 - B 22 AND2 0 2 0 1 :1537
- 6 - B 16 AND2 0 2 0 1 :1538
- 5 - C 14 DFFE + ! 1 2 0 1 InterruptLine7 (:1631)
- 2 - C 17 DFFE + ! 1 2 0 1 InterruptLine6 (:1632)
- 3 - C 13 DFFE + ! 1 2 0 1 InterruptLine5 (:1633)
- 2 - C 22 DFFE + ! 1 2 0 1 InterruptLine4 (:1634)
- 1 - C 09 DFFE + ! 1 2 0 1 InterruptLine3 (:1635)
- 2 - C 06 DFFE + ! 1 2 0 1 InterruptLine2 (:1636)
- 3 - A 17 DFFE + ! 1 2 0 1 InterruptLine1 (:1637)
- 2 - A 20 DFFE + ! 1 2 0 1 InterruptLine0 (:1638)
- 7 - A 18 OR2 s 0 3 0 1 ~1720~1
- 4 - B 09 OR2 s 0 3 0 1 ~1722~1
- 1 - B 24 OR2 s 0 3 0 1 ~1722~2
- 2 - B 08 OR2 s 0 4 0 1 ~1723~1
- 6 - B 03 OR2 s 0 3 0 1 ~1724~1
- 8 - B 19 OR2 s 0 4 0 1 ~1725~1
- 8 - B 14 OR2 s 0 3 0 1 ~1727~1
- 8 - B 18 OR2 s 0 3 0 1 ~1730~1
- 5 - B 02 OR2 s 0 3 0 1 ~1740~1
- 7 - C 14 OR2 0 4 0 1 :1741
- 7 - C 17 OR2 s 0 3 0 1 ~1742~1
- 8 - C 17 OR2 0 3 0 1 :1742
- 6 - C 13 OR2 s 0 3 0 1 ~1743~1
- 8 - C 13 OR2 0 3 0 1 :1743
- 6 - C 22 OR2 s 0 3 0 1 ~1744~1
- 7 - C 22 OR2 0 3 0 1 :1744
- 4 - A 16 OR2 s 0 3 0 1 ~1747~1
- 7 - A 17 OR2 0 3 0 1 :1747
- 2 - A 16 OR2 s 0 3 0 1 ~1748~1
- 4 - A 20 OR2 s 0 3 0 1 ~1748~2
- 1 - A 01 OR2 0 4 1 1 :1813
- 2 - A 01 OR2 0 4 1 1 :1814
- 3 - A 24 OR2 0 4 1 1 :1815
- 3 - A 18 OR2 0 4 1 1 :1816
- 8 - B 06 OR2 0 4 1 1 :1817
- 4 - B 24 OR2 0 3 1 1 :1818
- 2 - B 24 OR2 0 3 1 1 :1819
- 7 - B 03 OR2 0 4 1 1 :1820
- 6 - B 24 OR2 0 3 1 1 :1821
- 2 - B 13 OR2 0 4 1 1 :1822
- 5 - B 14 OR2 0 4 1 1 :1823
- 7 - B 22 OR2 0 4 1 1 :1824
- 2 - B 16 OR2 0 4 1 1 :1825
- 1 - B 18 OR2 0 4 1 1 :1826
- 6 - A 17 AND2 s 1 2 0 32 ~1827~1
- 3 - C 19 AND2 0 3 1 1 :1827
- 4 - C 23 OR2 0 4 1 1 :1828
- 7 - B 04 AND2 0 3 1 1 :1829
- 2 - B 11 AND2 0 3 1 1 :1830
- 4 - B 21 AND2 0 3 1 1 :1831
- 4 - B 02 OR2 0 4 1 1 :1832
- 1 - B 12 AND2 0 3 1 1 :1833
- 7 - B 12 AND2 0 3 1 1 :1834
- 6 - B 10 AND2 0 3 1 1 :1835
- 1 - B 02 OR2 0 3 1 1 :1836
- 8 - B 05 DFFE + 0 3 0 1 INT_SCAN_COUNTER18 (:1882)
- 6 - B 05 DFFE + 0 2 0 1 INT_SCAN_COUNTER17 (:1883)
- 5 - B 05 DFFE + 0 1 0 2 INT_SCAN_COUNTER16 (:1884)
- 3 - B 05 DFFE + 0 3 0 1 INT_SCAN_COUNTER15 (:1885)
- 2 - B 05 DFFE + 0 2 0 2 INT_SCAN_COUNTER14 (:1886)
- 1 - B 05 DFFE + 0 1 0 3 INT_SCAN_COUNTER13 (:1887)
- 4 - C 07 DFFE + 0 3 0 1 INT_SCAN_COUNTER12 (:1888)
- 3 - C 07 DFFE + 0 2 0 2 INT_SCAN_COUNTER11 (:1889)
- 1 - C 07 DFFE + 0 1 0 3 INT_SCAN_COUNTER10 (:1890)
- 8 - C 04 DFFE + 0 3 0 1 INT_SCAN_COUNTER9 (:1891)
- 7 - C 04 DFFE + 0 2 0 2 INT_SCAN_COUNTER8 (:1892)
- 6 - C 04 DFFE + 0 1 0 3 INT_SCAN_COUNTER7 (:1893)
- 4 - C 04 DFFE + 0 3 0 1 INT_SCAN_COUNTER6 (:1894)
- 3 - C 04 DFFE + 0 2 0 2 INT_SCAN_COUNTER5 (:1895)
- 2 - C 04 DFFE ⌨️ 快捷键说明
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