📄 pci_top.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.0 9/14/2000
-- Compiled: 01/16/2005 19:05:23
-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "pci_top"
BEGIN
DEVICE = "EPF10K10ATC144-3";
"CBE_0" : INPUT_PIN = 130 ;
"CBE_1" : INPUT_PIN = 98 ;
"CBE_2" : INPUT_PIN = 88 ;
"CBE_3" : INPUT_PIN = 72 ;
"CLK" : INPUT_PIN = 55 ;
"FRAME_" : INPUT_PIN = 89 ;
"IDSEL" : INPUT_PIN = 73 ;
"IRDY_" : INPUT_PIN = 90 ;
"LocalInt_" : INPUT_PIN = 22 ;
"RESET_" : INPUT_PIN = 54 ;
"ALE" : OUTPUT_PIN = 33 ;
"AL0" : OUTPUT_PIN = 21 ;
"AL1" : OUTPUT_PIN = 20 ;
"AL2" : OUTPUT_PIN = 19 ;
"AL3" : OUTPUT_PIN = 18 ;
"AL4" : OUTPUT_PIN = 17 ;
"AL5" : OUTPUT_PIN = 13 ;
"AL6" : OUTPUT_PIN = 12 ;
"AL7" : OUTPUT_PIN = 10 ;
"CS_LED" : OUTPUT_PIN = 128 ;
"CS_SW" : OUTPUT_PIN = 122 ;
"DEVSEL_" : OUTPUT_PIN = 92 ;
"INTA_" : OUTPUT_PIN = 51 ;
"IoRD_" : OUTPUT_PIN = 36 ;
"IoWR_" : OUTPUT_PIN = 37 ;
"LocalReset_" : OUTPUT_PIN = 7 ;
"PAR" : OUTPUT_PIN = 97 ;
"P20" : OUTPUT_PIN = 32 ;
"P21" : OUTPUT_PIN = 31 ;
"P22" : OUTPUT_PIN = 30 ;
"P23" : OUTPUT_PIN = 29 ;
"P24" : OUTPUT_PIN = 28 ;
"P25" : OUTPUT_PIN = 27 ;
"P26" : OUTPUT_PIN = 26 ;
"P27" : OUTPUT_PIN = 23 ;
"RD_" : OUTPUT_PIN = 38 ;
"STOP_" : OUTPUT_PIN = 95 ;
"TRDY_" : OUTPUT_PIN = 91 ;
"WR_" : OUTPUT_PIN = 39 ;
"AD0" : BIDIR_PIN = 140 ;
"AD1" : BIDIR_PIN = 138 ;
"AD2" : BIDIR_PIN = 137 ;
"AD3" : BIDIR_PIN = 136 ;
"AD4" : BIDIR_PIN = 135 ;
"AD5" : BIDIR_PIN = 133 ;
"AD6" : BIDIR_PIN = 132 ;
"AD7" : BIDIR_PIN = 131 ;
"AD8" : BIDIR_PIN = 121 ;
"AD9" : BIDIR_PIN = 120 ;
"AD10" : BIDIR_PIN = 119 ;
"AD11" : BIDIR_PIN = 118 ;
"AD12" : BIDIR_PIN = 117 ;
"AD13" : BIDIR_PIN = 101 ;
"AD14" : BIDIR_PIN = 100 ;
"AD15" : BIDIR_PIN = 99 ;
"AD16" : BIDIR_PIN = 87 ;
"AD17" : BIDIR_PIN = 86 ;
"AD18" : BIDIR_PIN = 83 ;
"AD19" : BIDIR_PIN = 82 ;
"AD20" : BIDIR_PIN = 81 ;
"AD21" : BIDIR_PIN = 80 ;
"AD22" : BIDIR_PIN = 79 ;
"AD23" : BIDIR_PIN = 78 ;
"AD24" : BIDIR_PIN = 70 ;
"AD25" : BIDIR_PIN = 69 ;
"AD26" : BIDIR_PIN = 68 ;
"AD27" : BIDIR_PIN = 67 ;
"AD28" : BIDIR_PIN = 65 ;
"AD29" : BIDIR_PIN = 64 ;
"AD30" : BIDIR_PIN = 63 ;
"AD31" : BIDIR_PIN = 62 ;
"P00" : BIDIR_PIN = 49 ;
"P01" : BIDIR_PIN = 48 ;
"P02" : BIDIR_PIN = 47 ;
"P03" : BIDIR_PIN = 46 ;
"P04" : BIDIR_PIN = 44 ;
"P05" : BIDIR_PIN = 43 ;
"P06" : BIDIR_PIN = 42 ;
"P07" : BIDIR_PIN = 41 ;
"ALE~fit~in1" : LOCATION = LC8_B22;
"|pcicore:pci_core1|lpm_add_sub:2596|addcore:adder0|:129" : LOCATION = LC2_A12;
"|pcicore:pci_core1|lpm_add_sub:2596|addcore:adder0|:133" : LOCATION = LC1_A12;
"|pcicore:pci_core1|lpm_add_sub:2596|addcore:adder1|:125" : LOCATION = LC1_A5 ;
"|pcicore:pci_core1|lpm_add_sub:2596|addcore:adder1|:137" : LOCATION = LC2_A3 ;
"|pcicore:pci_core1|lpm_add_sub:2596|look_add:look_aheader|gpc0" : LOCATION = LC5_A5 ;
"|pcicore:pci_core1|lpm_add_sub:2596|look_add:look_aheader|:45" : LOCATION = LC4_A23;
"|pcicore:pci_core1|:122" : LOCATION = LC2_B11;
"|pcicore:pci_core1|~122~1" : LOCATION = LC7_B8 ;
"|pcicore:pci_core1|~122~2" : LOCATION = LC8_B8 ;
"|pcicore:pci_core1|:154" : LOCATION = LC3_B10;
"|pcicore:pci_core1|~154~1" : LOCATION = LC8_B6 ;
"|pcicore:pci_core1|~154~2" : LOCATION = LC8_B10;
"|pcicore:pci_core1|:163" : LOCATION = LC3_B5 ; -- |pcicore:pci_core1|PciCycleBeginClear_
"|pcicore:pci_core1|:164" : LOCATION = LC6_B5 ;
"|pcicore:pci_core1|:167" : LOCATION = LC4_B5 ; -- |pcicore:pci_core1|PciCycleBegin
"|pcicore:pci_core1|~167~1" : LOCATION = LC7_B3 ; -- |pcicore:pci_core1|PciCycleBegin~1
"|pcicore:pci_core1|:187" : LOCATION = LC8_B2 ;
"|pcicore:pci_core1|:195" : LOCATION = LC7_C11; -- |pcicore:pci_core1|PciAdressReg31
"|pcicore:pci_core1|:196" : LOCATION = LC6_C14; -- |pcicore:pci_core1|PciAdressReg30
"|pcicore:pci_core1|:197" : LOCATION = LC3_C9 ; -- |pcicore:pci_core1|PciAdressReg29
"|pcicore:pci_core1|:198" : LOCATION = LC1_C10; -- |pcicore:pci_core1|PciAdressReg28
"|pcicore:pci_core1|:199" : LOCATION = LC5_C7 ; -- |pcicore:pci_core1|PciAdressReg27
"|pcicore:pci_core1|:200" : LOCATION = LC8_C8 ; -- |pcicore:pci_core1|PciAdressReg26
"|pcicore:pci_core1|:201" : LOCATION = LC6_C6 ; -- |pcicore:pci_core1|PciAdressReg25
"|pcicore:pci_core1|:202" : LOCATION = LC8_C5 ; -- |pcicore:pci_core1|PciAdressReg24
"|pcicore:pci_core1|:203" : LOCATION = LC6_C24; -- |pcicore:pci_core1|PciAdressReg23
"|pcicore:pci_core1|:204" : LOCATION = LC3_C22; -- |pcicore:pci_core1|PciAdressReg22
"|pcicore:pci_core1|:205" : LOCATION = LC3_C14; -- |pcicore:pci_core1|PciAdressReg21
"|pcicore:pci_core1|:206" : LOCATION = LC6_C20; -- |pcicore:pci_core1|PciAdressReg20
"|pcicore:pci_core1|:207" : LOCATION = LC3_C13; -- |pcicore:pci_core1|PciAdressReg19
"|pcicore:pci_core1|:208" : LOCATION = LC6_C23; -- |pcicore:pci_core1|PciAdressReg18
"|pcicore:pci_core1|:209" : LOCATION = LC7_C13; -- |pcicore:pci_core1|PciAdressReg17
"|pcicore:pci_core1|:210" : LOCATION = LC4_C4 ; -- |pcicore:pci_core1|PciAdressReg16
"|pcicore:pci_core1|:211" : LOCATION = LC2_A1 ; -- |pcicore:pci_core1|PciAdressReg15
"|pcicore:pci_core1|:212" : LOCATION = LC3_A1 ; -- |pcicore:pci_core1|PciAdressReg14
"|pcicore:pci_core1|:213" : LOCATION = LC4_A9 ; -- |pcicore:pci_core1|PciAdressReg13
"|pcicore:pci_core1|:214" : LOCATION = LC5_A9 ; -- |pcicore:pci_core1|PciAdressReg12
"|pcicore:pci_core1|:215" : LOCATION = LC6_C13; -- |pcicore:pci_core1|PciAdressReg11
"|pcicore:pci_core1|:216" : LOCATION = LC7_B10; -- |pcicore:pci_core1|PciAdressReg10
"|pcicore:pci_core1|:217" : LOCATION = LC3_A10; -- |pcicore:pci_core1|PciAdressReg9
"|pcicore:pci_core1|:218" : LOCATION = LC6_B10; -- |pcicore:pci_core1|PciAdressReg8
"|pcicore:pci_core1|:219" : LOCATION = LC7_A20; -- |pcicore:pci_core1|PciAdressReg7
"|pcicore:pci_core1|:220" : LOCATION = LC4_A18; -- |pcicore:pci_core1|PciAdressReg6
"|pcicore:pci_core1|:221" : LOCATION = LC2_A18; -- |pcicore:pci_core1|PciAdressReg5
"|pcicore:pci_core1|:222" : LOCATION = LC3_A18; -- |pcicore:pci_core1|PciAdressReg4
"|pcicore:pci_core1|:223" : LOCATION = LC4_B20; -- |pcicore:pci_core1|PciAdressReg3
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