📄 pci_top.rpt
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- 7 - A 24 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~6
- 1 - A 24 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~7
- 8 - A 01 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~8
- 6 - A 09 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~9
- 8 - A 07 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~10
- 6 - A 10 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~11
- 3 - C 02 AND2 s 0 4 0 1 |pcicore:pci_core1|~817~12
- 8 - C 24 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~13
- 7 - C 20 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~14
- 5 - C 18 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~15
- 3 - C 04 OR2 s 0 4 0 1 |pcicore:pci_core1|~817~16
- 4 - C 02 AND2 s 0 4 0 1 |pcicore:pci_core1|~817~17
- 1 - C 02 AND2 0 4 0 6 |pcicore:pci_core1|:817
- 8 - A 24 OR2 ! 0 2 0 1 |pcicore:pci_core1|:822
- 6 - B 17 OR2 s ! 0 4 0 42 |pcicore:pci_core1|~928~1
- 1 - C 11 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~928~2
- 3 - C 12 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~929~1
- 7 - C 01 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~930~1
- 5 - C 10 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~931~1
- 4 - C 07 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~932~1
- 5 - C 08 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~933~1
- 2 - C 06 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~934~1
- 5 - C 05 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~935~1
- 2 - C 24 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~936~1
- 2 - C 22 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~937~1
- 4 - C 14 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~938~1
- 3 - C 15 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~939~1
- 1 - C 18 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~940~1
- 3 - C 23 OR2 s ! 0 4 0 1 |pcicore:pci_core1|~941~1
- 6 - C 11 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress131 (|pcicore:pci_core1|:958)
- 6 - C 12 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress130 (|pcicore:pci_core1|:959)
- 1 - C 01 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress129 (|pcicore:pci_core1|:960)
- 8 - C 10 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress128 (|pcicore:pci_core1|:961)
- 3 - C 07 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress127 (|pcicore:pci_core1|:962)
- 7 - C 08 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress126 (|pcicore:pci_core1|:963)
- 5 - C 06 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress125 (|pcicore:pci_core1|:964)
- 2 - C 05 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress124 (|pcicore:pci_core1|:965)
- 5 - C 24 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress123 (|pcicore:pci_core1|:966)
- 1 - C 22 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress122 (|pcicore:pci_core1|:967)
- 2 - C 14 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress121 (|pcicore:pci_core1|:968)
- 2 - C 15 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress120 (|pcicore:pci_core1|:969)
- 6 - C 18 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress119 (|pcicore:pci_core1|:970)
- 7 - C 23 DFFE + ! 0 4 0 3 |pcicore:pci_core1|BaseAddress118 (|pcicore:pci_core1|:971)
- 1 - C 24 OR2 s 0 4 0 1 |pcicore:pci_core1|~1028~1
- 8 - C 20 OR2 s 0 4 0 1 |pcicore:pci_core1|~1028~2
- 4 - C 18 OR2 s 0 4 0 1 |pcicore:pci_core1|~1028~3
- 1 - C 12 OR2 s 0 4 0 1 |pcicore:pci_core1|~1028~4
- 2 - C 09 OR2 s 0 4 0 1 |pcicore:pci_core1|~1028~5
- 6 - C 08 OR2 s 0 4 0 1 |pcicore:pci_core1|~1028~6
- 8 - C 06 OR2 s 0 4 0 1 |pcicore:pci_core1|~1028~7
- 1 - C 16 AND2 s 0 4 0 1 |pcicore:pci_core1|~1028~8
- 6 - C 16 AND2 0 4 0 6 |pcicore:pci_core1|:1028
- 2 - B 07 AND2 ! 0 2 0 2 |pcicore:pci_core1|:1050
- 5 - B 07 OR2 0 3 0 2 |pcicore:pci_core1|:1064
- 3 - B 22 AND2 0 4 0 1 |pcicore:pci_core1|:1077
- 3 - B 09 AND2 0 4 0 2 |pcicore:pci_core1|:1095
- 1 - B 04 AND2 0 4 0 2 |pcicore:pci_core1|:1104
- 4 - B 11 AND2 0 4 0 9 |pcicore:pci_core1|:1168
- 6 - B 11 AND2 1 1 0 1 |pcicore:pci_core1|:1190
- 2 - B 22 OR2 ! 0 4 0 1 |pcicore:pci_core1|:1191
- 1 - B 02 AND2 s 1 2 0 1 |pcicore:pci_core1|~1220~1
- 4 - B 06 OR2 s 4 0 0 1 |pcicore:pci_core1|~1220~2
- 8 - B 03 OR2 s 1 2 0 1 |pcicore:pci_core1|~1220~3
- 2 - B 03 OR2 s 0 4 0 1 |pcicore:pci_core1|~1220~4
- 7 - B 01 OR2 s 0 4 0 1 |pcicore:pci_core1|~1220~5
- 2 - B 04 OR2 s 0 4 0 4 |pcicore:pci_core1|~1220~6
- 6 - B 04 OR2 s 1 2 0 1 |pcicore:pci_core1|~1220~7
- 1 - B 01 OR2 s 0 4 0 1 |pcicore:pci_core1|~1223~1
- 3 - B 01 OR2 s 0 4 0 2 |pcicore:pci_core1|~1223~2
- 6 - B 01 OR2 s 0 4 0 1 |pcicore:pci_core1|~1223~3
- 3 - B 04 OR2 s 0 4 0 1 |pcicore:pci_core1|~1223~4
- 8 - B 11 OR2 s 0 4 0 1 |pcicore:pci_core1|~1229~1
- 2 - B 01 DFFE + 0 4 0 22 |pcicore:pci_core1|PciStateMachine3 (|pcicore:pci_core1|:1233)
- 8 - B 01 DFFE + 1 3 0 22 |pcicore:pci_core1|PciStateMachine2 (|pcicore:pci_core1|:1234)
- 1 - B 11 DFFE + 0 3 0 20 |pcicore:pci_core1|PciStateMachine1 (|pcicore:pci_core1|:1235)
- 5 - B 11 DFFE + 0 4 0 22 |pcicore:pci_core1|PciStateMachine0 (|pcicore:pci_core1|:1236)
- 1 - B 05 DFFE + ! 1 2 1 0 |pcicore:pci_core1|:1256
- 2 - B 05 DFFE + ! 1 2 1 0 |pcicore:pci_core1|:1276
- 3 - B 11 OR2 s ! 0 4 0 5 |pcicore:pci_core1|~1312~1
- 7 - B 05 AND2 s ! 2 2 0 1 |pcicore:pci_core1|~1312~2
- 8 - B 05 DFFE + ! 1 2 1 0 |pcicore:pci_core1|:1314
- 5 - B 12 AND2 0 3 0 2 |pcicore:pci_core1|:1330
- 4 - B 07 OR2 s 0 4 0 2 |pcicore:pci_core1|~1357~1
- 3 - B 07 DFFE + 0 3 0 9 |pcicore:pci_core1|PciAdOutSelect1 (|pcicore:pci_core1|:1359)
- 7 - B 07 DFFE + 0 3 0 9 |pcicore:pci_core1|PciAdOutSelect0 (|pcicore:pci_core1|:1360)
- 3 - A 06 AND2 0 3 0 3 |pcicore:pci_core1|:1398
- 3 - A 24 AND2 s 0 3 0 2 |pcicore:pci_core1|~1437~1
- 2 - A 24 AND2 s 0 4 0 22 |pcicore:pci_core1|~1437~2
- 2 - B 17 OR2 ! 0 3 0 4 |pcicore:pci_core1|:1437
- 6 - A 24 AND2 0 4 0 4 |pcicore:pci_core1|:1476
- 4 - A 24 AND2 0 4 0 97 |pcicore:pci_core1|:1515
- 4 - C 08 AND2 0 2 0 1 |pcicore:pci_core1|:1531
- 4 - C 06 AND2 0 2 0 1 |pcicore:pci_core1|:1532
- 4 - C 24 AND2 0 2 0 1 |pcicore:pci_core1|:1534
- 2 - C 11 AND2 0 4 0 1 |pcicore:pci_core1|:1565
- 5 - C 12 AND2 0 4 0 1 |pcicore:pci_core1|:1566
- 1 - C 09 AND2 0 4 0 1 |pcicore:pci_core1|:1567
- 6 - C 07 AND2 0 4 0 1 |pcicore:pci_core1|:1569
- 3 - C 06 AND2 0 4 0 1 |pcicore:pci_core1|:1571
- 3 - C 24 AND2 0 4 0 1 |pcicore:pci_core1|:1573
- 5 - C 22 AND2 0 4 0 1 |pcicore:pci_core1|:1574
- 3 - C 20 AND2 0 4 0 1 |pcicore:pci_core1|:1576
- 3 - C 18 AND2 0 4 0 1 |pcicore:pci_core1|:1577
- 5 - A 24 AND2 s 0 4 0 4 |pcicore:pci_core1|~1597~1
- 5 - B 17 AND2 0 3 0 16 |pcicore:pci_core1|:1597
- 6 - A 15 DFFE + ! 0 3 0 1 |pcicore:pci_core1|InterruptLine7 (|pcicore:pci_core1|:1631)
- 5 - A 06 DFFE + ! 0 3 0 1 |pcicore:pci_core1|InterruptLine6 (|pcicore:pci_core1|:1632)
- 7 - B 17 DFFE + ! 0 3 0 1 |pcicore:pci_core1|InterruptLine5 (|pcicore:pci_core1|:1633)
- 8 - A 17 DFFE + ! 0 3 0 1 |pcicore:pci_core1|InterruptLine4 (|pcicore:pci_core1|:1634)
- 5 - B 20 DFFE + ! 0 3 0 1 |pcicore:pci_core1|InterruptLine3 (|pcicore:pci_core1|:1635)
- 7 - B 19 DFFE + ! 0 3 0 1 |pcicore:pci_core1|InterruptLine2 (|pcicore:pci_core1|:1636)
- 4 - A 19 DFFE + ! 0 3 0 1 |pcicore:pci_core1|InterruptLine1 (|pcicore:pci_core1|:1637)
- 7 - A 22 DFFE + ! 0 3 0 1 |pcicore:pci_core1|InterruptLine0 (|pcicore:pci_core1|:1638)
- 4 - A 06 AND2 0 4 0 1 |pcicore:pci_core1|:1672
- 4 - A 22 AND2 0 4 0 1 |pcicore:pci_core1|:1678
- 3 - C 10 OR2 s 0 4 0 1 |pcicore:pci_core1|~1720~1
- 2 - C 08 OR2 s 0 4 0 1 |pcicore:pci_core1|~1722~1
- 3 - C 05 OR2 s 0 4 0 1 |pcicore:pci_core1|~1724~1
- 1 - C 20 OR2 s 0 4 0 1 |pcicore:pci_core1|~1727~1
- 2 - C 23 OR2 s 0 4 0 1 |pcicore:pci_core1|~1730~1
- 1 - B 10 OR2 s 0 4 0 1 |pcicore:pci_core1|~1740~1
- 3 - A 15 OR2 0 4 0 1 |pcicore:pci_core1|:1741
- 2 - A 06 OR2 0 4 0 1 |pcicore:pci_core1|:1742
- 1 - B 17 OR2 s 0 4 0 1 |pcicore:pci_core1|~1743~1
- 4 - B 17 OR2 0 3 0 1 |pcicore:pci_core1|:1743
- 3 - A 17 OR2 s 0 4 0 1 |pcicore:pci_core1|~1744~1
- 4 - A 17 OR2 0 3 0 1 |pcicore:pci_core1|:1744
- 2 - A 19 OR2 s 0 4 0 1 |pcicore:pci_core1|~1747~1
- 3 - A 19 OR2 0 3 0 2 |pcicore:pci_core1|:1747
- 1 - A 19 OR2 s 0 4 0 1 |pcicore:pci_core1|~1748~1
- 4 - C 11 OR2 0 4 1 1 |pcicore:pci_core1|:1813
- 4 - C 12 OR2 0 4 1 1 |pcicore:pci_core1|:1814
- 4 - C 09 OR2 0 4 1 1 |pcicore:pci_core1|:1815
- 4 - C 10 OR2 0 4 1 1 |pcicore:pci_core1|:1816
- 2 - C 07 OR2 0 4 1 1 |pcicore:pci_core1|:1817
- 1 - C 08 OR2 0 4 1 1 |pcicore:pci_core1|:1818
- 1 - C 06 OR2 0 4 1 1 |pcicore:pci_core1|:1819
- 1 - C 05 OR2 0 4 1 1 |pcicore:pci_core1|:1820
- 7 - C 24 OR2 0 4 1 1 |pcicore:pci_core1|:1821
- 8 - C 22 OR2 0 4 1 1 |pcicore:pci_core1|:1822
- 4 - C 20 OR2 0 4 1 1 |pcicore:pci_core1|:1823
- 2 - C 20 OR2 0 4 1 1 |pcicore:pci_core1|:1824
- 2 - C 18 OR2 0 4 1 1 |pcicore:pci_core1|:1825
- 1 - C 23 OR2 0 4 1 1 |pcicore:pci_core1|:1826
- 7 - C 04 AND2 0 3 1 0 |pcicore:pci_core1|:1827
- 7 - A 06 OR2 0 4 1 1 |pcicore:pci_core1|:1828
- 4 - A 01 AND2 0 3 1 0 |pcicore:pci_core1|:1829
- 3 - A 07 AND2 0 3 1 1 |pcicore:pci_core1|:1830
- 2 - A 09 AND2 0 3 1 1 |pcicore:pci_core1|:1831
- 1 - A 06 OR2 0 4 1 1 |pcicore:pci_core1|:1832
- 1 - A 07 AND2 0 3 1 1 |pcicore:pci_core1|:1833
- 5 - A 07 AND2 0 3 1 1 |pcicore:pci_core1|:1834
- 7 - A 10 AND2 0 3 1 1 |pcicore:pci_core1|:1835
- 4 - B 10 OR2 0 3 1 1 |pcicore:pci_core1|:1836
- 8 - B 19 AND2 s 1 2 0 34 |pcicore:pci_core1|~1844~1
- 6 - A 22 OR2 0 4 0 2 |pcicore:pci_core1|:1844
- 6 - A 23 DFFE + 0 3 0 1 |pcicore:pci_core1|INT_SCAN_COUNTER18 (|pcicore:pci_core1|:1882)
- 5 - A 23 DFFE + 0 2 0 1 |pcicore:pci_core1|INT_SCAN_COUNTER17 (|pcicore:pci_core1|:1883)
- 3 - A 23 DFFE + 0 3 0 2 |pcicore:pci_core1|INT_SCAN_COUNTER16 (|pcicore:pci_core1|:1884)
- 2 - A 23 DFFE + 0 2 0 2 |pcicore:pci_core1|INT_SCAN_COUNTER15 (|pcicore:pci_core1|:1885)
- 1 - A 23 DFFE + 0 1 0 3 |pcicore:pci_core1|INT_SCAN_COUNTER14 (|pcicore:pci_core1|:1886)
- 4 - A 03 DFFE + 0 3 0 1 |pcicore:pci_core1|INT_SCAN_COUNTER13 (|pcicore:pci_core1|:1887)
- 3 - A 03 DFFE + 0 2 0 2 |pcicore:pci_core1|INT_SCAN_COUNTER12 (|pcicore:pci_core1|:1888)
- 1 - A 03 DFFE + 0 1 0 3 |pcicore:pci_core1|INT_SCAN_COUNTER11 (|pcicore:pci_core1|:1889)
- 8 - A 05 ⌨️ 快捷键说明
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