q1_15_mulr.s43

msp430F437三相电表DEMO(编译器 IAR 3.42A）

//--------------------------------------------------------------------------
//
//  Software for MSP430 based e-meters.
//
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//
//  File: q1_15_mulr.c
//
//  Steve Underwood <[e-mail]>
//  Texas Instruments Hong Kong Ltd.
//
//  $Id: q1_15_mulr.c,v 1.2 2003/07/28 09:48:22 XHKJAMES Exp $
//
//--------------------------------------------------------------------------
#include "io.h"

//Q1.15 style 16x16=>16 multiply with half bit rounding of the result.
;int16_t Q1_15_mulr(register int16_t x, register int16_t y)
    public Q1_15_mulr

    RSEG CODE
Q1_15_mulr
#if defined(RESLO_)  &&  defined(RESHI_)  &&  defined(MPYS_)  &&  defined(OP2_)
    push.w  SR
    dint
    mov     R12,&MPYS_
    mov     R14,&OP2_
    mov     &RESHI_,R13
    mov     &RESLO_,R12
    pop.w   SR
    //Half bit round at the Q1.15 level
    add     #4000h,R12
    addc    #0,R13
    //Shift to Q1.15 format (i.e. the top 16 bits are returned)
    rla     R12
    rlc     R13
    mov     R13,R12
#if defined(__MSP430_HAS_MSP430X_CPU__)
    reta
#else
    ret
#endif
#else
    push.w R10
    push.w R15
    mov     R12,R15
    clr     R13
    mov     R13,R12

    mov     R13,R10
    tst     R15
    jge     booth_2
    mov     #-1,R10
    jmp     booth_2

booth_6
    add     R15,R12
    addc    R10,R13
booth_1
    rla     R15
    rlc     R10
booth_2
    rra     R14
    jc      booth_5
    jne     booth_1
    jmp     booth_4

booth_5
    sub     R15,R12
    subc    R10,R13
booth_3
    rla     R15
    rlc     R10
    rra     R14
    jnc     booth_6
    cmp     #0xFFFF,R14
    jne     booth_3

booth_4
    //Half bit round at the Q1.15 level
    add     #4000h,R12
    addc    #0,R13
    //Shift to Q1.15 format (i.e. the top 16 bits are returned)
    rla     R12
    rlc     R13
    mov     R13,R12
    pop.w   R15
    pop.w   R10
#if defined(__MSP430_HAS_MSP430X_CPU__)
    reta
#else
    ret
#endif
#endif
    end







#if defined(RESLO_)  &&  defined(RESHI_)  &&  defined(MPYS_)  &&  defined(OP2_)
    /$
        push.w  SR
        dint
        mov     @x,&MPYS_
        mov     @y,&OP2_
        mov     &RESHI_,@z.0
        mov     &RESLO_,@z.1
        pop.w   SR
        //Half bit round at the Q1.15 level
        add     #4000h,@z.1
        addc    #0,@z.0
        //Shift to Q1.15 format (i.e. the top 16 bits are returned)
        rla     @z.1
        rlc     @z.0
        mov     @z.0,@x1
    $/
#else
    /$
        clr     @z.0
        mov     @z.0,@z.1
        mov     @z.0,@x1
        tst     @x
        jge     xbooth_2
        mov     #-1,@x1
        jmp     xbooth_2

xbooth_6
        add     @x,@z.1
        addc    @x1,@z.0
xbooth_1
        rla     @x
        rlc     @x1
xbooth_2
        rra     @y
        jc      xbooth_5
        jne     xbooth_1
        jmp     xbooth_4

xbooth_5
        sub     @x,@z.1
        subc    @x1,@z.0
xbooth_3
        rla     @x
        rlc     @x1
        rra     @y
        jnc     xbooth_6
        cmp     #0xFFFF,@y
        jne     xbooth_3

xbooth_4
        //Half bit round at the Q1.15 level
        add     #0x4000,@z.1
        addc    #0,@z.0
        //Shift to Q1.15 format (i.e. the top 16 bits are returned)
        rla     @z.1
        rlc     @z.0
        mov     @z.0,@x1
    $/
#endif
#elif defined(__IAR_SYSTEMS_ICC__)
#if defined(RESLO_)  &&  defined(RESHI_)  &&  defined(MPYS_)  &&  defined(OP2_)
        istate_t s;
        
        s = __get_interrupt_state();
        __disable_interrupt();
        MPYS = x;
        OP2 = y;
        z = ((int32_t) RESHI << 16);
        z |= RESLO;
        z += 0x4000;
        __set_interrupt_state(s);
        //Shift to Q1.15 format (i.e. the top 16 bits are returned)
        z <<= 1;
        x1 = z >> 16;
#else
    z = (int32_t) x*(int32_t) y;
    z += 0x4000;
    x1 = (z >> 15);
#endif
#else
    z = (int32_t) x*(int32_t) y;
    z += 0x4000;
    x1 = (z >> 15);
#endif
    return x1;
}