📄 44binit.s
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;**************************************************************************
;NAME: 44Binit.S
;copyright:wzz at Qingdao University 2008
;**************************************************************************
;Include Header File
;==============================================================
GET inc\SFRCFG.s ;Define constant,pseduo-vari..
GET src\MACROLIB.s ;Define macro
;==============================================================
IMPORT UserStack
IMPORT SVCStack
IMPORT UndefStack
IMPORT IRQStack
IMPORT AbortStack
IMPORT FIQStack
;***************************************************************
;==============================================================
AREA Init,CODE,READONLY
IMPORT __use_no_semihosting_swi
ENTRY
;=================================================================
;IVT Interrupt Vector Table
;Description:Branch to Distribut MACRO
;---------------------------------------------------------
b ResetHandler ;0x00000000 Goto Reset routine
b HandlerUndef ;0x00000004 MACRO handerUndef
b HandlerSWI ;0x00000008
b HandlerPabort ;0x0000000C handlerPAbort
b HandlerDabort ;0x00000010 handlerDAbort
b . ;0x00000014 handlerReserved means
b HandlerIRQ ;0x00000018
b HandlerFIQ ;0x0000001C
;---------------------------------------------------------------
VECTOR_BRANCH
ldr pc,=HandlerEINT0 ;mGA H/W interruupt vector
ldr pc,=HandlerEINT1
ldr pc,=HandlerEINT2
ldr pc,=HandlerEINT3
ldr pc,=HandlerEINT4567
ldr pc,=HandlerTICK ;mGA
b .
b .
ldr pc,=HandlerZDMA0 ;mGB
ldr pc,=HandlerZDMA1
ldr pc,=HandlerBDMA0
ldr pc,=HandlerBDMA1
ldr pc,=HandlerWDT
ldr pc,=HandlerUERR01 ;mGB
b .
b .
ldr pc,=HandlerTIMER0 ;mGC
ldr pc,=HandlerTIMER1
ldr pc,=HandlerTIMER2
ldr pc,=HandlerTIMER3
ldr pc,=HandlerTIMER4
ldr pc,=HandlerTIMER5 ;mGC
b .
b .
ldr pc,=HandlerURXD0 ;mGD
ldr pc,=HandlerURXD1
ldr pc,=HandlerIIC
ldr pc,=HandlerSIO
ldr pc,=HandlerUTXD0
ldr pc,=HandlerUTXD1 ;mGD
b .
b .
ldr pc,=HandlerRTC ;mGKA
b .
b .
b .
b .
b . ;mGKA
b .
b .
ldr pc,=HandlerADC ;mGKB
b .
b .
b .
b .
b . ;mGKB
b .
b .
; ldr pc,=EnterPWDN ;0xe0=EnterPWDN
;--------------------------------------------------
LTORG ;Literal Pool for LDR
;==============================
;Distribute Routine,Using MACRO HANDLER
;---------------------------------------------------------------
;INTDISTIBUTE
HandlerFIQ HANDLER HandleFIQ
HandlerIRQ HANDLER HandleIRQ
HandlerUndef HANDLER HandleUndef
HandlerSWI HANDLER HandleSWI
HandlerDabort HANDLER HandleDabort
HandlerPabort HANDLER HandlePabort
;------------------------------------------------------------------
HandlerADC HANDLER HandleADC
HandlerRTC HANDLER HandleRTC
;------------------------------------------------------------------
HandlerUTXD1 HANDLER HandleUTXD1
HandlerUTXD0 HANDLER HandleUTXD0
HandlerSIO HANDLER HandleSIO
HandlerIIC HANDLER HandleIIC
HandlerURXD1 HANDLER HandleURXD1
HandlerURXD0 HANDLER HandleURXD0
;------------------------------------------------------------------
HandlerTIMER5 HANDLER HandleTIMER5
HandlerTIMER4 HANDLER HandleTIMER4
HandlerTIMER3 HANDLER HandleTIMER3
HandlerTIMER2 HANDLER HandleTIMER2
HandlerTIMER1 HANDLER HandleTIMER1
HandlerTIMER0 HANDLER HandleTIMER0
;------------------------------------------------------------------
HandlerUERR01 HANDLER HandleUERR01
HandlerWDT HANDLER HandleWDT
HandlerBDMA1 HANDLER HandleBDMA1
HandlerBDMA0 HANDLER HandleBDMA0
HandlerZDMA1 HANDLER HandleZDMA1
HandlerZDMA0 HANDLER HandleZDMA0
;------------------------------------------------------------------
HandlerTICK HANDLER HandleTICK
HandlerEINT4567 HANDLER HandleEINT4567
HandlerEINT3 HANDLER HandleEINT3
HandlerEINT2 HANDLER HandleEINT2
HandlerEINT1 HANDLER HandleEINT1
HandlerEINT0 HANDLER HandleEINT0
;=======================================================================
;deal with IRQ interrupt
IRQ_Handler
IMPORT ISR_IrqHandler
STMFD sp!, {r0-r12, lr}
BL ISR_IrqHandler
LDMFD sp!, {r0-r12, lr}
SUBS pc, lr, #4
EXPORT IRQ_Handler
;One of the following two routines can be used for non-vectored interrupt.
;******************************************************************
;non-vectored interrupt:
;I_ISPR IRQ interrupt service pending register
;(Only one service bit can be set)
;------------------------------------------------------------------
IsrIRQ
sub sp,sp,#4;save for pc
stmfd sp!,{r8-r9}
;IMPRORTANT CAUTION I_ISPC isnt used properly
ldr r9,=aI_ISPR
ldr r9,[r9]
cmp r9,#0x0
beq %F2
mov r8,#0x00
0
mov r9,r9,lsr #1
bcs %F1
add r8,r8,#4
b %B0
1
ldr r9,=HandleADC
add r9,r9,r8
ldr r9,[r9]
str r9,[sp,#8]
ldmfd sp!,{r8-r9,pc}
2
ldmfd sp!,{r8-r9}
add sp,sp,#4
subs pc,lr,#4
;******************************************************************
;* ResetHandler
;******************************************************************
ResetHandler
; mrs r0,cpsr ;currunt CSR
; mov r1,r0 ;make a copy for maskir
; orr r1,r1,#0xc0 ;mask off int bits
; msr CPSR_fsxc,r1 ;disable ints (IRQ and FIQ)
; msr CPSR_c,r1
;------------------------------------------------
;Watch dog disable
;------------------------------------------------
ldr r0,=aWTCON
ldr r1,=0x0
str r1,[r0]
;------------------------------------------------
ldr r0,=aINTMSK ;GET INTMSK
ldr r1,=cINTMSK_Reset ;all interrupt disable
str r1,[r0]
;------------------------------------------------
;clock control
ldr r0,=aLOCKTIME
ldr r1,=cLOCKTIME
str r1,[r0]
ldr r0,=aPLLCON
ldr r1,=cPLLCON
str r1,[r0]
ldr r0,=aCLKCON
ldr r1,=cCLKCON
str r1,[r0]
;------------------------------------------------
;BDMA
;------------------------------------------------
;MEMORY control
;------------------------------------------------
LDR r0, =SMRDATA
LDMIA r0, {r1-r13}
LDR r0, =0x01c80000 ; BWSCON Address
STMIA r0, {r1-r13}
;------------------------------------------------
;GPIO control
;------------------------------------------------
;------------------------------------------------
;Initialize stacks
;------------------------------------------------
ldr sp,=SVCStack
bl InitStacks
;=====================================================
;IRQ handler
;=====================================================
ldr r0,=HandleIRQ ;Get IVT pointer
ldr r1,=IRQ_Handler ;using I_ISPR register
str r1,[r0]
;***************************************************************
IMPORT __main
B __main ;Dont use main() because ......
B .
;*********************************
InitStacks
mrs r0,cpsr
bic r0,r0,#MODEMASK
orr r1,r0,#UNDEFMODE|NOINT
msr cpsr_cxsf,r1 ;UndefMode
ldr sp,=UndefStack
orr r1,r0,#ABORTMODE|NOINT
msr cpsr_cxsf,r1 ;AbortMode
ldr sp,=AbortStack
orr r1,r0,#IRQMODE|NOINT
msr cpsr_cxsf,r1 ;IRQMode
ldr sp,=IRQStack
orr r1,r0,#FIQMODE|NOINT
msr cpsr_cxsf,r1 ;FIQMode
ldr sp,=FIQStack
bic r0,r0,#MODEMASK|NOINT
orr r1,r0,#SVCMODE
msr cpsr_cxsf,r1 ;SVCMode
ldr sp,=SVCStack
;USER mode is not initialized.
mov pc,lr ;The LR register may be not valid for the mode changes.
LTORG
;*************************************************************
SMRDATA DATA
;--------------------------------------------------------------------------------------------------
DCD cBWSCON16
;--------------------------------------------------------------------------------------------------
DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Toch<<6)+(B0_Tcah<<4)+(B0_Tpac<<2)+B0_PMC); GCS0
DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Toch<<6)+(B1_Tcah<<4)+(B1_Tpac<<2)+B1_PMC); GCS1
DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Toch<<6)+(B2_Tcah<<4)+(B2_Tpac<<2)+B2_PMC); GCS2
DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Toch<<6)+(B3_Tcah<<4)+(B3_Tpac<<2)+B3_PMC); GCS3
DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Toch<<6)+(B4_Tcah<<4)+(B4_Tpac<<2)+B4_PMC); GCS4
DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Toch<<6)+(B5_Tcah<<4)+(B5_Tpac<<2)+B5_PMC); GCS5
;--------------------------------------------------------------------------------------------------
DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN)) ;GCS6
DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN)) ;GCS7
;--------------------------------------------------------------------------------------------------
DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT) ;REFRESH RFEN=1, TREFMD=0, trp=3clk, trc=5clk, tchr=3clk,count=1019
DCD 0x10 ;SCLK power mode, BANKSIZE 32M/32M
DCD 0x20 ;MRSR6 CL=2clk
DCD 0x20 ;MRSR7
;--------------------------------------------------------------------------------------------------
ALIGN
IMPORT HandleReset
IMPORT HandleUndef
IMPORT HandleSWI
IMPORT HandlePabort
IMPORT HandleDabort
IMPORT HandleReserved
IMPORT HandleIRQ
IMPORT HandleFIQ
IMPORT HandleADC
IMPORT HandleRTC
IMPORT HandleUTXD1
IMPORT HandleUTXD0
IMPORT HandleSIO
IMPORT HandleIIC
IMPORT HandleURXD1
IMPORT HandleURXD0
IMPORT HandleTIMER5
IMPORT HandleTIMER4
IMPORT HandleTIMER3
IMPORT HandleTIMER2
IMPORT HandleTIMER1
IMPORT HandleTIMER0
IMPORT HandleUERR01
IMPORT HandleWDT
IMPORT HandleBDMA1
IMPORT HandleBDMA0
IMPORT HandleZDMA1
IMPORT HandleZDMA0
IMPORT HandleTICK
IMPORT HandleEINT4567
IMPORT HandleEINT3
IMPORT HandleEINT2
IMPORT HandleEINT1
IMPORT HandleEINT0
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