arm_gen.cpp

這是一個arm模擬器 以C++實做 主要模擬ARM9架構

}

char *emitc_mvnis_rot_mode1_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(rslt32=(%u>>(%u<<1))|(%u<<(32-(%u<<1))), carry=BIT31(rslt32), rslt32);\n"
	"	if (%u==15)\n"
	"		WRITE_CPSR(SPSR);\n"
	"	else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&255, (inst>>8)&15, (inst>>0)&255, (inst>>8)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvn_lsl_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~(READ_REG(%u)<<%u));\n"
	"", (inst>>12)&15, (inst>>0)&15, (inst>>7)&31);
	return buf;

}

char *emitc_mvn_zero_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~0);\n"
	"", (inst>>12)&15);
	return buf;

}

char *emitc_mvn_lsr_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~(READ_REG(%u)>>%u));\n"
	"", (inst>>12)&15, (inst>>0)&15, (inst>>7)&31);
	return buf;

}

char *emitc_mvn_sign_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~(BIT31(READ_REG(%u))?~0:0));\n"
	"", (inst>>12)&15, (inst>>0)&15);
	return buf;

}

char *emitc_mvn_asr_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~((int32_t)(READ_REG(%u))>>%u));\n"
	"", (inst>>12)&15, (inst>>0)&15, (inst>>7)&31);
	return buf;

}

char *emitc_mvn_rrx_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~((READ_REG(%u)>>1)|(C_FLAG<<31)));\n"
	"", (inst>>12)&15, (inst>>0)&15);
	return buf;

}

char *emitc_mvn_ror_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~(val32=READ_REG(%u), (val32>>%u)|(val32<<(32-%u))));\n"
	"", (inst>>12)&15, (inst>>0)&15, (inst>>7)&31, (inst>>7)&31);
	return buf;

}

char *emitc_mvn_lsl_mode3_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~(tmp32=READ_REG(%u)&0xFF, val32=READ_REG(%u), (tmp32<32)?(val32<<tmp32):0));\n"
	"", (inst>>12)&15, (inst>>8)&15, (inst>>0)&15);
	return buf;

}

char *emitc_mvn_lsr_mode3_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~(tmp32=READ_REG(%u)&0xFF, val32=READ_REG(%u), (tmp32<32)?(val32>>tmp32):0));\n"
	"", (inst>>12)&15, (inst>>8)&15, (inst>>0)&15);
	return buf;

}

char *emitc_mvn_asr_mode3_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~(tmp32=READ_REG(%u)&0xFF, val32=READ_REG(%u), (int32_t)val32>>(tmp32<32?tmp32:31)));\n"
	"", (inst>>12)&15, (inst>>8)&15, (inst>>0)&15);
	return buf;

}

char *emitc_mvn_ror_mode3_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, ~(tmp32=READ_REG(%u)&0xFF, val32=READ_REG(%u), (val32>>(tmp32&0x1f))|(val32<<(32-(tmp32&0x1f)))));\n"
	"", (inst>>12)&15, (inst>>8)&15, (inst>>0)&15);
	return buf;

}

char *emitc_mvns_lsz_mode2_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(carry=C_FLAG, READ_REG(%u));\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_lsl_mode2_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(val32=READ_REG(%u), carry=BITn(val32, 32-%u), val32<<%u);\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&15, (inst>>7)&31, (inst>>7)&31, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_zero_mode2_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(carry=BIT31(READ_REG(%u)), 0);\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_lsr_mode2_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(val32=READ_REG(%u), carry=BITn(val32, %u-1), val32>>%u);\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&15, (inst>>7)&31, (inst>>7)&31, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_sign_mode2_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(val32=READ_REG(%u), carry=BIT31(val32), BIT31(val32)?~0:0);\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_asr_mode2_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(val32=READ_REG(%u), carry=BITn(val32, %u-1), (int32_t)val32>>%u);\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&15, (inst>>7)&31, (inst>>7)&31, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_rrx_mode2_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(val32=READ_REG(%u), carry=BIT0(val32), (val32>>1)|(C_FLAG<<31));\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_ror_mode2_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(val32=READ_REG(%u), carry=BITn(val32, %u-1), (val32>>%u)|(val32<<(32-%u)));\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&15, (inst>>7)&31, (inst>>7)&31, (inst>>7)&31, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_lsl_mode3_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(tmp32=READ_REG(%u)&0xFF, val32=READ_REG(%u), carry=(tmp32==0)?C_FLAG:((tmp32>32)?0:BITn(val32,32-val32)), (tmp32<32)?(val32<<tmp32):0);\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>8)&15, (inst>>0)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_lsr_mode3_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(tmp32=READ_REG(%u)&0xFF, val32=READ_REG(%u), carry=(tmp32==0)?C_FLAG:((tmp32>32)?0:BITn(val32,tmp32-1)), (tmp32<32)?(val32>>tmp32):0);\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>8)&15, (inst>>0)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_asr_mode3_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(tmp32=READ_REG(%u)&0xFF, val32=READ_REG(%u), carry=(tmp32==0)?C_FLAG:((tmp32>31)?BIT31(val32):BITn(val32,tmp32-1)), (int32_t)val32>>(tmp32<32?tmp32:31));\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>8)&15, (inst>>0)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_mvns_ror_mode3_s_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");
	buf += sprintf(buf, "\tuint32_t carry;\n");

	buf += sprintf(buf, "\n"
	"	rslt32 = ~(tmp32=READ_REG(%u)&0xFF, val32=READ_REG(%u), carry=(tmp32==0)?C_FLAG:((tmp32&0x1f==0)?BIT31(val32):BITn(val32,(tmp32&0x1f)-1)), (val32>>(tmp32&0x1f))|(val32<<(32-(tmp32&0x1f))));\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZC(rslt32, carry);\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>8)&15, (inst>>0)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_addi_imm_mode1_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, READ_REG(%u) + %u);\n"
	"", (inst>>12)&15, (inst>>16)&15, (inst>>0)&255);
	return buf;

}

char *emitc_addi_rot_mode1_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, READ_REG(%u) + ((%u>>(%u<<1))|(%u<<(32-(%u<<1)))));\n"
	"", (inst>>12)&15, (inst>>16)&15, (inst>>0)&255, (inst>>8)&15, (inst>>0)&255, (inst>>8)&15);
	return buf;

}

char *emitc_addis_imm_mode1_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");

	buf += sprintf(buf, "\n"
	"	tmp32 = %u;\n"
	"	val32  = READ_REG(%u);\n"
	"	rslt32 = val32 + tmp32;\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZCV(rslt32, rslt32<val32, (val32^tmp32^-1) & (val32^rslt32));\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&255, (inst>>16)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_addis_rot_mode1_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{
	buf += sprintf(buf, "\tuint32_t val32;\n");
	buf += sprintf(buf, "\tuint32_t tmp32;\n");
	buf += sprintf(buf, "\tuint32_t rslt32;\n");

	buf += sprintf(buf, "\n"
	"	tmp32 = ((%u>>(%u<<1))|(%u<<(32-(%u<<1))));\n"
	"	val32  = READ_REG(%u);\n"
	"	rslt32 = val32 + tmp32;\n"
	"    if (%u==15)\n"
	"        WRITE_CPSR(SPSR);\n"
	"    else\n"
	"		ASGN_NZCV(rslt32, rslt32<val32, (val32^tmp32^-1) & (val32^rslt32));\n"
	"	WRITE_REG(%u, rslt32);\n"
	"", (inst>>0)&255, (inst>>8)&15, (inst>>0)&255, (inst>>8)&15, (inst>>16)&15, (inst>>12)&15, (inst>>12)&15);
	return buf;

}

char *emitc_add_lsl_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, READ_REG(%u) + (READ_REG(%u)<<%u));\n"
	"", (inst>>12)&15, (inst>>16)&15, (inst>>0)&15, (inst>>7)&31);
	return buf;

}

char *emitc_add_zero_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{

	buf += sprintf(buf, "\n"
	"	WRITE_REG(%u, READ_REG(%u) + 0);\n"
	"", (inst>>12)&15, (inst>>16)&15);
	return buf;

}

char *emitc_add_lsr_mode2_(char *buf, unsigned curpc, target_inst_t inst, unsigned size)
{