arm-neon-intrinsics.texi

理解和实践操作系统的一本好书

@c Copyright (C) 2006 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.

@c This file is generated automatically using gcc/config/arm/neon-docgen.ml
@c Please do not edit manually.
@subsubsection Addition

@itemize @bullet
@item uint32x2_t vadd_u32 (uint32x2_t, uint32x2_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i32 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint16x4_t vadd_u16 (uint16x4_t, uint16x4_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i16 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint8x8_t vadd_u8 (uint8x8_t, uint8x8_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i8 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int32x2_t vadd_s32 (int32x2_t, int32x2_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i32 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int16x4_t vadd_s16 (int16x4_t, int16x4_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i16 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int8x8_t vadd_s8 (int8x8_t, int8x8_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i8 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint64x1_t vadd_u64 (uint64x1_t, uint64x1_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i64 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int64x1_t vadd_s64 (int64x1_t, int64x1_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i64 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item float32x2_t vadd_f32 (float32x2_t, float32x2_t)
@*@emph{Form of expected instruction(s):} @code{vadd.f32 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint32x4_t vaddq_u32 (uint32x4_t, uint32x4_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i32 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint16x8_t vaddq_u16 (uint16x8_t, uint16x8_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i16 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint8x16_t vaddq_u8 (uint8x16_t, uint8x16_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i8 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int32x4_t vaddq_s32 (int32x4_t, int32x4_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i32 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int16x8_t vaddq_s16 (int16x8_t, int16x8_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i16 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int8x16_t vaddq_s8 (int8x16_t, int8x16_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i8 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint64x2_t vaddq_u64 (uint64x2_t, uint64x2_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i64 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int64x2_t vaddq_s64 (int64x2_t, int64x2_t)
@*@emph{Form of expected instruction(s):} @code{vadd.i64 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item float32x4_t vaddq_f32 (float32x4_t, float32x4_t)
@*@emph{Form of expected instruction(s):} @code{vadd.f32 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint64x2_t vaddl_u32 (uint32x2_t, uint32x2_t)
@*@emph{Form of expected instruction(s):} @code{vaddl.u32 @var{q0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint32x4_t vaddl_u16 (uint16x4_t, uint16x4_t)
@*@emph{Form of expected instruction(s):} @code{vaddl.u16 @var{q0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint16x8_t vaddl_u8 (uint8x8_t, uint8x8_t)
@*@emph{Form of expected instruction(s):} @code{vaddl.u8 @var{q0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int64x2_t vaddl_s32 (int32x2_t, int32x2_t)
@*@emph{Form of expected instruction(s):} @code{vaddl.s32 @var{q0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int32x4_t vaddl_s16 (int16x4_t, int16x4_t)
@*@emph{Form of expected instruction(s):} @code{vaddl.s16 @var{q0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int16x8_t vaddl_s8 (int8x8_t, int8x8_t)
@*@emph{Form of expected instruction(s):} @code{vaddl.s8 @var{q0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint64x2_t vaddw_u32 (uint64x2_t, uint32x2_t)
@*@emph{Form of expected instruction(s):} @code{vaddw.u32 @var{q0}, @var{q0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint32x4_t vaddw_u16 (uint32x4_t, uint16x4_t)
@*@emph{Form of expected instruction(s):} @code{vaddw.u16 @var{q0}, @var{q0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint16x8_t vaddw_u8 (uint16x8_t, uint8x8_t)
@*@emph{Form of expected instruction(s):} @code{vaddw.u8 @var{q0}, @var{q0}, @var{d0}}
@end itemize


@itemize @bullet
@item int64x2_t vaddw_s32 (int64x2_t, int32x2_t)
@*@emph{Form of expected instruction(s):} @code{vaddw.s32 @var{q0}, @var{q0}, @var{d0}}
@end itemize


@itemize @bullet
@item int32x4_t vaddw_s16 (int32x4_t, int16x4_t)
@*@emph{Form of expected instruction(s):} @code{vaddw.s16 @var{q0}, @var{q0}, @var{d0}}
@end itemize


@itemize @bullet
@item int16x8_t vaddw_s8 (int16x8_t, int8x8_t)
@*@emph{Form of expected instruction(s):} @code{vaddw.s8 @var{q0}, @var{q0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint32x2_t vhadd_u32 (uint32x2_t, uint32x2_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.u32 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint16x4_t vhadd_u16 (uint16x4_t, uint16x4_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.u16 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint8x8_t vhadd_u8 (uint8x8_t, uint8x8_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.u8 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int32x2_t vhadd_s32 (int32x2_t, int32x2_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.s32 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int16x4_t vhadd_s16 (int16x4_t, int16x4_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.s16 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int8x8_t vhadd_s8 (int8x8_t, int8x8_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.s8 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint32x4_t vhaddq_u32 (uint32x4_t, uint32x4_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.u32 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint16x8_t vhaddq_u16 (uint16x8_t, uint16x8_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.u16 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint8x16_t vhaddq_u8 (uint8x16_t, uint8x16_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.u8 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int32x4_t vhaddq_s32 (int32x4_t, int32x4_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.s32 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int16x8_t vhaddq_s16 (int16x8_t, int16x8_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.s16 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int8x16_t vhaddq_s8 (int8x16_t, int8x16_t)
@*@emph{Form of expected instruction(s):} @code{vhadd.s8 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint32x2_t vrhadd_u32 (uint32x2_t, uint32x2_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.u32 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint16x4_t vrhadd_u16 (uint16x4_t, uint16x4_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.u16 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint8x8_t vrhadd_u8 (uint8x8_t, uint8x8_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.u8 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int32x2_t vrhadd_s32 (int32x2_t, int32x2_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.s32 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int16x4_t vrhadd_s16 (int16x4_t, int16x4_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.s16 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int8x8_t vrhadd_s8 (int8x8_t, int8x8_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.s8 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint32x4_t vrhaddq_u32 (uint32x4_t, uint32x4_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.u32 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint16x8_t vrhaddq_u16 (uint16x8_t, uint16x8_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.u16 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint8x16_t vrhaddq_u8 (uint8x16_t, uint8x16_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.u8 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int32x4_t vrhaddq_s32 (int32x4_t, int32x4_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.s32 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int16x8_t vrhaddq_s16 (int16x8_t, int16x8_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.s16 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int8x16_t vrhaddq_s8 (int8x16_t, int8x16_t)
@*@emph{Form of expected instruction(s):} @code{vrhadd.s8 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint32x2_t vqadd_u32 (uint32x2_t, uint32x2_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.u32 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint16x4_t vqadd_u16 (uint16x4_t, uint16x4_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.u16 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint8x8_t vqadd_u8 (uint8x8_t, uint8x8_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.u8 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int32x2_t vqadd_s32 (int32x2_t, int32x2_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.s32 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int16x4_t vqadd_s16 (int16x4_t, int16x4_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.s16 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int8x8_t vqadd_s8 (int8x8_t, int8x8_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.s8 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint64x1_t vqadd_u64 (uint64x1_t, uint64x1_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.u64 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item int64x1_t vqadd_s64 (int64x1_t, int64x1_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.s64 @var{d0}, @var{d0}, @var{d0}}
@end itemize


@itemize @bullet
@item uint32x4_t vqaddq_u32 (uint32x4_t, uint32x4_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.u32 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint16x8_t vqaddq_u16 (uint16x8_t, uint16x8_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.u16 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint8x16_t vqaddq_u8 (uint8x16_t, uint8x16_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.u8 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int32x4_t vqaddq_s32 (int32x4_t, int32x4_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.s32 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int16x8_t vqaddq_s16 (int16x8_t, int16x8_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.s16 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int8x16_t vqaddq_s8 (int8x16_t, int8x16_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.s8 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint64x2_t vqaddq_u64 (uint64x2_t, uint64x2_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.u64 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int64x2_t vqaddq_s64 (int64x2_t, int64x2_t)
@*@emph{Form of expected instruction(s):} @code{vqadd.s64 @var{q0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint32x2_t vaddhn_u64 (uint64x2_t, uint64x2_t)
@*@emph{Form of expected instruction(s):} @code{vaddhn.i64 @var{d0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint16x4_t vaddhn_u32 (uint32x4_t, uint32x4_t)
@*@emph{Form of expected instruction(s):} @code{vaddhn.i32 @var{d0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint8x8_t vaddhn_u16 (uint16x8_t, uint16x8_t)
@*@emph{Form of expected instruction(s):} @code{vaddhn.i16 @var{d0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int32x2_t vaddhn_s64 (int64x2_t, int64x2_t)
@*@emph{Form of expected instruction(s):} @code{vaddhn.i64 @var{d0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int16x4_t vaddhn_s32 (int32x4_t, int32x4_t)
@*@emph{Form of expected instruction(s):} @code{vaddhn.i32 @var{d0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item int8x8_t vaddhn_s16 (int16x8_t, int16x8_t)
@*@emph{Form of expected instruction(s):} @code{vaddhn.i16 @var{d0}, @var{q0}, @var{q0}}
@end itemize


@itemize @bullet
@item uint32x2_t vraddhn_u64 (uint64x2_t, uint64x2_t)
@*@emph{Form of expected instruction(s):} @code{vraddhn.i64 @var{d0}, @var{q0}, @var{q0}}
@end itemize