jit3-m68k.def

基于LWVCL开发的库

	LOUT(imm);
}

static inline void
op_movel_ap(int src, int dst)
{
	debug(("movel %s, -(%s)\n", regname(src), regname(dst)));
	assert_areg(src);
	assert_areg(dst);
	WOUT(0x2000 | ((dst & 7) << 9) | (MODE_predec << 6) | (MODE_a << 3) | (src & 7));
}

#if defined(JIT3)
static inline void
op_movel_pd(int src, int dst)
{
	debug(("movel +(%s), %s\n", regname(src), regname(dst)));
	assert_areg(src);
	assert_dreg(dst);
	WOUT(0x2000 | ((dst & 7) << 9) | (MODE_d << 6) | (MODE_postinc << 3) | (src & 7));
}

static inline void
op_movel_pa(int src, int dst)
{
	debug(("movel +(%s), %s\n", regname(src), regname(dst)));
	assert_areg(src);
	assert_areg(dst);
	WOUT(0x2000 | ((dst & 7) << 9) | (MODE_a << 6) | (MODE_postinc << 3) | (src & 7));
}
#endif

static inline void
op_movel_dp(int src, int dst)
{
	debug(("movel %s, -(%s)\n", regname(src), regname(dst)));
	assert_dreg(src);
	assert_areg(dst);
	WOUT(0x2000 | ((dst & 7) << 9) | (MODE_predec << 6) | (MODE_d << 3) | (src & 7));
}

static inline void
op_movel_op(int base, int disp, int dst)
{
	debug(("movel %d(%s), -(%s)\n", disp, regname(base), regname(dst)));
	assert_areg(base);
	assert_s16(disp);
	assert_areg(dst);
	WOUT(0x2000 | ((dst & 7) << 9) | (MODE_predec << 6) | (MODE_inddisp << 3) | (base & 7));
	WOUT(disp);
}

static inline void
op_movel_od(int base, int disp, int dst)
{
	debug(("movel %d(%s), %s\n", disp, regname(base), regname(dst)));
	assert_areg(base);
	assert_s16(disp);
	assert_dreg(dst);
	WOUT(0x2000 | ((dst & 7) << 9) | (MODE_d << 6) | (MODE_inddisp << 3) | (base & 7));
	WOUT(disp);
}

static inline void
op_moveal_aa(int src, int dst)
{
	debug(("moveal %s, %s\n", regname(src), regname(dst)));
	assert_areg(src);
	assert_areg(dst);
	WOUT(0x2040 | ((dst & 7) << 9) | (MODE_a << 3) | (src & 7));
}

static inline void
op_moveal_Ia(int src, int dst)
{
	debug(("moveal (%s), %s\n", regname(src), regname(dst)));
	assert_areg(src);
	assert_areg(dst);
	WOUT(0x2040 | ((dst & 7) << 9) | (MODE_ind << 3) | (src & 7));
}

static inline void
op_moveal_oa(int base, int disp, int dst)
{
	debug(("moveal %d(%s), %s\n", disp, regname(base), regname(dst)));
	assert_areg(base);
	assert_s16(disp);
	assert_areg(dst);
	WOUT(0x2040 | ((dst & 7) << 9) | (MODE_inddisp << 3) | (base & 7));
	WOUT(disp);
}

static inline void
op_moveal_ia(int imm, int dst)
{
	debug(("moveal #0x%x, %s\n", imm, regname(dst)));
	assert_areg(dst);
	WOUT(0x2040 | ((dst & 7) << 9) | MODE_src_imm);
	LOUT(imm);
}

#if !defined(HAVE_NO_MOVEM)
static inline void
op_moveml_ro(int mask, int areg, int disp)
{
	debug(("moveml 0x%04x, %d(%s)\n", mask, disp, regname(areg)));
	assert_s16(disp);
	assert_areg(areg);
	WOUT(0x48C0 | (MODE_inddisp << 3) | (areg & 7));
	WOUT(mask);
	WOUT(disp);
}

static inline void
op_moveml_or(int areg, int disp, int mask)
{
	debug(("moveml %d(%s), 0x%04x\n", disp, regname(areg), mask));
	assert_s16(disp);
	assert_areg(areg);
	WOUT(0x4CC0 | (MODE_inddisp << 3) | (areg & 7));
	WOUT(mask);
	WOUT(disp);
}

static inline void
op_moveml_rp(int mask, int areg)
{
	debug(("moveml 0x%04x, -(%s)\n", mask, regname(areg)));
	assert_areg(areg);
	WOUT(0x48C0 | (MODE_predec << 3) | (areg & 7));
	WOUT(mask);
}

static inline void
op_moveml_pr(int areg, int mask)
{
	debug(("moveml +(%s), 0x%04x\n", regname(areg), mask));
	assert_areg(areg);
	WOUT(0x4CC0 | (MODE_postinc << 3) | (areg & 7));
	WOUT(mask);
}
#endif

static inline void
op_moveq_id(int imm, int dst)
{
	debug(("moveq #%d, %s\n", imm, regname(dst)));
	assert_dreg(dst);
	assert_s8(imm);
	WOUT(0x7000 | (dst << 9) | (imm & 0xFF));
}

static inline void
op_mulsl_id(int imm, int dst)
{
	debug(("mulsl #%d, %s\n", imm, regname(dst)));
	assert_dreg(dst);
	WOUT(0x4C00 | MODE_src_imm);
	WOUT(0x0800 | (dst << 12));
	LOUT(imm);
}

static inline void
op_mulsl_dd(int src, int dst)
{
	debug(("mulsl %s, %s\n", regname(src), regname(dst)));
	assert_dreg(src);
	assert_dreg(dst);
	WOUT(0x4C00 | (MODE_d << 3) | src);
	WOUT(0x0800 | (dst << 12));
}

static inline void
op_negl_d(int dst)
{
	debug(("negl %s\n", regname(dst)));
	assert_dreg(dst);
	WOUT(0x4480 | (MODE_d << 3) | dst);
}

static inline void
op_negxl_d(int dst)
{
	debug(("negxl %s\n", regname(dst)));
	assert_dreg(dst);
	WOUT(0x4080 | (MODE_d << 3) | dst);
}

static inline void
op_nop(void)
{
	debug(("nop\n"));
	WOUT(0x4E71);
}

static inline void
op_orl_dd(int src, int dst)
{
	debug(("orl %s, %s\n", regname(src), regname(dst)));
	assert_dreg(src);
	assert_dreg(dst);
	WOUT(0x8080 | (dst << 9) | (MODE_d << 3) | src);
}

static inline void
op_pea_l(int addr)
{
	debug(("pea 0x%08x\n", addr));
	WOUT(0x4840 | MODE_src_absl);
	LOUT(addr);
}

static inline void
op_rts(void)
{
	debug(("rts\n"));
	WOUT(0x4E75);
}

static inline void
op_subl_id(int imm, int dst)
{
	debug(("subl #%d, %s\n", imm, regname(dst)));
	assert_dreg(dst);
	WOUT(0x9080 | (dst << 9) | MODE_src_imm);
	LOUT(imm);
}

static inline void
op_subl_dd(int src, int dst)
{
	debug(("subl %s, %s\n", regname(src), regname(dst)));
	assert_dreg(src);
	assert_dreg(dst);
	WOUT(0x9080 | (dst << 9) | (MODE_d << 3) | src);
}

#if !defined(HAVE_NO_SUBAW)
static inline void
op_subaw_ia(int disp, int dst)
{
	debug(("subaw #%d, %s\n", disp, regname(dst)));
	assert_s16(disp);
	assert_areg(dst);
	WOUT(0x90C0 | ((dst & 7) << 9) | MODE_src_imm);
	WOUT(disp);
}
#else
static inline void
op_subal_ia(int imm, int dst)
{
	debug(("subal #%d, %s\n", imm, regname(dst)));
	assert_areg(dst);
	WOUT(0x91C0 | ((dst & 7) << 9) | MODE_src_imm);
	LOUT(imm);
}
#endif

static inline void
op_subql_id(int imm, int dst)
{
	debug(("subql #%d, %s\n", imm, regname(dst)));
	assert(imm >= 1 && imm <= 8);
	assert_dreg(dst);
	WOUT(0x5180 | ((imm & 7) << 9) | (MODE_d << 3) | dst);
}

static inline void
op_subxl_dd(int src, int dst)
{
	debug(("subxl %s, %s\n", regname(src), regname(dst)));
	assert_dreg(src);
	assert_dreg(dst);
	WOUT(0x9180 | (dst << 9) | src);
}

static inline void
op_tst_a(int src)
{
	debug(("tst %s\n", regname(src)));
	assert_areg(src);
	WOUT(0x4A80 | (MODE_a << 3) | (src & 7));
}

static inline void
op_tst_d(int src)
{
	debug(("tst %s\n", regname(src)));
	assert_dreg(src);
	WOUT(0x4A80 | (MODE_d << 3) | (src & 7));
}

static inline void
op_unlk_a(int areg)
{
	debug(("unlk %s\n", regname(areg)));
	assert_areg(areg);
	WOUT(0x4E58 | (areg & 7));
}

/* --------------------------------------------------------------------- */

static inline void
_op_fop_ff(int src, int dst, int opmode)
{
	assert_freg(src);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9));
	WOUT(((src & 7) << 10) | ((dst & 7) << 7) | opmode);
}

static inline void
op_fsaddx_ff(int src, int dst)
{
	debug(("fsaddx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst, 0x22 | OPMODE_s);
}

static inline void
op_fdaddx_ff(int src, int dst)
{
	debug(("fdaddx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst, 0x22 | OPMODE_d);
}

static inline void
op_fsdivx_ff(int src, int dst)
{
	debug(("fsdivx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst,  0x20 | OPMODE_s);
}

static inline void
op_fddivx_ff(int src, int dst)
{
	debug(("fddivx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst,  0x20 | OPMODE_d);
}

static inline void
op_fmoves_fI(int src, int base)
{
	debug(("fmoves %s, (%s)\n", regname(src), regname(base)));
	assert_freg(src);
	assert_areg(base);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_ind << 3) | (base & 7));
	WOUT(0x6400 | ((src & 7) << 7));
}

static inline void
op_fmoves_fp(int src, int base)
{
	debug(("fmoves %s, -(%s)\n", regname(src), regname(base)));
	assert_freg(src);
	assert_areg(base);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_predec << 3) | (base & 7));
	WOUT(0x6400 | ((src & 7) << 7));
}

static inline void
op_fmoves_fo(int src, int base, int disp)
{
	debug(("fmoves %s, %d(%s)\n", regname(src), disp, regname(base)));
	assert_freg(src);
	assert_areg(base);
	assert_s16(disp);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_inddisp << 3) | (base & 7));
	WOUT(0x6400 | ((src & 7) << 7));
	WOUT(disp);
}

static inline void
op_fmoves_fd(int src, int dst)
{
	debug(("fmoves %s, %s\n", regname(src), regname(dst)));
	assert_freg(src);
	assert_dreg(dst);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_d << 3) | (dst & 7));
	WOUT(0x6400 | ((src & 7) << 7));
}

static inline void
op_fmoved_fI(int src, int base)
{
	debug(("fmoved %s, (%s)\n", regname(src), regname(base)));
	assert_freg(src);
	assert_areg(base);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_ind << 3) | (base & 7));
	WOUT(0x7400 | ((src & 7) << 7));
}

static inline void
op_fmoved_fp(int src, int base)
{
	debug(("fmoved %s, -(%s)\n", regname(src), regname(base)));
	assert_freg(src);
	assert_areg(base);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_predec << 3) | (base & 7));
	WOUT(0x7400 | ((src & 7) << 7));
}

static inline void
op_fmoved_fo(int src, int base, int disp)
{
	debug(("fmoved %s, %d(%s)\n", regname(src), disp, regname(base)));
	assert_freg(src);
	assert_areg(base);
	assert_s16(disp);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_inddisp << 3) | (base & 7));
	WOUT(0x7400 | ((src & 7) << 7));
	WOUT(disp);
}

static inline void
op_fsmoves_df(int src, int dst)
{
	debug(("fsmoves %s, %s\n", regname(src), regname(dst)));
 	assert_dreg(src);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_d << 3) | (src & 7));
	WOUT(0x4400 | ((dst & 7) << 7) | OPMODE_s);
}

static inline void
op_fsmoves_If(int base, int dst)
{
	debug(("fsmoves (%s), %s\n", regname(base), regname(dst)));
 	assert_areg(base);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_ind << 3) | (base & 7));
	WOUT(0x4400 | ((dst & 7) << 7) | OPMODE_s);
}

static inline void
op_fdmoved_If(int base, int dst)
{
	debug(("fdmoved (%s), %s\n", regname(base), regname(dst)));
 	assert_areg(base);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_ind << 3) | (base & 7));
	WOUT(0x5400 | ((dst & 7) << 7) | OPMODE_d);
}

static inline void
op_fsmoves_of(int base, int disp, int dst)
{
	debug(("fsmoves %d(%s), %s\n", disp, regname(base), regname(dst)));
 	assert_areg(base);
	assert_s16(disp);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_inddisp << 3) | (base & 7));
	WOUT(0x4400 | ((dst & 7) << 7) | OPMODE_s);
	WOUT(disp);
}

static inline void
op_fdmoved_of(int base, int disp, int dst)
{
	debug(("fdmoved %d(%s), %s\n", disp, regname(base), regname(dst)));
 	assert_areg(base);
	assert_s16(disp);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_inddisp << 3) | (base & 7));
	WOUT(0x5400 | ((dst & 7) << 7) | OPMODE_d);
	WOUT(disp);
}

static inline void
op_fsmovel_df(int src, int dst)
{
	debug(("fsmovel %s, %s\n", regname(src), regname(dst)));
 	assert_dreg(src);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_d << 3) | (src & 7));
	WOUT(0x4000 | ((dst & 7) << 7) | OPMODE_s);
}

static inline void
op_fdmovel_df(int src, int dst)
{
	debug(("fdmovel %s, %s\n", regname(src), regname(dst)));
 	assert_dreg(src);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_d << 3) | (src & 7));
	WOUT(0x4000 | ((dst & 7) << 7) | OPMODE_d);
}

static inline void
op_fsmovex_ff(int src, int dst)
{
	debug(("fsmovex %s, %s\n", regname(src), regname(dst)));
	assert_freg(src);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9));
	WOUT(((src & 7) << 10) | ((dst & 7) << 7) | OPMODE_s);
}

static inline void
op_fdmovex_ff(int src, int dst)
{
	debug(("fdmovex %s, %s\n", regname(src), regname(dst)));
	assert_freg(src);
	assert_freg(dst);
	WOUT(0xF000 | (COPROCID << 9));
	WOUT(((src & 7) << 10) | ((dst & 7) << 7) | OPMODE_d);
}

static inline void
op_fmovemx_ro(int mask, int base, int disp)
{
	debug(("fmovemx 0x%02x, %d(%s)\n", mask, disp, regname(base)));
	assert_s16(disp);
	assert_areg(base);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_inddisp << 3) | (base & 7));
	WOUT(0xD000 | mask);
}

static inline void
op_fmovemx_or(int base, int disp, int mask)
{
	debug(("fmovemx %d(%s), 0x%02x\n", disp, regname(base), mask));
	assert_s16(disp);
	assert_areg(base);
	WOUT(0xF000 | (COPROCID << 9) | (MODE_inddisp << 3) | (base & 7));
	WOUT(0xE000 | mask);
}

static inline void
op_fsmulx_ff(int src, int dst)
{
	debug(("fsmulx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst,  0x23 | OPMODE_s);
}

static inline void
op_fdmulx_ff(int src, int dst)
{
	debug(("fdmulx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst,  0x23 | OPMODE_d);
}

static inline void
op_fsnegx_ff(int src, int dst)
{
	debug(("fsnegx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst,  0x1A | OPMODE_s);
}

static inline void
op_fdnegx_ff(int src, int dst)
{
	debug(("fdnegx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst,  0x1A | OPMODE_d);
}

static inline void
op_fremx_ff(int src, int dst)
{
	debug(("fremx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst, 0x25);
}

static inline void
op_fssubx_ff(int src, int dst)
{
	debug(("fssubx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst,  0x28 | OPMODE_s);
}

static inline void
op_fdsubx_ff(int src, int dst)
{
	debug(("fdsubx %s, %s\n", regname(src), regname(dst)));
	_op_fop_ff(src, dst,  0x28 | OPMODE_d);
}


/* --------------------------------------------------------------------- */

define_insn(unimplemented, unimplemented)
{
	KAFFEVM_ABORT();
}

define_insn(nop, nop)
{
	op_nop();
}

/* --------------------------------------------------------------------- */

define_insn(prologue, prologue_xxC)
{
	Method* meth;
	label* l;

#ifdef KAFFE_VMDEBUG
	if (jit_debug) {
		meth = const_method(2);
		printf("\n%s.%s %s\n", meth->class->name->data,
			meth->name->data, METHOD_SIGD(meth));
	}
#endif

	l = (label*)const_int(1);
	l->type = Lnegframe|Labsolute|Lgeneral;	
	l->at = (uintp)CODEPC+2;
	op_linkw_ai(REG_fp, 0);

	/* Save the callee saved registers */
#if defined(HAVE_NO_MOVEM)
	{
		int r;
		for (r = 0; r < 16; r++) {
			if (((1<<r) & RESTOREMASK) != 0) {
				if (r < 8) {
					op_movel_dp(r, REG_sp);
				}
				else {
					op_movel_ap(r, REG_sp);
				}
			}
		}
	}
#else
	op_moveml_rp(SAVEMASK, REG_sp);
#endif
}

define_insn(eprologue, eprologue_xxx)
{
	label* l;

	l = (label*)const_int(1);
	l->type = Llnegframe|Labsolute|Lgeneral;

	/* Be careful not to dealocate our current frame even for
	   an instant.  */
	op_moveal_aa(REG_fp, REG_a0);
	l->at = (uintp)CODEPC+2;
	op_addal_ia(0, REG_a0);

#if !defined(HAVE_NO_SUBAW)
	op_subaw_ia(SRNR * SLOTSIZE, REG_a0);