myled.vho

EP1C3144的点灯基本程序

-- Copyright (C) 1991-2007 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II"
-- VERSION "Version 7.2 Build 151 09/26/2007 SJ Full Version"

-- DATE "10/06/2008 16:24:57"

-- 
-- Device: Altera EP1C3T144C8 Package TQFP144
-- 

-- 
-- This VHDL file should be used for PRIMETIME only
-- 

LIBRARY IEEE;
USE IEEE.std_logic_1164.all;

ENTITY 	myled IS
    PORT (
	clk : IN std_logic;
	led1 : OUT std_logic;
	led2 : OUT std_logic;
	led3 : OUT std_logic
	);
END myled;

ARCHITECTURE structure OF myled IS
SIGNAL GNDs : std_logic_vector(2048 DOWNTO 0);
SIGNAL VCCs : std_logic_vector(2048 DOWNTO 0);
SIGNAL gnd : std_logic;
SIGNAL vcc : std_logic;
SIGNAL ww_clk : std_logic;
SIGNAL ww_led1 : std_logic;
SIGNAL ww_led2 : std_logic;
SIGNAL ww_led3 : std_logic;
SIGNAL clk_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL counter_a0_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a0_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a1_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a1_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a2_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a2_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a3_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a3_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a4_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a4_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a5_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a5_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a6_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a6_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a7_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a7_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a8_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a8_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a9_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a9_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a10_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a10_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a11_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a11_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a12_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a12_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a13_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a13_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a14_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a14_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a15_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a15_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a16_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a16_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a17_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a17_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a18_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a18_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a19_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a19_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a20_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a20_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan6_a450_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan6_a450_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan6_a447_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan6_a447_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan6_a448_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan6_a448_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a21_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a21_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a22_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a22_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a23_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a23_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan6_a449_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan6_a449_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a24_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a24_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL counter_a25_a_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL counter_a25_a_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan6_a444_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan6_a444_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan6_a445_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan6_a445_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan6_a446_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan6_a446_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan6_a451_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan6_a451_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL process0_a192_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL process0_a192_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL process0_a189_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL process0_a189_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan0_a505_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan0_a505_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan5_a359_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan5_a359_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan5_a357_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan5_a357_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan5_a356_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan5_a356_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan5_a358_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan5_a358_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL process0_a190_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL process0_a190_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL process0_a191_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL process0_a191_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan0_a506_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan0_a506_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan0_a511_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan0_a511_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan0_a507_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan0_a507_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan0_a508_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan0_a508_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan0_a509_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan0_a509_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan0_a510_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan0_a510_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL ledtmp1_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL ledtmp1_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL ledtmp3_a334_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL ledtmp3_a334_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan2_a437_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan2_a437_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan2_a438_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan2_a438_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan2_a439_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan2_a439_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan2_a440_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan2_a440_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL LessThan2_a441_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL LessThan2_a441_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL ledtmp2_a213_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL ledtmp2_a213_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL ledtmp2_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL ledtmp2_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL ledtmp3_a337_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL ledtmp3_a337_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL ledtmp3_a335_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL ledtmp3_a335_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL ledtmp3_a336_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL ledtmp3_a336_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL ledtmp3_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL ledtmp3_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL led1_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL led2_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL led3_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL clk_acombout : std_logic;
SIGNAL counter_a0_a_aregout : std_logic;
SIGNAL counter_a0_a_a503 : std_logic;
SIGNAL counter_a0_a_a503COUT1 : std_logic;
SIGNAL counter_a1_a_aregout : std_logic;
SIGNAL counter_a1_a_a501 : std_logic;
SIGNAL counter_a1_a_a501COUT1 : std_logic;
SIGNAL counter_a2_a_aregout : std_logic;
SIGNAL counter_a2_a_a499 : std_logic;
SIGNAL counter_a3_a_aregout : std_logic;
SIGNAL counter_a3_a_a497 : std_logic;
SIGNAL counter_a3_a_a497COUT1 : std_logic;
SIGNAL counter_a4_a_aregout : std_logic;
SIGNAL counter_a4_a_a495 : std_logic;
SIGNAL counter_a4_a_a495COUT1 : std_logic;
SIGNAL counter_a5_a_aregout : std_logic;
SIGNAL counter_a5_a_a493 : std_logic;
SIGNAL counter_a5_a_a493COUT1 : std_logic;
SIGNAL counter_a6_a_aregout : std_logic;
SIGNAL counter_a6_a_a491 : std_logic;
SIGNAL counter_a6_a_a491COUT1 : std_logic;
SIGNAL counter_a7_a_aregout : std_logic;
SIGNAL counter_a7_a_a461 : std_logic;
SIGNAL counter_a8_a_aregout : std_logic;
SIGNAL counter_a8_a_a463 : std_logic;
SIGNAL counter_a8_a_a463COUT1 : std_logic;
SIGNAL counter_a9_a_aregout : std_logic;
SIGNAL counter_a9_a_a465 : std_logic;
SIGNAL counter_a9_a_a465COUT1 : std_logic;
SIGNAL counter_a10_a_aregout : std_logic;
SIGNAL counter_a10_a_a469 : std_logic;
SIGNAL counter_a10_a_a469COUT1 : std_logic;
SIGNAL counter_a11_a_aregout : std_logic;
SIGNAL counter_a11_a_a467 : std_logic;
SIGNAL counter_a11_a_a467COUT1 : std_logic;
SIGNAL counter_a12_a_aregout : std_logic;
SIGNAL counter_a12_a_a477 : std_logic;
SIGNAL counter_a13_a_aregout : std_logic;
SIGNAL counter_a13_a_a471 : std_logic;
SIGNAL counter_a13_a_a471COUT1 : std_logic;
SIGNAL counter_a14_a_aregout : std_logic;
SIGNAL counter_a14_a_a483 : std_logic;
SIGNAL counter_a14_a_a483COUT1 : std_logic;
SIGNAL counter_a15_a_aregout : std_logic;
SIGNAL counter_a15_a_a485 : std_logic;
SIGNAL counter_a15_a_a485COUT1 : std_logic;
SIGNAL counter_a16_a_aregout : std_logic;
SIGNAL counter_a16_a_a481 : std_logic;
SIGNAL counter_a16_a_a481COUT1 : std_logic;
SIGNAL counter_a17_a_aregout : std_logic;
SIGNAL counter_a17_a_a473 : std_logic;
SIGNAL counter_a18_a_aregout : std_logic;
SIGNAL counter_a18_a_a475 : std_logic;
SIGNAL counter_a18_a_a475COUT1 : std_logic;
SIGNAL counter_a19_a_aregout : std_logic;
SIGNAL counter_a19_a_a479 : std_logic;
SIGNAL counter_a19_a_a479COUT1 : std_logic;
SIGNAL counter_a20_a_aregout : std_logic;
SIGNAL LessThan6_a450_combout : std_logic;
SIGNAL LessThan6_a447_combout : std_logic;
SIGNAL LessThan6_a448_combout : std_logic;
SIGNAL counter_a20_a_a489 : std_logic;
SIGNAL counter_a20_a_a489COUT1 : std_logic;
SIGNAL counter_a21_a_aregout : std_logic;
SIGNAL counter_a21_a_a487 : std_logic;
SIGNAL counter_a21_a_a487COUT1 : std_logic;
SIGNAL counter_a22_a_aregout : std_logic;
SIGNAL counter_a22_a_a453 : std_logic;
SIGNAL counter_a23_a_aregout : std_logic;
SIGNAL LessThan6_a449_combout : std_logic;
SIGNAL counter_a23_a_a455 : std_logic;
SIGNAL counter_a23_a_a455COUT1 : std_logic;
SIGNAL counter_a24_a_a457 : std_logic;
SIGNAL counter_a24_a_a457COUT1 : std_logic;
SIGNAL counter_a25_a_aregout : std_logic;
SIGNAL LessThan6_a444_combout : std_logic;
SIGNAL LessThan6_a445_combout : std_logic;
SIGNAL LessThan6_a446_combout : std_logic;
SIGNAL LessThan6_a451_combout : std_logic;
SIGNAL counter_a24_a_aregout : std_logic;
SIGNAL process0_a192_combout : std_logic;
SIGNAL process0_a189_combout : std_logic;
SIGNAL LessThan0_a505_combout : std_logic;
SIGNAL LessThan5_a359_combout : std_logic;
SIGNAL LessThan5_a357_combout : std_logic;
SIGNAL LessThan5_a356_combout : std_logic;
SIGNAL LessThan5_a358_combout : std_logic;
SIGNAL process0_a190_combout : std_logic;
SIGNAL process0_a191_combout : std_logic;
SIGNAL LessThan0_a506_combout : std_logic;
SIGNAL LessThan0_a511_combout : std_logic;
SIGNAL LessThan0_a507_combout : std_logic;
SIGNAL LessThan0_a508_combout : std_logic;
SIGNAL LessThan0_a509_combout : std_logic;
SIGNAL LessThan0_a510_combout : std_logic;
SIGNAL ledtmp1_aregout : std_logic;
SIGNAL ledtmp3_a334_combout : std_logic;
SIGNAL LessThan2_a437_combout : std_logic;
SIGNAL LessThan2_a438_combout : std_logic;
SIGNAL LessThan2_a439_combout : std_logic;
SIGNAL LessThan2_a440_combout : std_logic;
SIGNAL LessThan2_a441_combout : std_logic;
SIGNAL ledtmp2_a213_combout : std_logic;
SIGNAL ledtmp2_aregout : std_logic;
SIGNAL ledtmp3_a337_combout : std_logic;
SIGNAL ledtmp3_a335_combout : std_logic;
SIGNAL ledtmp3_a336_combout : std_logic;
SIGNAL ledtmp3_aregout : std_logic;
COMPONENT cyclone_lcell
PORT (
	clk : IN STD_LOGIC;
	dataa : IN STD_LOGIC;
	datab : IN STD_LOGIC;
	datac : IN STD_LOGIC;
	datad : IN STD_LOGIC;
	aclr : IN STD_LOGIC;
	aload : IN STD_LOGIC;
	sclr : IN STD_LOGIC;
	sload : IN STD_LOGIC;
	ena : IN STD_LOGIC;
	cin : IN STD_LOGIC;
	cin0 : IN STD_LOGIC;
	cin1 : IN STD_LOGIC;
	inverta : IN STD_LOGIC;
	regcascin : IN STD_LOGIC;
	combout : OUT STD_LOGIC;
	regout : OUT STD_LOGIC;
	cout : OUT STD_LOGIC;
	cout0 : OUT STD_LOGIC;
	cout1 : OUT STD_LOGIC;
	modesel : IN STD_LOGIC_VECTOR(12 DOWNTO 0);
	pathsel : IN STD_LOGIC_VECTOR(10 DOWNTO 0));
END COMPONENT;

COMPONENT cyclone_io
PORT (
	datain : IN STD_LOGIC;
	oe : IN STD_LOGIC;
	outclk : IN STD_LOGIC;
	outclkena : IN STD_LOGIC;
	inclk : IN STD_LOGIC;
	inclkena : IN STD_LOGIC;
	areset : IN STD_LOGIC;
	sreset : IN STD_LOGIC;
	combout : OUT STD_LOGIC;
	regout : OUT STD_LOGIC;
	padio : INOUT STD_LOGIC;
	modesel : IN STD_LOGIC_VECTOR(26 DOWNTO 0));
END COMPONENT;


COMPONENT INV
    PORT (
	IN1 : IN std_logic;
	Y :  OUT std_logic);
END COMPONENT;

COMPONENT AND1
    PORT (
	IN1 : IN std_logic;
	Y :  OUT std_logic);
END COMPONENT;
BEGIN

ww_clk <= clk;
led1 <= ww_led1;
led2 <= ww_led2;
led3 <= ww_led3;

gnd <= '0';
vcc <= '1';
GNDs <= (OTHERS => '0');
VCCs <= (OTHERS => '1');

clk_aI_modesel <= "000000000000000000000000001";
counter_a0_a_modesel <= "1100001011010";
counter_a0_a_pathsel <= "00010000001";
counter_a1_a_modesel <= "1100010011010";
counter_a1_a_pathsel <= "01100010010";
counter_a2_a_modesel <= "1100010011010";
counter_a2_a_pathsel <= "01100010010";
counter_a3_a_modesel <= "1100010011010";
counter_a3_a_pathsel <= "01100010010";
counter_a4_a_modesel <= "1100010011010";
counter_a4_a_pathsel <= "01010010001";
counter_a5_a_modesel <= "1100010011010";
counter_a5_a_pathsel <= "01010010001";
counter_a6_a_modesel <= "1100010011010";
counter_a6_a_pathsel <= "01100010010";
counter_a7_a_modesel <= "1100010011010";
counter_a7_a_pathsel <= "01010010001";
counter_a8_a_modesel <= "1100010011010";
counter_a8_a_pathsel <= "01100010010";
counter_a9_a_modesel <= "1100010011010";
counter_a9_a_pathsel <= "01010010001";
counter_a10_a_modesel <= "1100010011010";
counter_a10_a_pathsel <= "01010010001";
counter_a11_a_modesel <= "1100010011010";
counter_a11_a_pathsel <= "01100010010";
counter_a12_a_modesel <= "1100010011010";
counter_a12_a_pathsel <= "01100010010";
counter_a13_a_modesel <= "1100010011010";
counter_a13_a_pathsel <= "01100010010";
counter_a14_a_modesel <= "1100010011010";
counter_a14_a_pathsel <= "01010010001";
counter_a15_a_modesel <= "1100010011010";
counter_a15_a_pathsel <= "01010010001";
counter_a16_a_modesel <= "1100010011010";
counter_a16_a_pathsel <= "01100010010";
counter_a17_a_modesel <= "1100010011010";
counter_a17_a_pathsel <= "01010010001";
counter_a18_a_modesel <= "1100010011010";
counter_a18_a_pathsel <= "01100010010";
counter_a19_a_modesel <= "1100010011010";
counter_a19_a_pathsel <= "01010010001";
counter_a20_a_modesel <= "1100010011010";
counter_a20_a_pathsel <= "01010010001";
LessThan6_a450_modesel <= "1001001010101";
LessThan6_a450_pathsel <= "00000001111";
LessThan6_a447_modesel <= "1001001010101";
LessThan6_a447_pathsel <= "00000001111";
LessThan6_a448_modesel <= "1001001010101";
LessThan6_a448_pathsel <= "00000001110";
counter_a21_a_modesel <= "1100010011010";
counter_a21_a_pathsel <= "01100010010";
counter_a22_a_modesel <= "1100010011010";
counter_a22_a_pathsel <= "01100010010";
counter_a23_a_modesel <= "1100010011010";
counter_a23_a_pathsel <= "01100010010";
LessThan6_a449_modesel <= "1001001010101";