myled.vho

EP1C3144的点灯基本程序

-- Copyright (C) 1991-2007 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II"
-- VERSION "Version 7.2 Build 151 09/26/2007 SJ Full Version"

-- DATE "10/06/2008 16:24:57"

-- 
-- Device: Altera EP1C3T144C8 Package TQFP144
-- 

-- 
-- This VHDL file should be used for ModelSim (VHDL) only
-- 

LIBRARY IEEE, cyclone;
USE IEEE.std_logic_1164.all;
USE cyclone.cyclone_components.all;

ENTITY 	myled IS
    PORT (
	clk : IN std_logic;
	led1 : OUT std_logic;
	led2 : OUT std_logic;
	led3 : OUT std_logic
	);
END myled;

ARCHITECTURE structure OF myled IS
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
SIGNAL devoe : std_logic := '1';
SIGNAL devclrn : std_logic := '1';
SIGNAL devpor : std_logic := '1';
SIGNAL ww_devoe : std_logic;
SIGNAL ww_devclrn : std_logic;
SIGNAL ww_devpor : std_logic;
SIGNAL ww_clk : std_logic;
SIGNAL ww_led1 : std_logic;
SIGNAL ww_led2 : std_logic;
SIGNAL ww_led3 : std_logic;
SIGNAL clk_acombout : std_logic;
SIGNAL counter_a0_a_a503 : std_logic;
SIGNAL counter_a0_a_a503COUT1 : std_logic;
SIGNAL counter_a1_a_a501 : std_logic;
SIGNAL counter_a1_a_a501COUT1 : std_logic;
SIGNAL counter_a2_a_a499 : std_logic;
SIGNAL counter_a3_a_a497 : std_logic;
SIGNAL counter_a3_a_a497COUT1 : std_logic;
SIGNAL counter_a4_a_a495 : std_logic;
SIGNAL counter_a4_a_a495COUT1 : std_logic;
SIGNAL counter_a5_a_a493 : std_logic;
SIGNAL counter_a5_a_a493COUT1 : std_logic;
SIGNAL counter_a6_a_a491 : std_logic;
SIGNAL counter_a6_a_a491COUT1 : std_logic;
SIGNAL counter_a7_a_a461 : std_logic;
SIGNAL counter_a8_a_a463 : std_logic;
SIGNAL counter_a8_a_a463COUT1 : std_logic;
SIGNAL counter_a9_a_a465 : std_logic;
SIGNAL counter_a9_a_a465COUT1 : std_logic;
SIGNAL counter_a10_a_a469 : std_logic;
SIGNAL counter_a10_a_a469COUT1 : std_logic;
SIGNAL counter_a11_a_a467 : std_logic;
SIGNAL counter_a11_a_a467COUT1 : std_logic;
SIGNAL counter_a12_a_a477 : std_logic;
SIGNAL counter_a13_a_a471 : std_logic;
SIGNAL counter_a13_a_a471COUT1 : std_logic;
SIGNAL counter_a14_a_a483 : std_logic;
SIGNAL counter_a14_a_a483COUT1 : std_logic;
SIGNAL counter_a15_a_a485 : std_logic;
SIGNAL counter_a15_a_a485COUT1 : std_logic;
SIGNAL counter_a16_a_a481 : std_logic;
SIGNAL counter_a16_a_a481COUT1 : std_logic;
SIGNAL counter_a17_a_a473 : std_logic;
SIGNAL counter_a18_a_a475 : std_logic;
SIGNAL counter_a18_a_a475COUT1 : std_logic;
SIGNAL counter_a19_a_a479 : std_logic;
SIGNAL counter_a19_a_a479COUT1 : std_logic;
SIGNAL LessThan6_a450_combout : std_logic;
SIGNAL LessThan6_a447_combout : std_logic;
SIGNAL LessThan6_a448_combout : std_logic;
SIGNAL counter_a20_a_a489 : std_logic;
SIGNAL counter_a20_a_a489COUT1 : std_logic;
SIGNAL counter_a21_a_a487 : std_logic;
SIGNAL counter_a21_a_a487COUT1 : std_logic;
SIGNAL counter_a22_a_a453 : std_logic;
SIGNAL LessThan6_a449_combout : std_logic;
SIGNAL counter_a23_a_a455 : std_logic;
SIGNAL counter_a23_a_a455COUT1 : std_logic;
SIGNAL counter_a24_a_a457 : std_logic;
SIGNAL counter_a24_a_a457COUT1 : std_logic;
SIGNAL LessThan6_a444_combout : std_logic;
SIGNAL LessThan6_a445_combout : std_logic;
SIGNAL LessThan6_a446_combout : std_logic;
SIGNAL LessThan6_a451_combout : std_logic;
SIGNAL process0_a192_combout : std_logic;
SIGNAL process0_a189_combout : std_logic;
SIGNAL LessThan0_a505_combout : std_logic;
SIGNAL LessThan5_a359_combout : std_logic;
SIGNAL LessThan5_a357_combout : std_logic;
SIGNAL LessThan5_a356_combout : std_logic;
SIGNAL LessThan5_a358_combout : std_logic;
SIGNAL process0_a190_combout : std_logic;
SIGNAL process0_a191_combout : std_logic;
SIGNAL LessThan0_a506_combout : std_logic;
SIGNAL LessThan0_a511_combout : std_logic;
SIGNAL LessThan0_a507_combout : std_logic;
SIGNAL LessThan0_a508_combout : std_logic;
SIGNAL LessThan0_a509_combout : std_logic;
SIGNAL LessThan0_a510_combout : std_logic;
SIGNAL ledtmp1_aregout : std_logic;
SIGNAL ledtmp3_a334_combout : std_logic;
SIGNAL LessThan2_a437_combout : std_logic;
SIGNAL LessThan2_a438_combout : std_logic;
SIGNAL LessThan2_a439_combout : std_logic;
SIGNAL LessThan2_a440_combout : std_logic;
SIGNAL LessThan2_a441_combout : std_logic;
SIGNAL ledtmp2_a213_combout : std_logic;
SIGNAL ledtmp2_aregout : std_logic;
SIGNAL ledtmp3_a337_combout : std_logic;
SIGNAL ledtmp3_a335_combout : std_logic;
SIGNAL ledtmp3_a336_combout : std_logic;
SIGNAL ledtmp3_aregout : std_logic;
SIGNAL counter : std_logic_vector(25 DOWNTO 0);

BEGIN

ww_clk <= clk;
led1 <= ww_led1;
led2 <= ww_led2;
led3 <= ww_led3;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;

clk_aI : cyclone_io
-- pragma translate_off
GENERIC MAP (
	input_async_reset => "none",
	input_power_up => "low",
	input_register_mode => "none",
	input_sync_reset => "none",
	oe_async_reset => "none",
	oe_power_up => "low",
	oe_register_mode => "none",
	oe_sync_reset => "none",
	operation_mode => "input",
	output_async_reset => "none",
	output_power_up => "low",
	output_register_mode => "none",
	output_sync_reset => "none")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_clk,
	combout => clk_acombout);

counter_a0_a : cyclone_lcell
-- Equation(s):
-- counter(0) = DFFEAS(!counter(0), GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a0_a_a503 = CARRY(counter(0))
-- counter_a0_a_a503COUT1 = CARRY(counter(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "55aa",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	dataa => counter(0),
	aclr => GND,
	sclr => LessThan6_a451_combout,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => counter(0),
	cout0 => counter_a0_a_a503,
	cout1 => counter_a0_a_a503COUT1);

counter_a1_a : cyclone_lcell
-- Equation(s):
-- counter(1) = DFFEAS(counter(1) $ counter_a0_a_a503, GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a1_a_a501 = CARRY(!counter_a0_a_a503 # !counter(1))
-- counter_a1_a_a501COUT1 = CARRY(!counter_a0_a_a503COUT1 # !counter(1))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	lut_mask => "3c3f",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	datab => counter(1),
	aclr => GND,
	sclr => LessThan6_a451_combout,
	cin0 => counter_a0_a_a503,
	cin1 => counter_a0_a_a503COUT1,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => counter(1),
	cout0 => counter_a1_a_a501,
	cout1 => counter_a1_a_a501COUT1);

counter_a2_a : cyclone_lcell
-- Equation(s):
-- counter(2) = DFFEAS(counter(2) $ !counter_a1_a_a501, GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a2_a_a499 = CARRY(counter(2) & !counter_a1_a_a501COUT1)

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	lut_mask => "c30c",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	datab => counter(2),
	aclr => GND,
	sclr => LessThan6_a451_combout,
	cin0 => counter_a1_a_a501,
	cin1 => counter_a1_a_a501COUT1,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => counter(2),
	cout => counter_a2_a_a499);

counter_a3_a : cyclone_lcell
-- Equation(s):
-- counter(3) = DFFEAS(counter(3) $ counter_a2_a_a499, GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a3_a_a497 = CARRY(!counter_a2_a_a499 # !counter(3))
-- counter_a3_a_a497COUT1 = CARRY(!counter_a2_a_a499 # !counter(3))

-- pragma translate_off
GENERIC MAP (
	cin_used => "true",
	lut_mask => "3c3f",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	datab => counter(3),
	aclr => GND,
	sclr => LessThan6_a451_combout,
	cin => counter_a2_a_a499,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => counter(3),
	cout0 => counter_a3_a_a497,
	cout1 => counter_a3_a_a497COUT1);

counter_a4_a : cyclone_lcell
-- Equation(s):
-- counter(4) = DFFEAS(counter(4) $ (!(!counter_a2_a_a499 & counter_a3_a_a497) # (counter_a2_a_a499 & counter_a3_a_a497COUT1)), GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a4_a_a495 = CARRY(counter(4) & (!counter_a3_a_a497))
-- counter_a4_a_a495COUT1 = CARRY(counter(4) & (!counter_a3_a_a497COUT1))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "a50a",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	dataa => counter(4),
	aclr => GND,
	sclr => LessThan6_a451_combout,
	cin => counter_a2_a_a499,
	cin0 => counter_a3_a_a497,
	cin1 => counter_a3_a_a497COUT1,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => counter(4),
	cout0 => counter_a4_a_a495,
	cout1 => counter_a4_a_a495COUT1);

counter_a5_a : cyclone_lcell
-- Equation(s):
-- counter(5) = DFFEAS(counter(5) $ ((!counter_a2_a_a499 & counter_a4_a_a495) # (counter_a2_a_a499 & counter_a4_a_a495COUT1)), GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a5_a_a493 = CARRY(!counter_a4_a_a495 # !counter(5))
-- counter_a5_a_a493COUT1 = CARRY(!counter_a4_a_a495COUT1 # !counter(5))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "5a5f",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	dataa => counter(5),
	aclr => GND,
	sclr => LessThan6_a451_combout,
	cin => counter_a2_a_a499,
	cin0 => counter_a4_a_a495,
	cin1 => counter_a4_a_a495COUT1,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => counter(5),
	cout0 => counter_a5_a_a493,
	cout1 => counter_a5_a_a493COUT1);

counter_a6_a : cyclone_lcell
-- Equation(s):
-- counter(6) = DFFEAS(counter(6) $ !(!counter_a2_a_a499 & counter_a5_a_a493) # (counter_a2_a_a499 & counter_a5_a_a493COUT1), GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a6_a_a491 = CARRY(counter(6) & !counter_a5_a_a493)
-- counter_a6_a_a491COUT1 = CARRY(counter(6) & !counter_a5_a_a493COUT1)

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "c30c",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	datab => counter(6),
	aclr => GND,
	sclr => LessThan6_a451_combout,
	cin => counter_a2_a_a499,
	cin0 => counter_a5_a_a493,
	cin1 => counter_a5_a_a493COUT1,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => counter(6),
	cout0 => counter_a6_a_a491,
	cout1 => counter_a6_a_a491COUT1);

counter_a7_a : cyclone_lcell
-- Equation(s):
-- counter(7) = DFFEAS(counter(7) $ ((!counter_a2_a_a499 & counter_a6_a_a491) # (counter_a2_a_a499 & counter_a6_a_a491COUT1)), GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a7_a_a461 = CARRY(!counter_a6_a_a491COUT1 # !counter(7))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "5a5f",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	dataa => counter(7),
	aclr => GND,
	sclr => LessThan6_a451_combout,
	cin => counter_a2_a_a499,
	cin0 => counter_a6_a_a491,
	cin1 => counter_a6_a_a491COUT1,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => counter(7),
	cout => counter_a7_a_a461);

counter_a8_a : cyclone_lcell
-- Equation(s):
-- counter(8) = DFFEAS(counter(8) $ !counter_a7_a_a461, GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a8_a_a463 = CARRY(counter(8) & !counter_a7_a_a461)
-- counter_a8_a_a463COUT1 = CARRY(counter(8) & !counter_a7_a_a461)

-- pragma translate_off
GENERIC MAP (
	cin_used => "true",
	lut_mask => "c30c",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "on")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	datab => counter(8),
	aclr => GND,
	sclr => LessThan6_a451_combout,
	cin => counter_a7_a_a461,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => counter(8),
	cout0 => counter_a8_a_a463,
	cout1 => counter_a8_a_a463COUT1);

counter_a9_a : cyclone_lcell
-- Equation(s):
-- counter(9) = DFFEAS(counter(9) $ ((!counter_a7_a_a461 & counter_a8_a_a463) # (counter_a7_a_a461 & counter_a8_a_a463COUT1)), GLOBAL(clk_acombout), VCC, , , , , LessThan6_a451_combout, )
-- counter_a9_a_a465 = CARRY(!counter_a8_a_a463 # !counter(9))
-- counter_a9_a_a465COUT1 = CARRY(!counter_a8_a_a463COUT1 # !counter(9))

-- pragma translate_off
GENERIC MAP (
	cin0_used => "true",
	cin1_used => "true",
	cin_used => "true",
	lut_mask => "5a5f",
	operation_mode => "arithmetic",
	output_mode => "reg_only",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	synch_mode => "on")
-- pragma translate_on