📄 lcd_v.map.qmsg
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{ "Warning" "WVRFX_VERI_INCOMPLETE_CASE_STATEMENT" "lcd.v(58) " "Warning (10270): Verilog HDL statement warning at lcd.v(58): incomplete Case Statement has no default case item" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 58 0 0 } } } 0 10270 "Verilog HDL statement warning at %1!s!: incomplete Case Statement has no default case item" 0 0}
{ "Warning" "WVRFX_VERI_FUNCTION_MAY_RETURN_X" "ddram lcd.v(55) " "Warning (10241): Verilog HDL Function Declaration warning at lcd.v(55): function \"ddram\" may return a Don't Care value because its output register may not be assigned a value in every possible path through the function" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 55 0 0 } } } 0 10241 "Verilog HDL Function Declaration warning at %2!s!: function \"%1!s!\" may return a Don't Care value because its output register may not be assigned a value in every possible path through the function" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 lcd.v(176) " "Warning (10230): Verilog HDL assignment warning at lcd.v(176): truncated value with size 32 to match size of target (6)" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 176 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 6 lcd.v(194) " "Warning (10230): Verilog HDL assignment warning at lcd.v(194): truncated value with size 32 to match size of target (6)" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 194 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "ddram\[7\] 0 lcd.v(55) " "Warning (10030): Tied undriven net \"ddram\[7\]\" at lcd.v(55) to 0" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 55 0 0 } } } 0 10030 "Tied undriven net \"%1!s!\" at %3!s! to %2!s!" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "ddram\[6\] 0 lcd.v(55) " "Warning (10030): Tied undriven net \"ddram\[6\]\" at lcd.v(55) to 0" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 55 0 0 } } } 0 10030 "Tied undriven net \"%1!s!\" at %3!s! to %2!s!" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "ddram\[5\] 0 lcd.v(55) " "Warning (10030): Tied undriven net \"ddram\[5\]\" at lcd.v(55) to 0" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 55 0 0 } } } 0 10030 "Tied undriven net \"%1!s!\" at %3!s! to %2!s!" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "ddram\[4\] 0 lcd.v(55) " "Warning (10030): Tied undriven net \"ddram\[4\]\" at lcd.v(55) to 0" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 55 0 0 } } } 0 10030 "Tied undriven net \"%1!s!\" at %3!s! to %2!s!" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "ddram\[3\] 0 lcd.v(55) " "Warning (10030): Tied undriven net \"ddram\[3\]\" at lcd.v(55) to 0" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 55 0 0 } } } 0 10030 "Tied undriven net \"%1!s!\" at %3!s! to %2!s!" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "ddram\[2\] 0 lcd.v(55) " "Warning (10030): Tied undriven net \"ddram\[2\]\" at lcd.v(55) to 0" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 55 0 0 } } } 0 10030 "Tied undriven net \"%1!s!\" at %3!s! to %2!s!" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "ddram\[1\] 0 lcd.v(55) " "Warning (10030): Tied undriven net \"ddram\[1\]\" at lcd.v(55) to 0" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 55 0 0 } } } 0 10030 "Tied undriven net \"%1!s!\" at %3!s! to %2!s!" 0 0}
{ "Warning" "WVRFX_VRFC_DRIVERLESS_NET" "ddram\[0\] 0 lcd.v(55) " "Warning (10030): Tied undriven net \"ddram\[0\]\" at lcd.v(55) to 0" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 55 0 0 } } } 0 10030 "Tied undriven net \"%1!s!\" at %3!s! to %2!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "div16 div16:inst " "Info: Elaborating entity \"div16\" for hierarchy \"div16:inst\"" { } { { "lcd_v.bdf" "inst" { Schematic "E:/PLD/调试/接口实验/1602LCD/lcd_v.bdf" { { 24 112 208 120 "inst" "" } } } } } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 4 DIV16.v(12) " "Warning (10230): Verilog HDL assignment warning at DIV16.v(12): truncated value with size 32 to match size of target (4)" { } { { "DIV16.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/DIV16.v" 12 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO" "lcd:inst1\|always4~25 lcd:inst1\|always4~2 " "Info: Duplicate register \"lcd:inst1\|always4~25\" merged to single register \"lcd:inst1\|always4~2\"" { } { } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "lcd:inst1\|always4~22 lcd:inst1\|always4~2 " "Info: Duplicate register \"lcd:inst1\|always4~22\" merged to single register \"lcd:inst1\|always4~2\"" { } { } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "lcd:inst1\|always4~19 lcd:inst1\|always4~2 " "Info: Duplicate register \"lcd:inst1\|always4~19\" merged to single register \"lcd:inst1\|always4~2\"" { } { } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "lcd:inst1\|always4~16 lcd:inst1\|always4~2 " "Info: Duplicate register \"lcd:inst1\|always4~16\" merged to single register \"lcd:inst1\|always4~2\"" { } { } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "lcd:inst1\|always4~13 lcd:inst1\|always4~2 " "Info: Duplicate register \"lcd:inst1\|always4~13\" merged to single register \"lcd:inst1\|always4~2\"" { } { } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "lcd:inst1\|always4~10 lcd:inst1\|always4~2 " "Info: Duplicate register \"lcd:inst1\|always4~10\" merged to single register \"lcd:inst1\|always4~2\"" { } { } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO" "lcd:inst1\|always4~7 lcd:inst1\|always4~2 " "Info: Duplicate register \"lcd:inst1\|always4~7\" merged to single register \"lcd:inst1\|always4~2\"" { } { } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\"" 0 0} } { } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "lcd:inst1\|lcd_rw data_in GND " "Warning: Reduced register \"lcd:inst1\|lcd_rw\" with stuck data_in port to stuck value GND" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 3 -1 0 } } } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|lcd_v\|lcd:inst1\|state 11 " "Info: State machine \"\|lcd_v\|lcd:inst1\|state\" contains 11 states" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|lcd_v\|lcd:inst1\|state " "Info: Selected Auto state machine encoding method for state machine \"\|lcd_v\|lcd:inst1\|state\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|lcd_v\|lcd:inst1\|state " "Info: Encoding result for state machine \"\|lcd_v\|lcd:inst1\|state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "11 " "Info: Completed encoding using 11 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SETDDRAM1 " "Info: Encoded state bit \"lcd:inst1\|state.SETDDRAM1\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.CLEAR " "Info: Encoded state bit \"lcd:inst1\|state.CLEAR\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SETDDRAM " "Info: Encoded state bit \"lcd:inst1\|state.SETDDRAM\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.IDLE " "Info: Encoded state bit \"lcd:inst1\|state.IDLE\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.WRITERAM " "Info: Encoded state bit \"lcd:inst1\|state.WRITERAM\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SETCGRAM " "Info: Encoded state bit \"lcd:inst1\|state.SETCGRAM\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SETFUNCTION " "Info: Encoded state bit \"lcd:inst1\|state.SETFUNCTION\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SHIFT " "Info: Encoded state bit \"lcd:inst1\|state.SHIFT\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SWITCHMODE " "Info: Encoded state bit \"lcd:inst1\|state.SWITCHMODE\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.SETMODE " "Info: Encoded state bit \"lcd:inst1\|state.SETMODE\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "lcd:inst1\|state.RETURNCURSOR " "Info: Encoded state bit \"lcd:inst1\|state.RETURNCURSOR\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoded state bit \"%1!s!\"" 0 0} } { } 0 0 "Completed encoding using %1!d! state bits" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.IDLE 00000000000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.IDLE\" uses code string \"00000000000\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.WRITERAM 00011000000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.WRITERAM\" uses code string \"00011000000\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SETCGRAM 00010100000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SETCGRAM\" uses code string \"00010100000\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SWITCHMODE 00010000100 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SWITCHMODE\" uses code string \"00010000100\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.RETURNCURSOR 00010000001 " "Info: State \"\|lcd_v\|lcd:inst1\|state.RETURNCURSOR\" uses code string \"00010000001\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SETDDRAM 00110000000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SETDDRAM\" uses code string \"00110000000\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.CLEAR 01010000000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.CLEAR\" uses code string \"01010000000\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SETMODE 00010000010 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SETMODE\" uses code string \"00010000010\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SHIFT 00010001000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SHIFT\" uses code string \"00010001000\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SETFUNCTION 00010010000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SETFUNCTION\" uses code string \"00010010000\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcd_v\|lcd:inst1\|state.SETDDRAM1 10010000000 " "Info: State \"\|lcd_v\|lcd:inst1\|state.SETDDRAM1\" uses code string \"10010000000\"" { } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0} } { { "lcd.v" "" { Text "E:/PLD/调试/接口实验/1602LCD/lcd.v" 8 -1 0 } } } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0}
{ "Warning" "WOPT_MLS_STUCK_PIN_HDR" "" "Warning: Output pins are stuck at VCC or GND" { { "Warning" "WOPT_MLS_STUCK_PIN" "lcd_rw GND " "Warning: Pin \"lcd_rw\" stuck at GND" { } { { "lcd_v.bdf" "" { Schematic "E:/PLD/调试/接口实验/1602LCD/lcd_v.bdf" { { 144 432 608 160 "lcd_rw" "" } } } } } 0 0 "Pin \"%1!s!\" stuck at %2!s!" 0 0} } { } 0 0 "Output pins are stuck at VCC or GND" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "99 " "Info: Implemented 99 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "2 " "Info: Implemented 2 input pins" { } { } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "11 " "Info: Implemented 11 output pins" { } { } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_LCELLS" "86 " "Info: Implemented 86 logic cells" { } { } 0 0 "Implemented %1!d! logic cells" 0 0} } { } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 32 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 32 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 13 18:42:01 2006 " "Info: Processing ended: Fri Oct 13 18:42:01 2006" { } { } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Info: Elapsed time: 00:00:07" { } { } 0 0 "Elapsed time: %1!s!" 0 0} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}
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