lcd_v.tan.summary

用EPM1270实现的1602液晶驱动Verilog

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : -2.209 ns
From           : rst
To             : lcd:inst1|clkcnt[6]
From Clock     : --
To Clock       : mclk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 33.462 ns
From           : lcd:inst1|data[3]~reg0
To             : data[3]
From Clock     : mclk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 22.111 ns
From           : rst
To             : lcd:inst1|flag1
From Clock     : --
To Clock       : mclk
Failed Paths   : 0

Type           : Clock Setup: 'mclk'
Slack          : N/A
Required Time  : None
Actual Time    : 108.50 MHz ( period = 9.217 ns )
From           : lcd:inst1|clkcnt[4]
To             : lcd:inst1|clkcnt[0]
From Clock     : mclk
To Clock       : mclk
Failed Paths   : 0

Type           : Clock Hold: 'mclk'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : lcd:inst1|state.IDLE
To             : lcd:inst1|always4~2
From Clock     : mclk
To Clock       : mclk
Failed Paths   : 2

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 2

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