ofdm_test.mdl

来自「OFDM信道估计(梳状导频)」· MDL 代码 · 共 2,143 行 · 第 1/4 页

MDL
2,143 行
字号
1234
	  Ports			  [1, 1]
	  Position		  [525, 120, 575, 170]
	  SourceBlock		  "dspbuff3/Buffer"
	  SourceType		  "Buffer"
	  N			  "64"
	  V			  "0"
	  ic			  "0"
	}
	Block {
	  BlockType		  Reference
	  Name			  "DBPSK\nModulator\nBaseband"
	  Ports			  [1, 1]
	  Position		  [400, 31, 475, 79]
	  SourceBlock		  "commdigbbndpm2/DBPSK\nModulator\nBaseband"
	  SourceType		  "DBPSK Modulator Baseband"
	  ShowPortLabels	  on
	  Ph			  "0"
	  numSamp		  "1"
	}
	Block {
	  BlockType		  Gain
	  Name			  "Gain"
	  Position		  [620, 40, 650, 70]
	  Gain			  "sqrt(64)"
	  ParameterDataTypeMode	  "Inherit via internal rule"
	  OutDataTypeMode	  "Inherit via internal rule"
	  SaturateOnIntegerOverflow off
	}
	Block {
	  BlockType		  Gain
	  Name			  "Gain1"
	  Position		  [625, 130, 655, 160]
	  Gain			  "sqrt(64)"
	  ParameterDataTypeMode	  "Inherit via internal rule"
	  OutDataTypeMode	  "Inherit via internal rule"
	  SaturateOnIntegerOverflow off
	}
	Block {
	  BlockType		  Reference
	  Name			  "IFFT"
	  Ports			  [1, 1]
	  Position		  [690, 39, 730, 71]
	  DialogController	  "dspDDGCreate"
	  DialogControllerArgs	  "DataTag3"
	  SourceBlock		  "dspxfrm3/IFFT"
	  SourceType		  "IFFT"
	  CompMethod		  "Table lookup"
	  TableOpt		  "Speed"
	  BitRevOrder		  off
	  cs_in			  off
	  SkipNorm		  off
	  mode			  "Complex"
	  additionalParams	  off
	  allowOverrides	  on
	  firstCoeffMode	  "Same word length as input"
	  firstCoeffWordLength	  "16"
	  firstCoeffFracLength	  "15"
	  outputMode		  "Inherit via internal rule"
	  outputWordLength	  "16"
	  outputFracLength	  "15"
	  accumMode		  "Inherit via internal rule"
	  accumWordLength	  "32"
	  accumFracLength	  "30"
	  prodOutputMode	  "Inherit via internal rule"
	  prodOutputWordLength	  "32"
	  prodOutputFracLength	  "30"
	  roundingMode		  "Floor"
	  overflowMode		  off
	  LockScale		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "IFFT1"
	  Ports			  [1, 1]
	  Position		  [695, 129, 735, 161]
	  DialogController	  "dspDDGCreate"
	  DialogControllerArgs	  "DataTag4"
	  SourceBlock		  "dspxfrm3/IFFT"
	  SourceType		  "IFFT"
	  CompMethod		  "Table lookup"
	  TableOpt		  "Speed"
	  BitRevOrder		  off
	  cs_in			  off
	  SkipNorm		  off
	  mode			  "Complex"
	  additionalParams	  off
	  allowOverrides	  on
	  firstCoeffMode	  "Same word length as input"
	  firstCoeffWordLength	  "16"
	  firstCoeffFracLength	  "15"
	  outputMode		  "Inherit via internal rule"
	  outputWordLength	  "16"
	  outputFracLength	  "15"
	  accumMode		  "Inherit via internal rule"
	  accumWordLength	  "32"
	  accumFracLength	  "30"
	  prodOutputMode	  "Inherit via internal rule"
	  prodOutputWordLength	  "32"
	  prodOutputFracLength	  "30"
	  roundingMode		  "Floor"
	  overflowMode		  off
	  LockScale		  off
	}
	Block {
	  BlockType		  Reference
	  Name			  "Matrix\nConcatenation"
	  Ports			  [2, 1]
	  Position		  [185, 34, 240, 76]
	  SourceBlock		  "simulink/Math\nOperations/Matrix\nConcatena"
"tion"
	  SourceType		  "Matrix Concatenation"
	  numInports		  "2"
	  catMethod		  "Vertical"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Matrix\nConcatenation1"
	  Ports			  [2, 1]
	  Position		  [880, 44, 935, 86]
	  SourceBlock		  "simulink/Math\nOperations/Matrix\nConcatena"
"tion"
	  SourceType		  "Matrix Concatenation"
	  numInports		  "2"
	  catMethod		  "Vertical"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Matrix\nConcatenation2"
	  Ports			  [2, 1]
	  Position		  [885, 134, 940, 176]
	  SourceBlock		  "simulink/Math\nOperations/Matrix\nConcatena"
"tion"
	  SourceType		  "Matrix Concatenation"
	  numInports		  "2"
	  catMethod		  "Vertical"
	}
	Block {
	  BlockType		  Constant
	  Name			  "Pilot"
	  Position		  [60, 110, 90, 140]
	  Value			  "0"
	  SampleTime		  "1/1000"
	}
	Block {
	  BlockType		  Selector
	  Name			  "Selector"
	  Ports			  [1, 1]
	  Position		  [790, 36, 830, 74]
	  NamePlacement		  "alternate"
	  Elements		  "[64-15:64]"
	  InputPortWidth	  "64"
	}
	Block {
	  BlockType		  Selector
	  Name			  "Selector1"
	  Ports			  [1, 1]
	  Position		  [795, 126, 835, 164]
	  NamePlacement		  "alternate"
	  Elements		  "[64-15:64]"
	  InputPortWidth	  "64"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Unbuffer"
	  Ports			  [1, 1]
	  Position		  [310, 31, 360, 79]
	  SourceBlock		  "dspbuff3/Unbuffer"
	  SourceType		  "Unbuffer"
	  ic			  "0"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Unbuffer1"
	  Ports			  [1, 1]
	  Position		  [350, 206, 400, 254]
	  SourceBlock		  "dspbuff3/Unbuffer"
	  SourceType		  "Unbuffer"
	  ic			  "0"
	}
	Block {
	  BlockType		  Outport
	  Name			  "dbpsk"
	  Position		  [980, 58, 1010, 72]
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "bpsk"
	  Position		  [980, 148, 1010, 162]
	  Port			  "2"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Block {
	  BlockType		  Outport
	  Name			  "src"
	  Position		  [975, 223, 1005, 237]
	  Port			  "3"
	  IconDisplay		  "Port number"
	  BusOutputAsStruct	  off
	}
	Line {
	  SrcBlock		  "Bernoulli Binary\nGenerator"
	  SrcPort		  1
	  Points		  [35, 0]
	  Branch {
	    DstBlock		    "Matrix\nConcatenation"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 185]
	    DstBlock		    "Unbuffer1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Pilot"
	  SrcPort		  1
	  Points		  [35, 0; 0, -60]
	  DstBlock		  "Matrix\nConcatenation"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Matrix\nConcatenation"
	  SrcPort		  1
	  DstBlock		  "Unbuffer"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Buffer"
	  SrcPort		  1
	  DstBlock		  "Gain"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "IFFT"
	  SrcPort		  1
	  Points		  [0, 0; 25, 0]
	  Branch {
	    DstBlock		    "Selector"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 45; 105, 0]
	    DstBlock		    "Matrix\nConcatenation1"
	    DstPort		    2
	  }
	}
	Line {
	  SrcBlock		  "DBPSK\nModulator\nBaseband"
	  SrcPort		  1
	  DstBlock		  "Buffer"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Selector"
	  SrcPort		  1
	  DstBlock		  "Matrix\nConcatenation1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Matrix\nConcatenation1"
	  SrcPort		  1
	  DstBlock		  "dbpsk"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gain"
	  SrcPort		  1
	  DstBlock		  "IFFT"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Unbuffer"
	  SrcPort		  1
	  Points		  [10, 0]
	  Branch {
	    DstBlock		    "DBPSK\nModulator\nBaseband"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 90]
	    DstBlock		    "BPSK\nModulator\nBaseband"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Unbuffer1"
	  SrcPort		  1
	  DstBlock		  "src"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Buffer1"
	  SrcPort		  1
	  DstBlock		  "Gain1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "IFFT1"
	  SrcPort		  1
	  Points		  [0, 0; 25, 0]
	  Branch {
	    Points		    [0, 45; 105, 0]
	    DstBlock		    "Matrix\nConcatenation2"
	    DstPort		    2
	  }
	  Branch {
	    DstBlock		    "Selector1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "BPSK\nModulator\nBaseband"
	  SrcPort		  1
	  DstBlock		  "Buffer1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Selector1"
	  SrcPort		  1
	  DstBlock		  "Matrix\nConcatenation2"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Gain1"
	  SrcPort		  1
	  DstBlock		  "IFFT1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Matrix\nConcatenation2"
	  SrcPort		  1
	  DstBlock		  "bpsk"
	  DstPort		  1
	}
      }
    }
    Line {
      SrcBlock		      "Tx"
      SrcPort		      1
      Points		      [0, -55]
      DstBlock		      "Multipath Rayleigh\nFading Channel1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Tx"
      SrcPort		      3
      DstBlock		      "Delay"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Delay"
      SrcPort		      1
      Points		      [170, 0]
      Branch {
	Points			[0, -245]
	Branch {
	  Points		  [0, -95]
	  DstBlock		  "Error Rate\nCalculation2"
	  DstPort		  2
	}
	Branch {
	  DstBlock		  "Error Rate\nCalculation1"
	  DstPort		  2
	}
      }
      Branch {
	DstBlock		"Error Rate\nCalculation3"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "AWGN\nChannel1"
      SrcPort		      1
      DstBlock		      "Rx_DBPSK"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Multipath Rayleigh\nFading Channel1"
      SrcPort		      1
      DstBlock		      "AWGN\nChannel1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Tx"
      SrcPort		      2
      Points		      [75, 0]
      Branch {
	Points			[0, 0]
	Branch {
	  Points		  [0, 0]
	  DstBlock		  "Divide"
	  DstPort		  2
	}
	Branch {
	  DstBlock		  "Multipath Rayleigh\nFading Channel2"
	  DstPort		  1
	}
      }
      Branch {
	DstBlock		"Multipath Rayleigh\nFading Channel3"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Multipath Rayleigh\nFading Channel2"
      SrcPort		      1
      Points		      [10, 0]
      Branch {
	DstBlock		"AWGN\nChannel2"
	DstPort			1
      }
      Branch {
	DstBlock		"Divide"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "AWGN\nChannel2"
      SrcPort		      1
      DstBlock		      "Rx_BPSK_IDEAL"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Divide"
      SrcPort		      1
      Points		      [50, 0; 0, -95]
      DstBlock		      "Rx_BPSK_IDEAL"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Rx_BPSK"
      SrcPort		      1
      Points		      [40, 0; 0, 75]
      DstBlock		      "Error Rate\nCalculation3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Multipath Rayleigh\nFading Channel3"
      SrcPort		      1
      DstBlock		      "AWGN\nChannel3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "AWGN\nChannel3"
      SrcPort		      1
      DstBlock		      "Rx_BPSK"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Rx_DBPSK"
      SrcPort		      1
      DstBlock		      "Error Rate\nCalculation2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Rx_BPSK_IDEAL"
      SrcPort		      1
      DstBlock		      "Error Rate\nCalculation1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Error Rate\nCalculation2"
      SrcPort		      1
      DstBlock		      "Selector1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Selector1"
      SrcPort		      1
      DstBlock		      "To Workspace"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Error Rate\nCalculation1"
      SrcPort		      1
      DstBlock		      "Selector2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Selector2"
      SrcPort		      1
      DstBlock		      "To Workspace1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Error Rate\nCalculation3"
      SrcPort		      1
      DstBlock		      "Selector3"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Selector3"
      SrcPort		      1
      DstBlock		      "To Workspace2"
      DstPort		      1
    }
  }
}
MatData {
  NumRecords		  5
  DataRecord {
    Tag			    DataTag4
    Data		    "  %)30     .    8     8    (     0         %    "
"\"     $    !     0         .    ,     8    (    !          %    \"     $    "
"$     0         0  0 249&5 "
  }
  DataRecord {
    Tag			    DataTag3
    Data		    "  %)30     .    8     8    (     0         %    "
"\"     $    !     0         .    ,     8    (    !          %    \"     $    "
"$     0         0  0 249&5 "
  }
  DataRecord {
    Tag			    DataTag2
    Data		    "  %)30     .    8     8    (     0         %    "
"\"     $    !     0         .    ,     8    (    !          %    \"     $    "
"#     0         0  , 1D94  "
  }
  DataRecord {
    Tag			    DataTag1
    Data		    "  %)30     .    8     8    (     0         %    "
"\"     $    !     0         .    ,     8    (    !          %    \"     $    "
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  }
  DataRecord {
    Tag			    DataTag0
    Data		    "  %)30     .    8     8    (     0         %    "
"\"     $    !     0         .    ,     8    (    !          %    \"     $    "
"#     0         0  , 1D94  "
  }
}
1234

ofdm_test.mdl - 源码说明

本页面展示了「OFDM信道估计(梳状导频)」中的 ofdm_test.mdl 源码文件，采用 MDL 编程语言编写，共 2,143 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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