adc.inc

测量脉搏的源码 Cypress公司使用 CY27443 完成相关的功能

;;*****************************************************************************
;;*****************************************************************************
;;  FILENAME:   ADC.inc
;;  Version: 2.1, Updated on 2003/11/18 at 14:58:51
;;  Generated by PSoC Designer ver 4.1 BETA b923 : 11 December, 2003
;;
;;  DESCRIPTION:  Assembler declarations for the ADCINCVR user module interface
;;                for the 22/24/27xxx PSoC family of devices.
;;
;;-----------------------------------------------------------------------------
;;  Copyright (c) Cypress MicroSystems 2001-2003. All Rights Reserved.
;;*****************************************************************************
;;*****************************************************************************


;--------------------------------------------------
; Register Address Constants for ADC
;--------------------------------------------------

; Counter Constants
ADC_bfCounter_Mask:                    equ   08h
ADC_bfCounter_INT_REG:                 equ   0e1h

; PWM Constants
ADC_bfPWM16_Mask:                      equ   04h
ADC_bfPWM16_INT_REG:                   equ   0e1h

; Power Settings
ADC_bfPOWERMASK:                       equ   03h
ADC_OFF:                               equ   00h
ADC_LOWPOWER:                          equ   01h
ADC_MEDPOWER:                          equ   02h
ADC_HIGHPOWER:                         equ   03h

; Parameter Settings
ADC_bNUMBITS:                          equ   dh
ADC_bCALCTIME:                         equ   c8h
ADC_bMAXRES:                           equ   0Dh      ; Max resolution 13 bits
ADC_bMINRES:                           equ   07h      ; Min resolution 7 bits
ADC_fCOMPARE_TRUE:                     equ   08h      ; Bit to enable compare True interrupts

; Functionality constants
ADC_fFSW0:                             equ   10h      ; Switch Cap FSW0 switch enable
ADC_NoAZ:                              equ   01h      ; Set if AutoZero is not enabled
ADC_fAutoZero:                         equ   20h      ; Switch Cap AutoZero switch enable
ADC_fDBLK_ENABLE:                      equ   01h      ; Digital block enable bit
ADC_fPULSE_WIDE:                       equ   04h      ; Enable wide terminal count pulse.

; fStatus definitions
ADC_fDATA_READY:                       equ   10h      ; This bit is set when data is available
ADC_bRES_MASK:                         equ   0Fh      ; This bit while in integrate cycle

; Data Format
ADC_DATA_FORMAT:                       equ   0


;--------------------------------------------------
; Registers used by ADC
;--------------------------------------------------
; ADCINCVR PSoC Block register Definitions
; Integrator Block Register Definitions
ADC_bfAtoDcr0:  equ 84h
ADC_bfAtoDcr1:  equ 85h
ADC_bfAtoDcr2:  equ 86h
ADC_bfAtoDcr3:  equ 87h

; Counter Block Register Definitions
ADC_fCounterFN: equ 2ch
ADC_fCounterSL: equ 2dh
ADC_fCounterOS: equ 2eh
ADC_bCount: equ 2ch
ADC_bPeriod:    equ 2dh
ADC_bCompare:   equ 2eh
ADC_bCounter_CR0:   equ 2fh

; PWM16 Block Register Definitions
ADC_bfPWM_LSB_FN:   equ 24h
ADC_bfPWM_MSB_FN:   equ 28h
ADC_fPWM_LSB_CR0:   equ 27h
ADC_fPWM_MSB_CR0:   equ 2bh
ADC_bPWM_Count_MSB: equ 28h
ADC_bPWM_Count_LSB: equ 24h
ADC_bPWM_Period_MSB:    equ 29h
ADC_bPWM_Period_LSB:    equ 25h
ADC_bPWM_IntTime_MSB:   equ 2ah
ADC_bPWM_IntTime_LSB:   equ 26h
ADC_bfPWM_LSB_FN:   equ 24h
ADC_bfPWM_MSB_FN:   equ 28h


; End of File ADC.inc