📄 io.lst
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213 1
214 1 /// P1L.0 - P1L.3 output driver characteristic: strong driver
215 1 /// P1L.4 - P1L.7 output driver characteristic: strong driver
216 1
217 1 /// P1L.0 - P1L.3 output edge characteristic: sharp edge mode
218 1 /// P1L.4 - P1L.7 output edge characteristic: sharp edge mode
219 1
220 1 P1L = 0x0000; // load data register
221 1 ALTSEL0P1L = 0x0000; // load alternate output function select
222 1 // register 0
223 1 POCON1L = 0x0000; // load output control register
224 1 DP1L = 0x0000; // load direction register
225 1
226 1 /// -----------------------------------------------------------------------
227 1 /// Configuration of Port P2:
228 1 /// -----------------------------------------------------------------------
229 1 /// - no pin of port P2 is used
230 1
231 1 ODP2 = 0x0000; // load open-drain register
232 1 P2 = 0x0000; // load data register
233 1 ALTSEL0P2 = 0x0000; // load alternate output function select
234 1 // register 0
235 1 POCON2 = 0x0000; // load output control register
236 1 DP2 = 0x0000; // load direction register
237 1
238 1 /// -----------------------------------------------------------------------
239 1 /// Configuration of Port P3:
240 1 /// -----------------------------------------------------------------------
241 1 /// P3.0 is used as general purpose output
C166 COMPILER V6.04, IO 03/25/2008 10:21:41 PAGE 5
242 1 /// - push/pull output is selected
243 1 /// - the pin status is low level
244 1 /// P3.1 is used as general purpose output
245 1 /// - push/pull output is selected
246 1 /// - the pin status is low level
247 1 /// P3.2 is used as general purpose output
248 1 /// - push/pull output is selected
249 1 /// - the pin status is low level
250 1 /// P3.3 is used as general purpose output
251 1 /// - push/pull output is selected
252 1 /// - the pin status is low level
253 1 /// P3.4 is used as general purpose output
254 1 /// - push/pull output is selected
255 1 /// - the pin status is low level
256 1 /// P3.5 is used as general purpose output
257 1 /// - push/pull output is selected
258 1 /// - the pin status is low level
259 1 /// P3.6 is used as general purpose output
260 1 /// - push/pull output is selected
261 1 /// - the pin status is low level
262 1 /// P3.7 is used as general purpose output
263 1 /// - push/pull output is selected
264 1 /// - the pin status is low level
265 1 /// P3.8 is used as general purpose output
266 1 /// - push/pull output is selected
267 1 /// - the pin status is low level
268 1 /// P3.9 is used as general purpose output
269 1 /// - push/pull output is selected
270 1 /// - the pin status is low level
271 1 /// P3.12 is used as alternate output for the Byte High Enable Output
272 1 /// (BHE_n)
273 1
274 1 /// P3.0 - P3.7 threshold type: TTL input
275 1 /// P3.8 - P3.15 threshold type: TTL input
276 1
277 1 /// P3.0 - P3.3 output driver characteristic: strong driver
278 1 /// P3.4 - P3.7 output driver characteristic: strong driver
279 1 /// P3.8 - P3.11 output driver characteristic: strong driver
280 1 /// P3.12 - P3.15 output driver characteristic: strong driver
281 1
282 1 /// P3.0 - P3.3 output edge characteristic: sharp edge mode
283 1 /// P3.4 - P3.7 output edge characteristic: sharp edge mode
284 1 /// P3.8 - P3.11 output edge characteristic: sharp edge mode
285 1 /// P3.12 - P3.15 output edge characteristic: sharp edge mode
286 1
287 1 ODP3 = 0x0000; // load open-drain register
288 1 P3 = 0x0000; // load data register
289 1 ALTSEL0P3 = 0x0000; // load alternate output function select
290 1 // register 0
291 1 ALTSEL1P3 = 0x0000; // load alternate output function select
292 1 // register 1
293 1 POCON3 = 0x0000; // load output control register
294 1 DP3 = 0x03FF; // load direction register
295 1
296 1 /// -----------------------------------------------------------------------
297 1 /// Configuration of Port P4:
298 1 /// -----------------------------------------------------------------------
299 1 /// P4.0 is used as alternate input for the Port Pin (A16)
300 1 /// P4.1 is used as alternate input for the Port Pin (A17)
301 1
302 1 /// P4.0 - P4.7 threshold type: TTL input
303 1
C166 COMPILER V6.04, IO 03/25/2008 10:21:41 PAGE 6
304 1 /// P4.0 - P4.3 output driver characteristic: strong driver
305 1 /// P4.4 - P4.7 output driver characteristic: strong driver
306 1
307 1 /// P4.0 - P4.3 output edge characteristic: sharp edge mode
308 1 /// P4.4 - P4.7 output edge characteristic: sharp edge mode
309 1
310 1 ODP4 = 0x0000; // load open-drain register
311 1 P4 = 0x0000; // load data register
312 1 ALTSEL0P4 = 0x0000; // load alternate output function select
313 1 // register 0
314 1 ALTSEL1P4 = 0x0000; // load alternate output function select
315 1 // register 1
316 1 POCON4 = 0x0000; // load output control register
317 1 DP4 = 0x0000; // load direction register
318 1
319 1 /// -----------------------------------------------------------------------
320 1 /// Configuration of Port P5:
321 1 /// -----------------------------------------------------------------------
322 1 /// - no pin of port P5 is used
323 1 /// - Port5 Data register P5(Read only)
324 1
325 1
326 1 /// -----------------------------------------------------------------------
327 1 /// Configuration of Port P6:
328 1 /// -----------------------------------------------------------------------
329 1 /// P6.0 is used as alternate input for the Chip select (CS0_n)
330 1 /// P6.1 is used as alternate input for the Chip select (CS1_n)
331 1
332 1 /// P6.0 - P6.7 threshold type: TTL input
333 1
334 1 /// P6.0 - P6.3 output driver characteristic: strong driver
335 1 /// P6.4 - P6.7 output driver characteristic: strong driver
336 1
337 1 /// P6.0 - P6.3 output edge characteristic: sharp edge mode
338 1 /// P6.4 - P6.7 output edge characteristic: sharp edge mode
339 1
340 1 ODP6 = 0x0000; // load open-drain register
341 1 P6 = 0x0000; // load data register
342 1 ALTSEL0P6 = 0x0000; // load alternate output function select
343 1 // register 0
344 1 POCON6 = 0x0000; // load output control register
345 1 DP6 = 0x0000; // load direction register
346 1
347 1 /// -----------------------------------------------------------------------
348 1 /// Configuration of Port P7:
349 1 /// -----------------------------------------------------------------------
350 1 /// - no pin of port P7 is used
351 1
352 1 ODP7 = 0x0000; // load open-drain register
353 1 P7 = 0x0000; // load data register
354 1 ALTSEL0P7 = 0x0000; // load alternate output function select
355 1 // register 0
356 1 ALTSEL1P7 = 0x0000; // load alternate output function select
357 1 // register 1
358 1 POCON7 = 0x0000; // load output control register
359 1 DP7 = 0x0000; // load direction register
360 1
361 1 /// -----------------------------------------------------------------------
362 1 /// Configuration of Port P9:
363 1 /// -----------------------------------------------------------------------
364 1 /// - no pin of port P9 is used
365 1
C166 COMPILER V6.04, IO 03/25/2008 10:21:41 PAGE 7
366 1 ODP9 = 0x0000; // load open-drain register
367 1 P9 = 0x0000; // load data register
368 1 ALTSEL0P9 = 0x0000; // load alternate output function select
369 1 // register 0
370 1 ALTSEL1P9 = 0x0000; // load alternate output function select
371 1 // register 1
372 1 POCON9 = 0x0000; // load output control register
373 1 DP9 = 0x0000; // load direction register
374 1
375 1 /// -----------------------------------------------------------------------
376 1 /// Configuration of Port P20:
377 1 /// -----------------------------------------------------------------------
378 1 /// P20.4 is used as alternate output for the address latch enable signal
379 1 /// (ALE)
380 1
381 1 /// P20.0 - P20.7 threshold type: TTL input
382 1 /// P20.8 - P20.15 threshold type: TTL input
383 1
384 1 /// P20.0 - P20.3 output driver characteristic: strong driver
385 1 /// P20.4 - P20.7 output driver characteristic: strong driver
386 1 /// P20.12 - P20.15 output driver characteristic: strong driver
387 1
388 1 /// P20.0 - P20.3 output edge characteristic: sharp edge mode
389 1 /// P20.4 - P20.7 output edge characteristic: sharp edge mode
390 1 /// P20.12 - P20.15 output edge characteristic: sharp edge mode
391 1
392 1 P20 = 0x0000; // load data register
393 1 POCON20 = 0x0000; // load output control register
394 1 DP20 = 0x0000; // load direction register
395 1
396 1
397 1 // USER CODE BEGIN (IO_Function,3)
398 1
399 1 // USER CODE END
400 1
401 1 } // End of function IO_vInit
402
403
404
405
406 // USER CODE BEGIN (IO_General,10)
407
408 // USER CODE END
409
MODULE INFORMATION: INITIALIZED UNINITIALIZED
CODE SIZE = 242 --------
NEAR-CONST SIZE = -------- --------
FAR-CONST SIZE = -------- --------
HUGE-CONST SIZE = -------- --------
XHUGE-CONST SIZE = -------- --------
NEAR-DATA SIZE = -------- --------
FAR-DATA SIZE = -------- --------
XHUGE-DATA SIZE = -------- --------
IDATA-DATA SIZE = -------- --------
SDATA-DATA SIZE = -------- --------
BDATA-DATA SIZE = -------- --------
HUGE-DATA SIZE = -------- --------
BIT SIZE = -------- --------
INIT'L SIZE = -------- --------
END OF MODULE INFORMATION.
C166 COMPILER V6.04, IO 03/25/2008 10:21:41 PAGE 8
C166 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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