📄 mips64_exec.c
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{ int rs = bits(insn,21,25); int rt = bits(insn,16,20); int rd = bits(insn,11,15); cpu->gpr[rd] = cpu->gpr[rs] + cpu->gpr[rt]; return(0);}/* DIV */static fastcall int mips64_exec_DIV(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rt = bits(insn,16,20); cpu->lo = (m_int32_t)cpu->gpr[rs] / (m_int32_t)cpu->gpr[rt]; cpu->hi = (m_int32_t)cpu->gpr[rs] % (m_int32_t)cpu->gpr[rt]; cpu->lo = sign_extend(cpu->lo,32); cpu->hi = sign_extend(cpu->hi,32); return(0);}/* DIVU */static fastcall int mips64_exec_DIVU(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rt = bits(insn,16,20); if (cpu->gpr[rt] == 0) return(0); cpu->lo = (m_uint32_t)cpu->gpr[rs] / (m_uint32_t)cpu->gpr[rt]; cpu->hi = (m_uint32_t)cpu->gpr[rs] % (m_uint32_t)cpu->gpr[rt]; cpu->lo = sign_extend(cpu->lo,32); cpu->hi = sign_extend(cpu->hi,32); return(0);}/* DMFC0 */static fastcall int mips64_exec_DMFC0(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); mips64_cp0_exec_dmfc0(cpu,rt,rd); return(0);}/* DMFC1 */static fastcall int mips64_exec_DMFC1(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); mips64_exec_dmfc1(cpu,rt,rd); return(0);}/* DMTC0 */static fastcall int mips64_exec_DMTC0(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); mips64_cp0_exec_dmtc0(cpu,rt,rd); return(0);}/* DMTC1 */static fastcall int mips64_exec_DMTC1(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); mips64_exec_dmtc1(cpu,rt,rd); return(0);}/* DSLL */static fastcall int mips64_exec_DSLL(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); int sa = bits(insn,6,10); cpu->gpr[rd] = cpu->gpr[rt] << sa; return(0);}/* DSLL32 */static fastcall int mips64_exec_DSLL32(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); int sa = bits(insn,6,10); cpu->gpr[rd] = cpu->gpr[rt] << (32 + sa); return(0);}/* DSLLV */static fastcall int mips64_exec_DSLLV(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rt = bits(insn,16,20); int rd = bits(insn,11,15); cpu->gpr[rd] = cpu->gpr[rt] << (cpu->gpr[rs] & 0x3f); return(0);}/* DSRA */static fastcall int mips64_exec_DSRA(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); int sa = bits(insn,6,10); cpu->gpr[rd] = (m_int64_t)cpu->gpr[rt] >> sa; return(0);}/* DSRA32 */static fastcall int mips64_exec_DSRA32(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); int sa = bits(insn,6,10); cpu->gpr[rd] = (m_int64_t)cpu->gpr[rt] >> (32 + sa); return(0);}/* DSRAV */static fastcall int mips64_exec_DSRAV(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rt = bits(insn,16,20); int rd = bits(insn,11,15); cpu->gpr[rd] = (m_int64_t)cpu->gpr[rt] >> (cpu->gpr[rs] & 0x3f); return(0);}/* DSRL */static fastcall int mips64_exec_DSRL(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); int sa = bits(insn,6,10); cpu->gpr[rd] = cpu->gpr[rt] >> sa; return(0);}/* DSRL32 */static fastcall int mips64_exec_DSRL32(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); int sa = bits(insn,6,10); cpu->gpr[rd] = cpu->gpr[rt] >> (32 + sa); return(0);}/* DSRLV */static fastcall int mips64_exec_DSRLV(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rt = bits(insn,16,20); int rd = bits(insn,11,15); cpu->gpr[rd] = cpu->gpr[rt] >> (cpu->gpr[rs] & 0x3f); return(0);}/* DSUBU */static fastcall int mips64_exec_DSUBU(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rt = bits(insn,16,20); int rd = bits(insn,11,15); cpu->gpr[rd] = cpu->gpr[rs] - cpu->gpr[rt]; return(0);}/* ERET */static fastcall int mips64_exec_ERET(cpu_mips_t *cpu,mips_insn_t insn){ mips64_exec_eret(cpu); return(1);}/* J */static fastcall int mips64_exec_J(cpu_mips_t *cpu,mips_insn_t insn){ u_int instr_index = bits(insn,0,25); m_uint64_t new_pc; /* compute the new pc */ new_pc = cpu->pc & ~((1 << 28) - 1); new_pc |= instr_index << 2; /* exec the instruction in the delay slot */ mips64_exec_bdslot(cpu); /* set the new pc */ cpu->pc = new_pc; return(1);}/* JAL */static fastcall int mips64_exec_JAL(cpu_mips_t *cpu,mips_insn_t insn){ u_int instr_index = bits(insn,0,25); m_uint64_t new_pc; /* compute the new pc */ new_pc = cpu->pc & ~((1 << 28) - 1); new_pc |= instr_index << 2; /* set the return address (instruction after the delay slot) */ cpu->gpr[MIPS_GPR_RA] = cpu->pc + 8; /* exec the instruction in the delay slot */ mips64_exec_bdslot(cpu); /* set the new pc */ cpu->pc = new_pc; return(1);}/* JALR */static fastcall int mips64_exec_JALR(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rd = bits(insn,11,15); m_uint64_t new_pc; /* set the return pc (instruction after the delay slot) in GPR[rd] */ cpu->gpr[rd] = cpu->pc + 8; /* get the new pc */ new_pc = cpu->gpr[rs]; /* exec the instruction in the delay slot */ mips64_exec_bdslot(cpu); /* set the new pc */ cpu->pc = new_pc; return(1);}/* JR */static fastcall int mips64_exec_JR(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); m_uint64_t new_pc; /* get the new pc */ new_pc = cpu->gpr[rs]; /* exec the instruction in the delay slot */ mips64_exec_bdslot(cpu); /* set the new pc */ cpu->pc = new_pc; return(1);}/* LB (Load Byte) */static fastcall int mips64_exec_LB(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LB,base,offset,rt,TRUE); return(0);}/* LBU (Load Byte Unsigned) */static fastcall int mips64_exec_LBU(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LBU,base,offset,rt,TRUE); return(0);}/* LD (Load Double-Word) */static fastcall int mips64_exec_LD(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LD,base,offset,rt,TRUE); return(0);}/* LDC1 (Load Double-Word to Coprocessor 1) */static fastcall int mips64_exec_LDC1(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int ft = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LDC1,base,offset,ft,TRUE); return(0);}/* LDL (Load Double-Word Left) */static fastcall int mips64_exec_LDL(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LDL,base,offset,rt,TRUE); return(0);}/* LDR (Load Double-Word Right) */static fastcall int mips64_exec_LDR(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LDR,base,offset,rt,TRUE); return(0);}/* LH (Load Half-Word) */static fastcall int mips64_exec_LH(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LH,base,offset,rt,TRUE); return(0);}/* LHU (Load Half-Word Unsigned) */static fastcall int mips64_exec_LHU(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LHU,base,offset,rt,TRUE); return(0);}/* LI (virtual) */static fastcall int mips64_exec_LI(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int imm = bits(insn,0,15); cpu->gpr[rt] = sign_extend(imm,16); return(0);}/* LL (Load Linked) */static fastcall int mips64_exec_LL(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LL,base,offset,rt,TRUE); return(0);}/* LUI */static fastcall int mips64_exec_LUI(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int imm = bits(insn,0,15); cpu->gpr[rt] = sign_extend(imm,16) << 16; return(0);}/* LW (Load Word) */static fastcall int mips64_exec_LW(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LW,base,offset,rt,TRUE); return(0);}/* LWL (Load Word Left) */static fastcall int mips64_exec_LWL(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LWL,base,offset,rt,TRUE); return(0);}/* LWR (Load Word Right) */static fastcall int mips64_exec_LWR(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LWR,base,offset,rt,TRUE); return(0);}/* LWU (Load Word Unsigned) */static fastcall int mips64_exec_LWU(cpu_mips_t *cpu,mips_insn_t insn){ int base = bits(insn,21,25); int rt = bits(insn,16,20); int offset = bits(insn,0,15); mips64_exec_memop2(cpu,MIPS_MEMOP_LWU,base,offset,rt,TRUE); return(0);}/* MFC0 */static fastcall int mips64_exec_MFC0(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); mips64_cp0_exec_mfc0(cpu,rt,rd); return(0);}/* MFC1 */static fastcall int mips64_exec_MFC1(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); mips64_exec_mfc1(cpu,rt,rd); return(0);}/* MFHI */static fastcall int mips64_exec_MFHI(cpu_mips_t *cpu,mips_insn_t insn){ int rd = bits(insn,11,15); if (rd) cpu->gpr[rd] = cpu->hi; return(0);}/* MFLO */static fastcall int mips64_exec_MFLO(cpu_mips_t *cpu,mips_insn_t insn){ int rd = bits(insn,11,15); if (rd) cpu->gpr[rd] = cpu->lo; return(0);}/* MOVE (virtual instruction, real: ADDU) */static fastcall int mips64_exec_MOVE(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rd = bits(insn,11,15); cpu->gpr[rd] = sign_extend(cpu->gpr[rs],32); return(0);}/* MTC0 */static fastcall int mips64_exec_MTC0(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); mips64_cp0_exec_mtc0(cpu,rt,rd); return(0);}/* MTC1 */static fastcall int mips64_exec_MTC1(cpu_mips_t *cpu,mips_insn_t insn){ int rt = bits(insn,16,20); int rd = bits(insn,11,15); mips64_exec_mtc1(cpu,rt,rd); return(0);}/* MTHI */static fastcall int mips64_exec_MTHI(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); cpu->hi = cpu->gpr[rs]; return(0);}/* MTLO */static fastcall int mips64_exec_MTLO(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); cpu->lo = cpu->gpr[rs]; return(0);}/* MUL */static fastcall int mips64_exec_MUL(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rt = bits(insn,16,20); int rd = bits(insn,11,15); m_int32_t val; /* note: after this instruction, HI/LO regs are undefined */ val = (m_int32_t)cpu->gpr[rs] * (m_int32_t)cpu->gpr[rt]; cpu->gpr[rd] = sign_extend(val,32); return(0);}/* MULT */static fastcall int mips64_exec_MULT(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rt = bits(insn,16,20); m_int64_t val; val = (m_int64_t)(m_int32_t)cpu->gpr[rs]; val *= (m_int64_t)(m_int32_t)cpu->gpr[rt]; cpu->lo = sign_extend(val,32); cpu->hi = sign_extend(val >> 32,32); return(0);}/* MULTU */static fastcall int mips64_exec_MULTU(cpu_mips_t *cpu,mips_insn_t insn){ int rs = bits(insn,21,25); int rt = bits(insn,16,20); m_uint64_t val;
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