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📄 x86-codegen.h

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#define x86_div_membase(inst,basereg,disp,is_signed)	\	do {	\		*(inst)++ = (unsigned char)0xf7;	\		x86_membase_emit ((inst), 6 + ((is_signed) ? 1 : 0), (basereg), (disp));	\	} while (0)#define x86_mov_mem_reg(inst,mem,reg,size)	\	do {	\		switch ((size)) {	\		case 1: *(inst)++ = (unsigned char)0x88; break;	\		case 2: *(inst)++ = (unsigned char)0x66; /* fall through */	\		case 4: *(inst)++ = (unsigned char)0x89; break;	\		default: assert (0);	\		}	\		x86_mem_emit ((inst), (reg), (mem));	\	} while (0)#define x86_mov_regp_reg(inst,regp,reg,size)	\	do {	\		switch ((size)) {	\		case 1: *(inst)++ = (unsigned char)0x88; break;	\		case 2: *(inst)++ = (unsigned char)0x66; /* fall through */	\		case 4: *(inst)++ = (unsigned char)0x89; break;	\		default: assert (0);	\		}	\		x86_regp_emit ((inst), (reg), (regp));	\	} while (0)#define x86_mov_membase_reg(inst,basereg,disp,reg,size)	\	do {	\		switch ((size)) {	\		case 1: *(inst)++ = (unsigned char)0x88; break;	\		case 2: *(inst)++ = (unsigned char)0x66; /* fall through */	\		case 4: *(inst)++ = (unsigned char)0x89; break;	\		default: assert (0);	\		}	\		x86_membase_emit ((inst), (reg), (basereg), (disp));	\	} while (0)#define x86_mov_memindex_reg(inst,basereg,disp,indexreg,shift,reg,size)	\	do {	\		switch ((size)) {	\		case 1: *(inst)++ = (unsigned char)0x88; break;	\		case 2: *(inst)++ = (unsigned char)0x66; /* fall through */	\		case 4: *(inst)++ = (unsigned char)0x89; break;	\		default: assert (0);	\		}	\		x86_memindex_emit ((inst), (reg), (basereg), (disp), (indexreg), (shift));	\	} while (0)#define x86_mov_reg_reg(inst,dreg,reg,size)	\	do {	\		switch ((size)) {	\		case 1: *(inst)++ = (unsigned char)0x8a; break;	\		case 2: *(inst)++ = (unsigned char)0x66; /* fall through */	\		case 4: *(inst)++ = (unsigned char)0x8b; break;	\		default: assert (0);	\		}	\		x86_reg_emit ((inst), (dreg), (reg));	\	} while (0)#define x86_mov_reg_mem(inst,reg,mem,size)	\	do {	\		switch ((size)) {	\		case 1: *(inst)++ = (unsigned char)0x8a; break;	\		case 2: *(inst)++ = (unsigned char)0x66; /* fall through */	\		case 4: *(inst)++ = (unsigned char)0x8b; break;	\		default: assert (0);	\		}	\		x86_mem_emit ((inst), (reg), (mem));	\	} while (0)#define x86_mov_reg_membase(inst,reg,basereg,disp,size)	\	do {	\		switch ((size)) {	\		case 1: *(inst)++ = (unsigned char)0x8a; break;	\		case 2: *(inst)++ = (unsigned char)0x66; /* fall through */	\		case 4: *(inst)++ = (unsigned char)0x8b; break;	\		default: assert (0);	\		}	\		x86_membase_emit ((inst), (reg), (basereg), (disp));	\	} while (0)#define x86_mov_reg_memindex(inst,reg,basereg,disp,indexreg,shift,size)	\	do {	\		switch ((size)) {	\		case 1: *(inst)++ = (unsigned char)0x8a; break;	\		case 2: *(inst)++ = (unsigned char)0x66; /* fall through */	\		case 4: *(inst)++ = (unsigned char)0x8b; break;	\		default: assert (0);	\		}	\		x86_memindex_emit ((inst), (reg), (basereg), (disp), (indexreg), (shift));	\	} while (0)/* * Note: x86_clear_reg () chacnges the condition code! */#define x86_clear_reg(inst,reg) x86_alu_reg_reg((inst), X86_XOR, (reg), (reg))#define x86_mov_reg_imm(inst,reg,imm)	\	do {	\		*(inst)++ = (unsigned char)0xb8 + (reg);	\		x86_imm_emit32 ((inst), (imm));	\	} while (0)#define x86_mov_mem_imm(inst,mem,imm,size)	\	do {	\		if ((size) == 1) {	\			*(inst)++ = (unsigned char)0xc6;	\			x86_mem_emit ((inst), 0, (mem));	\			x86_imm_emit8 ((inst), (imm));	\		} else if ((size) == 2) {	\			*(inst)++ = (unsigned char)0x66;	\			*(inst)++ = (unsigned char)0xc7;	\			x86_mem_emit ((inst), 0, (mem));	\			x86_imm_emit16 ((inst), (imm));	\		} else {	\			*(inst)++ = (unsigned char)0xc7;	\			x86_mem_emit ((inst), 0, (mem));	\			x86_imm_emit32 ((inst), (imm));	\		}	\	} while (0)#define x86_mov_membase_imm(inst,basereg,disp,imm,size)	\	do {	\		if ((size) == 1) {	\			*(inst)++ = (unsigned char)0xc6;	\			x86_membase_emit ((inst), 0, (basereg), (disp));	\			x86_imm_emit8 ((inst), (imm));	\		} else if ((size) == 2) {	\			*(inst)++ = (unsigned char)0x66;	\			*(inst)++ = (unsigned char)0xc7;	\			x86_membase_emit ((inst), 0, (basereg), (disp));	\			x86_imm_emit16 ((inst), (imm));	\		} else {	\			*(inst)++ = (unsigned char)0xc7;	\			x86_membase_emit ((inst), 0, (basereg), (disp));	\			x86_imm_emit32 ((inst), (imm));	\		}	\	} while (0)#define x86_mov_memindex_imm(inst,basereg,disp,indexreg,shift,imm,size)	\	do {	\		if ((size) == 1) {	\			*(inst)++ = (unsigned char)0xc6;	\			x86_memindex_emit ((inst), 0, (basereg), (disp), (indexreg), (shift));	\			x86_imm_emit8 ((inst), (imm));	\		} else if ((size) == 2) {	\			*(inst)++ = (unsigned char)0x66;	\			*(inst)++ = (unsigned char)0xc7;	\			x86_memindex_emit ((inst), 0, (basereg), (disp), (indexreg), (shift));	\			x86_imm_emit16 ((inst), (imm));	\		} else {	\			*(inst)++ = (unsigned char)0xc7;	\			x86_memindex_emit ((inst), 0, (basereg), (disp), (indexreg), (shift));	\			x86_imm_emit32 ((inst), (imm));	\		}	\	} while (0)#define x86_lea_mem(inst,reg,mem)	\	do {	\		*(inst)++ = (unsigned char)0x8d;	\		x86_mem_emit ((inst), (reg), (mem));	\	} while (0)#define x86_lea_membase(inst,reg,basereg,disp)	\	do {	\		*(inst)++ = (unsigned char)0x8d;	\		x86_membase_emit ((inst), (reg), (basereg), (disp));	\	} while (0)#define x86_lea_memindex(inst,reg,basereg,disp,indexreg,shift)	\	do {	\		*(inst)++ = (unsigned char)0x8d;	\		x86_memindex_emit ((inst), (reg), (basereg), (disp), (indexreg), (shift));	\	} while (0)#define x86_widen_reg(inst,dreg,reg,is_signed,is_half)	\	do {	\		unsigned char op = 0xb6;	\                assert (is_half ||  X86_IS_BYTE_REG (reg)); \		*(inst)++ = (unsigned char)0x0f;	\		if ((is_signed)) op += 0x08;	\		if ((is_half)) op += 0x01;	\		*(inst)++ = op;	\		x86_reg_emit ((inst), (dreg), (reg));	\	} while (0)#define x86_widen_mem(inst,dreg,mem,is_signed,is_half)	\	do {	\		unsigned char op = 0xb6;	\		*(inst)++ = (unsigned char)0x0f;	\		if ((is_signed)) op += 0x08;	\		if ((is_half)) op += 0x01;	\		*(inst)++ = op;	\		x86_mem_emit ((inst), (dreg), (mem));	\	} while (0)#define x86_widen_membase(inst,dreg,basereg,disp,is_signed,is_half)	\	do {	\		unsigned char op = 0xb6;	\		*(inst)++ = (unsigned char)0x0f;	\		if ((is_signed)) op += 0x08;	\		if ((is_half)) op += 0x01;	\		*(inst)++ = op;	\		x86_membase_emit ((inst), (dreg), (basereg), (disp));	\	} while (0)#define x86_widen_memindex(inst,dreg,basereg,disp,indexreg,shift,is_signed,is_half)	\	do {	\		unsigned char op = 0xb6;	\		*(inst)++ = (unsigned char)0x0f;	\		if ((is_signed)) op += 0x08;	\		if ((is_half)) op += 0x01;	\		*(inst)++ = op;	\		x86_memindex_emit ((inst), (dreg), (basereg), (disp), (indexreg), (shift));	\	} while (0)#define x86_lahf(inst)  do { *(inst)++ = (unsigned char)0x9f; } while (0)#define x86_sahf(inst)  do { *(inst)++ = (unsigned char)0x9e; } while (0)#define x86_xchg_ah_al(inst) \       do { \                *(inst)++ = (unsigned char)0x86; \                *(inst)++ = (unsigned char)0xe0; \       } while (0)#define x86_cdq(inst)  do { *(inst)++ = (unsigned char)0x99; } while (0)#define x86_wait(inst) do { *(inst)++ = (unsigned char)0x9b; } while (0)#define x86_fp_op_mem(inst,opc,mem,is_double)	\	do {	\		*(inst)++ = (is_double) ? (unsigned char)0xdc : (unsigned char)0xd8;	\		x86_mem_emit ((inst), (opc), (mem));	\	} while (0)#define x86_fp_op_membase(inst,opc,basereg,disp,is_double)	\	do {	\		*(inst)++ = (is_double) ? (unsigned char)0xdc : (unsigned char)0xd8;	\		x86_membase_emit ((inst), (opc), (basereg), (disp));	\	} while (0)#define x86_fp_op(inst,opc,index)	\	do {	\		*(inst)++ = (unsigned char)0xd8;	\		*(inst)++ = (unsigned char)0xc0+((opc)<<3)+((index)&0x07);	\	} while (0)#define x86_fp_op_reg(inst,opc,index,pop_stack)	\	do {	\		static const unsigned char map[] = { 0, 1, 2, 3, 5, 4, 7, 6, 8};	\		*(inst)++ = (pop_stack) ? (unsigned char)0xde : (unsigned char)0xdc;	\		*(inst)++ = (unsigned char)0xc0+(map[(opc)]<<3)+((index)&0x07);	\	} while (0)/** * @x86_fp_int_op_membase * Supports FPU operations between ST(0) and integer operand in memory. * Operation encoded using X86_FP_Opcode enum. * Operand is addressed by [basereg + disp]. * is_int specifies whether operand is int32 (TRUE) or int16 (FALSE). */#define x86_fp_int_op_membase(inst,opc,basereg,disp,is_int)	\	do {	\		*(inst)++ = (is_int) ? (unsigned char)0xda : (unsigned char)0xde;	\		x86_membase_emit ((inst), opc, (basereg), (disp));	\	} while (0)#define x86_fstp(inst,index)	\	do {	\		*(inst)++ = (unsigned char)0xdd;	\		*(inst)++ = (unsigned char)0xd8+(index);	\	} while (0)#define x86_fcompp(inst)	\	do {	\		*(inst)++ = (unsigned char)0xde;	\		*(inst)++ = (unsigned char)0xd9;	\	} while (0)#define x86_fucompp(inst)	\	do {	\		*(inst)++ = (unsigned char)0xda;	\		*(inst)++ = (unsigned char)0xe9;	\	} while (0)#define x86_fnstsw(inst)	\	do {	\		*(inst)++ = (unsigned char)0xdf;	\		*(inst)++ = (unsigned char)0xe0;	\	} while (0)#define x86_fnstcw(inst,mem)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		x86_mem_emit ((inst), 7, (mem));	\	} while (0)#define x86_fnstcw_membase(inst,basereg,disp)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		x86_membase_emit ((inst), 7, (basereg), (disp));	\	} while (0)#define x86_fldcw(inst,mem)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		x86_mem_emit ((inst), 5, (mem));	\	} while (0)#define x86_fldcw_membase(inst,basereg,disp)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		x86_membase_emit ((inst), 5, (basereg), (disp));	\	} while (0)#define x86_fchs(inst)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		*(inst)++ = (unsigned char)0xe0;	\	} while (0)#define x86_frem(inst)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		*(inst)++ = (unsigned char)0xf8;	\	} while (0)#define x86_fxch(inst,index)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		*(inst)++ = (unsigned char)0xc8 + ((index) & 0x07);	\	} while (0)#define x86_fcomi(inst,index)	\	do {	\		*(inst)++ = (unsigned char)0xdb;	\		*(inst)++ = (unsigned char)0xf0 + ((index) & 0x07);	\	} while (0)#define x86_fcomip(inst,index)	\	do {	\		*(inst)++ = (unsigned char)0xdf;	\		*(inst)++ = (unsigned char)0xf0 + ((index) & 0x07);	\	} while (0)#define x86_fucomi(inst,index)	\	do {	\		*(inst)++ = (unsigned char)0xdb;	\		*(inst)++ = (unsigned char)0xe8 + ((index) & 0x07);	\	} while (0)#define x86_fucomip(inst,index)	\	do {	\		*(inst)++ = (unsigned char)0xdf;	\		*(inst)++ = (unsigned char)0xe8 + ((index) & 0x07);	\	} while (0)#define x86_fld(inst,mem,is_double)	\	do {	\		*(inst)++ = (is_double) ? (unsigned char)0xdd : (unsigned char)0xd9;	\		x86_mem_emit ((inst), 0, (mem));	\	} while (0)#define x86_fld_membase(inst,basereg,disp,is_double)	\	do {	\		*(inst)++ = (is_double) ? (unsigned char)0xdd : (unsigned char)0xd9;	\		x86_membase_emit ((inst), 0, (basereg), (disp));	\	} while (0)#define x86_fld80_mem(inst,mem)	\	do {	\		*(inst)++ = (unsigned char)0xdb;	\		x86_mem_emit ((inst), 5, (mem));	\	} while (0)#define x86_fld80_membase(inst,basereg,disp)	\	do {	\		*(inst)++ = (unsigned char)0xdb;	\		x86_membase_emit ((inst), 5, (basereg), (disp));	\	} while (0)#define x86_fild(inst,mem,is_long)	\	do {	\		if ((is_long)) {	\			*(inst)++ = (unsigned char)0xdf;	\			x86_mem_emit ((inst), 5, (mem));	\		} else {	\			*(inst)++ = (unsigned char)0xdb;	\			x86_mem_emit ((inst), 0, (mem));	\		}	\	} while (0)#define x86_fild_membase(inst,basereg,disp,is_long)	\	do {	\		if ((is_long)) {	\			*(inst)++ = (unsigned char)0xdf;	\			x86_membase_emit ((inst), 5, (basereg), (disp));	\		} else {	\			*(inst)++ = (unsigned char)0xdb;	\			x86_membase_emit ((inst), 0, (basereg), (disp));	\		}	\	} while (0)#define x86_fld_reg(inst,index)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		*(inst)++ = (unsigned char)0xc0 + ((index) & 0x07);	\	} while (0)#define x86_fldz(inst)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		*(inst)++ = (unsigned char)0xee;	\	} while (0)#define x86_fld1(inst)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		*(inst)++ = (unsigned char)0xe8;	\	} while (0)#define x86_fldpi(inst)	\	do {	\		*(inst)++ = (unsigned char)0xd9;	\		*(inst)++ = (unsigned char)0xeb;	\	} while (0)

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