blg.vhd.txt

lattice isplever7竟然没有除法库,只好在网上找了老外写的vhdl除法器

-------------------------------------------------------------------------------
--
-- Universitaet Heidelberg
-- Kirchhoff-Institut fuer Physik
-- Lehrstuhl fuer Technische Informatik
--
-- Filename:      blg.vhd
-- Author:        Jan de Cuveland
-- Description:   Customizable Borrow-Lookahead Generator
-- Comment:       
--
-- Version history:
-------------------------------------------------------------------------------
-- Version  | Author      | Date     | Modification
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--  1.0     | de Cuveland | 26.09.00 |  created
-------------------------------------------------------------------------------

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_signed.all;

--LIBRARY IEEE, DW01, DW02, DW06, synopsys;
--LIBRARY csx_HRDLIB;
--USE IEEE.std_logic_1164.ALL;  
--USE IEEE.std_logic_signed.ALL;
--use DW01.DW01_components.all;
--use csx_HRDLIB.all;
--use DW02.DW02_components.all;
--use DW06.DW06_components.all;
--use Synopsys.attributes.all;

-------------------------------------------------------------------------------
-- ENTITY
-------------------------------------------------------------------------------
entity blg is
  generic ( WIDTH    : integer := 4;
            CIN_USED : integer := 0 );
  port ( A, B : in  std_logic_vector(WIDTH-1 downto 0);
         CIN  : in  std_logic;
         C    : out std_logic_vector(WIDTH downto 1) );
end blg;

-------------------------------------------------------------------------------
-- ARCHITECTURE
-------------------------------------------------------------------------------
architecture RTL of blg is

  signal g, p : std_logic_vector(WIDTH-1 downto 0);
--signal o1, o2, o3, o4, o5, o6, o7, o8: std_logic;

begin

  GP_GEN : for i in WIDTH-1 downto 0 generate
    g(i) <= (not A(i)) and B(i);
    p(i) <= (not A(i)) or B(i);
  end generate;

  WITH_CIN : if not (CIN_USED = 0) generate

    C1_GEN : if WIDTH >= 1 generate
      C(1) <= (g(0) or
               (CIN and p(0)));
    end generate;

    C2_GEN : if WIDTH >= 2 generate
      C(2) <= (g(1) or
               (g(0) and p(1)) or
               (CIN and p(0) and p(1)));
    end generate;

    C3_GEN : if WIDTH >= 3 generate
      C(3) <= (g(2) or
               (g(1) and p(2)) or
               (g(0) and p(1) and p(2)) or
               (CIN and p(0) and p(1) and p(2)));
    end generate;

    C4_GEN : if WIDTH >= 4 generate
      C(4) <= (g(3) or
               (g(2) and p(3)) or
               (g(1) and p(2) and p(3)) or
               (g(0) and p(1) and p(2) and p(3)) or
               (CIN and p(0) and p(1) and p(2) and p(3)));
    end generate;

    C5_GEN : if WIDTH >= 5 generate
      C(5) <= (g(4) or
               (g(3) and p(4)) or
               (g(2) and p(3) and p(4)) or
               (g(1) and p(2) and p(3) and p(4)) or
               (g(0) and p(1) and p(2) and p(3) and p(4)) or
               (CIN and p(0) and p(1) and p(2) and p(3) and p(4)));
    end generate;

    C6_GEN : if WIDTH >= 6 generate
      C(6) <= (g(5) or
               (g(4) and p(5)) or
               (g(3) and p(4) and p(5)) or
               (g(2) and p(3) and p(4) and p(5)) or
               (g(1) and p(2) and p(3) and p(4) and p(5)) or
               (g(0) and p(1) and p(2) and p(3) and p(4) and p(5)) or
               (CIN and p(0) and p(1) and p(2) and p(3) and p(4) and p(5)));
    end generate;

    C7_GEN : if WIDTH >= 7 generate
      C(7) <= (g(6) or
               (g(5) and p(6)) or
               (g(4) and p(5) and p(6)) or
               (g(3) and p(4) and p(5) and p(6)) or
               (g(2) and p(3) and p(4) and p(5) and p(6)) or
               (g(1) and p(2) and p(3) and p(4) and p(5) and p(6)) or
               (g(0) and p(1) and p(2) and p(3) and p(4) and p(5) and p(6)) or
               (CIN and p(0) and p(1) and p(2) and p(3) and p(4) and p(5)
                and p(6)));
    end generate;

    C8_GEN : if WIDTH >= 8 generate
      C(8) <= (g(7) or
               (g(6) and p(7)) or
               (g(5) and p(6) and p(7)) or
               (g(4) and p(5) and p(6) and p(7)) or
               (g(3) and p(4) and p(5) and p(6) and p(7)) or
               (g(2) and p(3) and p(4) and p(5) and p(6) and p(7)) or
               (g(1) and p(2) and p(3) and p(4) and p(5) and p(6) and p(7)) or
               (g(0) and p(1) and p(2) and p(3) and p(4) and p(5) and p(6)
                and p(7))
               or (CIN and p(0) and p(1) and p(2) and p(3) and p(4) and p(5)
                   and p(6) and p(7)));
    end generate;

  end generate;

  WITHOUT_CIN : if (CIN_USED = 0) generate

    C1_GEN : if WIDTH >= 1 generate
      C(1) <= (g(0));
    end generate;

    C2_GEN : if WIDTH >= 2 generate
      C(2) <= (g(1) or
               (g(0) and p(1)));
    end generate;

    C3_GEN : if WIDTH >= 3 generate
      C(3) <= (g(2) or
               (g(1) and p(2)) or
               (g(0) and p(1) and p(2)));
    end generate;

    C4_GEN : if WIDTH >= 4 generate
      C(4) <= (g(3) or
               (g(2) and p(3)) or
               (g(1) and p(2) and p(3)) or
               (g(0) and p(1) and p(2) and p(3)));
    end generate;

    C5_GEN : if WIDTH >= 5 generate
      C(5) <= (g(4) or
               (g(3) and p(4)) or
               (g(2) and p(3) and p(4)) or
               (g(1) and p(2) and p(3) and p(4)) or
               (g(0) and p(1) and p(2) and p(3) and p(4)));
    end generate;

    C6_GEN : if WIDTH >= 6 generate
      C(6) <= (g(5) or
               (g(4) and p(5)) or
               (g(3) and p(4) and p(5)) or
               (g(2) and p(3) and p(4) and p(5)) or
               (g(1) and p(2) and p(3) and p(4) and p(5)) or
               (g(0) and p(1) and p(2) and p(3) and p(4) and p(5)));
    end generate;

    C7_GEN : if WIDTH >= 7 generate
      C(7) <= (g(6) or
               (g(5) and p(6)) or
               (g(4) and p(5) and p(6)) or
               (g(3) and p(4) and p(5) and p(6)) or
               (g(2) and p(3) and p(4) and p(5) and p(6)) or
               (g(1) and p(2) and p(3) and p(4) and p(5) and p(6)) or
               (g(0) and p(1) and p(2) and p(3) and p(4) and p(5) and p(6)));
    end generate;

    C8_GEN : if WIDTH >= 8 generate
      C(8) <= (g(7) or
               (g(6) and p(7)) or
               (g(5) and p(6) and p(7)) or
               (g(4) and p(5) and p(6) and p(7)) or
               (g(3) and p(4) and p(5) and p(6) and p(7)) or
               (g(2) and p(3) and p(4) and p(5) and p(6) and p(7)) or
               (g(1) and p(2) and p(3) and p(4) and p(5) and p(6) and p(7)) or
               (g(0) and p(1) and p(2) and p(3) and p(4) and p(5) and p(6)
                and p(7)));
    end generate;

    C9_GEN : if WIDTH >= 9 generate
      C(9) <= (g(8) or
               (g(7) and p(8)) or
               (g(6) and p(7) and p(8)) or
               (g(5) and p(6) and p(7) and p(8)) or
               (g(4) and p(5) and p(6) and p(7) and p(8)) or