cs_cell.vhd.txt

lattice isplever7竟然没有除法库,只好在网上找了老外写的vhdl除法器

-------------------------------------------------------------------------------
--
-- Universitaet Heidelberg
-- Kirchhoff-Institut fuer Physik
-- Lehrstuhl fuer Technische Informatik
--
-- Filename:      cs_cell.vhd
-- Author:        Jan de Cuveland
-- Description:   controlled subtractor cell
-- Comment:       
--
-- Version history:
-------------------------------------------------------------------------------
-- Version  | Author      | Date     | Modification
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--  1.0     | de Cuveland | 25.08.00 |  created
-------------------------------------------------------------------------------

LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;  
USE IEEE.std_logic_signed.ALL;

-------------------------------------------------------------------------------
-- ENTITY
-------------------------------------------------------------------------------
entity cs_cell is
	generic ( USE_CO: integer := 1 );
	port (	a, b, e, ci: in std_logic;
		co, s: out std_logic );
end cs_cell;

-------------------------------------------------------------------------------
-- ARCHITECTURE
-------------------------------------------------------------------------------
architecture behavioral of cs_cell is

signal	diff	: std_logic;

begin

CO_GEN: if not (USE_CO = 0) generate
	co <= (not a and b) or (not a and ci) or (b and ci);
end generate;

diff <= not (not (a xor b) xor ci);
s <= (diff and e) or (a and not e);

--Gleichungen fuer Vollsubtrahierer:
--DIF = NOT (NOT (A XOR B) XOR Bin)
--Bout = (NOT A AND B) OR (NOT A AND Bin) OR (B AND Bin)

end behavioral;

-------------------------------------------------------------------------------
-- CONFIGURATION
-------------------------------------------------------------------------------
-- synopsys translate_off

configuration cs_cell_CFG of cs_cell is
	for behavioral
	end for;
end cs_cell_CFG;

-- synopsys translate_on