📄 main.lss
字号:
CC1000HPLWrite(0x09, CC1000ControlM_gCurrentParameters[0x09]);
CC1000HPLWrite(0x0B, 0x00);
OSH_uwait(250);
return SUCCESS;
}
result_t CC1000ControlStdControlStop(void)
{
CC1000HPLWrite(0x0B, 0x00);
CC1000HPLWrite(0x00, (((((
1 << 5) | (1 << 4)) | (
1 << 3)) | (1 << 2)) | (1 << 1)) | (
1 << 0));
return SUCCESS;
}
result_t CC1000HPLWrite(uint8_t addr, uint8_t data)
{
9b2: 0f 93 push r16
9b4: 1f 93 push r17
9b6: cf 93 push r28
9b8: 06 2f mov r16, r22
char cnt = 0;
addr <<= 1;
9ba: c8 2f mov r28, r24
9bc: cc 0f add r28, r28
OSH_CLR_CC_PALE_PIN();
9be: 0e 94 de 06 call 0xdbc
9c2: 16 e0 ldi r17, 0x06 ; 6
for (cnt = 0; cnt < 7; cnt++)
{
if (addr & 0x80) {
9c4: c7 ff sbrs r28, 7
9c6: 03 c0 rjmp .+6 ; 0x9ce
OSH_SET_CC_PDATA_PIN();
9c8: 0e 94 d6 06 call 0xdac
9cc: 02 c0 rjmp .+4 ; 0x9d2
}
else {
OSH_CLR_CC_PDATA_PIN();
9ce: 0e 94 e0 06 call 0xdc0
}
OSH_CLR_CC_PCLK_PIN();
9d2: 0e 94 e2 06 call 0xdc4
OSH_SET_CC_PCLK_PIN();
9d6: 0e 94 d4 06 call 0xda8
addr <<= 1;
9da: cc 0f add r28, r28
9dc: 11 50 subi r17, 0x01 ; 1
9de: 17 ff sbrs r17, 7
9e0: f1 cf rjmp .-30 ; 0x9c4
}
OSH_SET_CC_PDATA_PIN();
9e2: 0e 94 d6 06 call 0xdac
OSH_CLR_CC_PCLK_PIN();
9e6: 0e 94 e2 06 call 0xdc4
OSH_SET_CC_PCLK_PIN();
9ea: 0e 94 d4 06 call 0xda8
OSH_SET_CC_PALE_PIN();
9ee: 0e 94 d8 06 call 0xdb0
9f2: 17 e0 ldi r17, 0x07 ; 7
for (cnt = 0; cnt < 8; cnt++)
{
if (data & 0x80) {
9f4: 07 ff sbrs r16, 7
9f6: 03 c0 rjmp .+6 ; 0x9fe
OSH_SET_CC_PDATA_PIN();
9f8: 0e 94 d6 06 call 0xdac
9fc: 02 c0 rjmp .+4 ; 0xa02
}
else {
OSH_CLR_CC_PDATA_PIN();
9fe: 0e 94 e0 06 call 0xdc0
}
OSH_CLR_CC_PCLK_PIN();
a02: 0e 94 e2 06 call 0xdc4
OSH_SET_CC_PCLK_PIN();
a06: 0e 94 d4 06 call 0xda8
data <<= 1;
a0a: 00 0f add r16, r16
a0c: 11 50 subi r17, 0x01 ; 1
a0e: 17 ff sbrs r17, 7
a10: f1 cf rjmp .-30 ; 0x9f4
}
OSH_SET_CC_PALE_PIN();
a12: 0e 94 d8 06 call 0xdb0
OSH_SET_CC_PDATA_PIN();
a16: 0e 94 d6 06 call 0xdac
OSH_SET_CC_PCLK_PIN();
a1a: 0e 94 d4 06 call 0xda8
return SUCCESS;
}
a1e: 81 e0 ldi r24, 0x01 ; 1
a20: 90 e0 ldi r25, 0x00 ; 0
a22: cf 91 pop r28
a24: 1f 91 pop r17
a26: 0f 91 pop r16
a28: 08 95 ret
00000a2a <CC1000ControlStdControlStop>:
a2a: 60 e0 ldi r22, 0x00 ; 0
a2c: 8b e0 ldi r24, 0x0B ; 11
a2e: 0e 94 d9 04 call 0x9b2
a32: 6f e3 ldi r22, 0x3F ; 63
a34: 80 e0 ldi r24, 0x00 ; 0
a36: 0e 94 d9 04 call 0x9b2
a3a: 81 e0 ldi r24, 0x01 ; 1
a3c: 90 e0 ldi r25, 0x00 ; 0
a3e: 08 95 ret
00000a40 <CC1000ControlRxMode>:
a40: 61 e1 ldi r22, 0x11 ; 17
a42: 80 e0 ldi r24, 0x00 ; 0
a44: 0e 94 d9 04 call 0x9b2
a48: 60 91 71 01 lds r22, 0x0171
a4c: 89 e0 ldi r24, 0x09 ; 9
a4e: 0e 94 d9 04 call 0x9b2
a52: 60 e0 ldi r22, 0x00 ; 0
a54: 8b e0 ldi r24, 0x0B ; 11
a56: 0e 94 d9 04 call 0x9b2
a5a: 8a ef ldi r24, 0xFA ; 250
a5c: 90 e0 ldi r25, 0x00 ; 0
a5e: 0e 94 84 08 call 0x1108
a62: 81 e0 ldi r24, 0x01 ; 1
a64: 90 e0 ldi r25, 0x00 ; 0
a66: 08 95 ret
00000a68 <CC1000ControlTxMode>:
a68: 61 ee ldi r22, 0xE1 ; 225
a6a: 80 e0 ldi r24, 0x00 ; 0
a6c: 0e 94 d9 04 call 0x9b2
a70: 60 91 85 01 lds r22, 0x0185
a74: 89 e0 ldi r24, 0x09 ; 9
a76: 0e 94 d9 04 call 0x9b2
a7a: 8a ef ldi r24, 0xFA ; 250
a7c: 90 e0 ldi r25, 0x00 ; 0
a7e: 0e 94 84 08 call 0x1108
a82: 60 91 73 01 lds r22, 0x0173
a86: 8b e0 ldi r24, 0x0B ; 11
a88: 0e 94 d9 04 call 0x9b2
a8c: 84 e1 ldi r24, 0x14 ; 20
a8e: 90 e0 ldi r25, 0x00 ; 0
a90: 0e 94 84 08 call 0x1108
a94: 81 e0 ldi r24, 0x01 ; 1
a96: 90 e0 ldi r25, 0x00 ; 0
a98: 08 95 ret
00000a9a <CC1000ControlStdControlStart>:
a9a: 6b e3 ldi r22, 0x3B ; 59
a9c: 80 e0 ldi r24, 0x00 ; 0
a9e: 0e 94 d9 04 call 0x9b2
aa2: 80 ed ldi r24, 0xD0 ; 208
aa4: 97 e0 ldi r25, 0x07 ; 7
aa6: 0e 94 84 08 call 0x1108
aaa: 81 e0 ldi r24, 0x01 ; 1
aac: 90 e0 ldi r25, 0x00 ; 0
aae: 08 95 ret
00000ab0 <CC1000ControlBIASOn>:
ab0: 69 e3 ldi r22, 0x39 ; 57
ab2: 80 e0 ldi r24, 0x00 ; 0
ab4: 0e 94 d9 04 call 0x9b2
ab8: 88 ec ldi r24, 0xC8 ; 200
aba: 90 e0 ldi r25, 0x00 ; 0
abc: 0e 94 84 08 call 0x1108
ac0: 81 e0 ldi r24, 0x01 ; 1
ac2: 90 e0 ldi r25, 0x00 ; 0
ac4: 08 95 ret
00000ac6 <CC1000ControlCC1000SetModem>:
ac6: 60 91 77 01 lds r22, 0x0177
aca: 8f e0 ldi r24, 0x0F ; 15
acc: 0e 94 d9 04 call 0x9b2
ad0: 60 91 78 01 lds r22, 0x0178
ad4: 80 e1 ldi r24, 0x10 ; 16
ad6: 0e 94 d9 04 call 0x9b2
ada: 60 91 79 01 lds r22, 0x0179
ade: 81 e1 ldi r24, 0x11 ; 17
ae0: 0e 94 d9 04 call 0x9b2
ae4: 08 95 ret
00000ae6 <CC1000ControlSelectLock>:
ae6: 82 95 swap r24
ae8: 80 7f andi r24, 0xF0 ; 240
aea: 80 93 75 01 sts 0x0175, r24
aee: 68 2f mov r22, r24
af0: 8d e0 ldi r24, 0x0D ; 13
af2: 0e 94 d9 04 call 0x9b2
af6: 99 27 eor r25, r25
af8: 08 95 ret
00000afa <CC1000HPLRead>:
uint8_t CC1000HPLRead(uint8_t addr)
{
afa: 0f 93 push r16
afc: 1f 93 push r17
afe: cf 93 push r28
b00: df 93 push r29
int cnt;
uint8_t din;
uint8_t data = 0;
b02: 00 e0 ldi r16, 0x00 ; 0
addr <<= 1;
b04: 18 2f mov r17, r24
b06: 11 0f add r17, r17
OSH_CLR_CC_PALE_PIN();
b08: 0e 94 de 06 call 0xdbc
b0c: c6 e0 ldi r28, 0x06 ; 6
b0e: d0 e0 ldi r29, 0x00 ; 0
for (cnt = 0; cnt < 7; cnt++)
{
if (addr & 0x80) {
b10: 17 ff sbrs r17, 7
b12: 03 c0 rjmp .+6 ; 0xb1a
OSH_SET_CC_PDATA_PIN();
b14: 0e 94 d6 06 call 0xdac
b18: 02 c0 rjmp .+4 ; 0xb1e
}
else {
OSH_CLR_CC_PDATA_PIN();
b1a: 0e 94 e0 06 call 0xdc0
}
OSH_CLR_CC_PCLK_PIN();
b1e: 0e 94 e2 06 call 0xdc4
OSH_SET_CC_PCLK_PIN();
b22: 0e 94 d4 06 call 0xda8
addr <<= 1;
b26: 11 0f add r17, r17
b28: 21 97 sbiw r28, 0x01 ; 1
b2a: d7 ff sbrs r29, 7
b2c: f1 cf rjmp .-30 ; 0xb10
b2e: c7 e0 ldi r28, 0x07 ; 7
b30: d0 e0 ldi r29, 0x00 ; 0
}
OSH_CLR_CC_PDATA_PIN();
b32: 0e 94 e0 06 call 0xdc0
OSH_CLR_CC_PCLK_PIN();
b36: 0e 94 e2 06 call 0xdc4
OSH_SET_CC_PCLK_PIN();
b3a: 0e 94 d4 06 call 0xda8
OSH_MAKE_CC_PDATA_INPUT();
b3e: 0e 94 e4 06 call 0xdc8
OSH_SET_CC_PALE_PIN();
b42: 0e 94 d8 06 call 0xdb0
for (cnt = 7; cnt >= 0; cnt--)
{
OSH_CLR_CC_PCLK_PIN();
b46: 0e 94 e2 06 call 0xdc4
din = OSH_READ_CC_PDATA_PIN();
b4a: 0e 94 e6 06 call 0xdcc
b4e: 20 2f mov r18, r16
b50: 33 27 eor r19, r19
b52: 21 97 sbiw r28, 0x01 ; 1
if (din) {
b54: 88 23 and r24, r24
b56: 29 f0 breq .+10 ; 0xb62
data = (data << 1) | 0x01;
b58: 22 0f add r18, r18
b5a: 33 1f adc r19, r19
b5c: 02 2f mov r16, r18
b5e: 01 60 ori r16, 0x01 ; 1
b60: 02 c0 rjmp .+4 ; 0xb66
}
else {
data = (data << 1) & 0xfe;
b62: 02 2f mov r16, r18
b64: 00 0f add r16, r16
}
OSH_SET_CC_PCLK_PIN();
b66: 0e 94 d4 06 call 0xda8
b6a: d7 ff sbrs r29, 7
b6c: ec cf rjmp .-40 ; 0xb46
}
OSH_SET_CC_PALE_PIN();
b6e: 0e 94 d8 06 call 0xdb0
OSH_MAKE_CC_PDATA_OUTPUT();
b72: 0e 94 89 06 call 0xd12
OSH_SET_CC_PDATA_PIN();
b76: 0e 94 d6 06 call 0xdac
return data;
}
b7a: 80 2f mov r24, r16
b7c: 99 27 eor r25, r25
b7e: df 91 pop r29
b80: cf 91 pop r28
b82: 1f 91 pop r17
b84: 0f 91 pop r16
b86: 08 95 ret
00000b88 <CC1000ControlChipconCal>:
b88: cf 93 push r28
b8a: df 93 push r29
b8c: 60 e0 ldi r22, 0x00 ; 0
b8e: 8b e0 ldi r24, 0x0B ; 11
b90: 0e 94 d9 04 call 0x9b2
b94: 6f e3 ldi r22, 0x3F ; 63
b96: 82 e4 ldi r24, 0x42 ; 66
b98: 0e 94 d9 04 call 0x9b2
b9c: 61 e1 ldi r22, 0x11 ; 17
b9e: 80 e0 ldi r24, 0x00 ; 0
ba0: 0e 94 d9 04 call 0x9b2
ba4: 66 ea ldi r22, 0xA6 ; 166
ba6: 8e e0 ldi r24, 0x0E ; 14
ba8: 0e 94 d9 04 call 0x9b2
bac: 8e e0 ldi r24, 0x0E ; 14
bae: 0e 94 7d 05 call 0xafa
bb2: 83 ff sbrs r24, 3
bb4: fb cf rjmp .-10 ; 0xbac
bb6: 66 e2 ldi r22, 0x26 ; 38
bb8: 8e e0 ldi r24, 0x0E ; 14
bba: 0e 94 d9 04 call 0x9b2
bbe: 61 ee ldi r22, 0xE1 ; 225
bc0: 80 e0 ldi r24, 0x00 ; 0
bc2: 0e 94 d9 04 call 0x9b2
bc6: 60 91 85 01 lds r22, 0x0185
bca: 89 e0 ldi r24, 0x09 ; 9
bcc: 0e 94 d9 04 call 0x9b2
bd0: 60 e0 ldi r22, 0x00 ; 0
bd2: 8b e0 ldi r24, 0x0B ; 11
bd4: 0e 94 d9 04 call 0x9b2
bd8: 66 ea ldi r22, 0xA6 ; 166
bda: 8e e0 ldi r24, 0x0E ; 14
bdc: 0e 94 d9 04 call 0x9b2
be0: 8e e0 ldi r24, 0x0E ; 14
be2: 0e 94 7d 05 call 0xafa
be6: 99 27 eor r25, r25
be8: f3 e0 ldi r31, 0x03 ; 3
bea: 96 95 lsr r25
bec: 87 95 ror r24
bee: fa 95 dec r31
bf0: e1 f7 brne .-8 ; 0xbea
bf2: c1 e0 ldi r28, 0x01 ; 1
bf4: d0 e0 ldi r29, 0x00 ; 0
bf6: 8c 23 and r24, r28
bf8: 9d 23 and r25, r29
bfa: 8c 17 cp r24, r28
bfc: 9d 07 cpc r25, r29
bfe: 81 f7 brne .-32 ; 0xbe0
c00: 66 e2 ldi r22, 0x26 ; 38
c02: 8e e0 ldi r24, 0x0E ; 14
c04: 0e 94 d9 04 call 0x9b2
c08: ce 01 movw r24, r28
c0a: df 91 pop r29
c0c: cf 91 pop r28
c0e: 08 95 ret
00000c10 <CC1000ControlCC1000SetFreq>:
c10: 0f 93 push r16
c12: 1f 93 push r17
c14: cf 93 push r28
c16: c1 e0 ldi r28, 0x01 ; 1
c18: 09 e6 ldi r16, 0x69 ; 105
c1a: 11 e0 ldi r17, 0x01 ; 1
c1c: f8 01 movw r30, r16
c1e: 61 91 ld r22, Z+
c20: 8f 01 movw r16, r30
c22: 8c 2f mov r24, r28
c24: 0e 94 d9 04 call 0x9b2
c28: cf 5f subi r28, 0xFF ; 255
c2a: cd 30 cpi r⌨️ 快捷键说明
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