📄 main.lss
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5c2: 1f 92 push r1
5c4: 0f 92 push r0
5c6: 0f b6 in r0, 0x3f ; 63
5c8: 0f 92 push r0
5ca: 11 24 eor r1, r1
5cc: 0f 93 push r16
5ce: 1f 93 push r17
5d0: 2f 93 push r18
5d2: 3f 93 push r19
5d4: 4f 93 push r20
5d6: 5f 93 push r21
5d8: 6f 93 push r22
5da: 7f 93 push r23
5dc: 8f 93 push r24
5de: 9f 93 push r25
5e0: af 93 push r26
5e2: bf 93 push r27
5e4: ef 93 push r30
5e6: ff 93 push r31
5e8: 04 b1 in r16, 0x04 ; 4
5ea: 15 b1 in r17, 0x05 ; 5
5ec: 13 70 andi r17, 0x03 ; 3
5ee: 34 9a sbi 0x06, 4 ; 6
5f0: 37 98 cbi 0x06, 7 ; 6
5f2: 0e 94 9a 08 call 0x1134
5f6: c8 01 movw r24, r16
5f8: 0e 94 01 02 call 0x402
5fc: ff 91 pop r31
5fe: ef 91 pop r30
600: bf 91 pop r27
602: af 91 pop r26
604: 9f 91 pop r25
606: 8f 91 pop r24
608: 7f 91 pop r23
60a: 6f 91 pop r22
60c: 5f 91 pop r21
60e: 4f 91 pop r20
610: 3f 91 pop r19
612: 2f 91 pop r18
614: 1f 91 pop r17
616: 0f 91 pop r16
618: 0f 90 pop r0
61a: 0f be out 0x3f, r0 ; 63
61c: 0f 90 pop r0
61e: 1f 90 pop r1
620: 18 95 reti
00000622 <CC1000ControlGetLOStatus>:
bool CC1000ControlGetLOStatus(void) // 得到CC1000的LO状态
{
return CC1000ControlM_gCurrentParameters[0x1e];
622: 80 91 86 01 lds r24, 0x0186
}
626: 99 27 eor r25, r25
628: 08 95 ret
0000062a <CC1000ControlComputeFreq>:
result_t CC1000ControlSelectLock(uint8_t Value) // 设置CC1000的PLL
{
CC1000ControlM_gCurrentParameters[0xd] = Value << 4;
return CC1000HPLWrite(0x0D, Value << 4);
}
result_t CC1000ControlChipconCal(void)
{
CC1000HPLWrite(0x0B, 0x00);
CC1000HPLWrite(0x42, 0x3f);
CC1000HPLWrite(0x00, (
1 << 4) | (1 << 0));
CC1000HPLWrite(0x0E, ((
1 << 7) | (
1 << 5)) | (6 << 0));
while ((CC1000HPLRead(0x0E) & (1 << 3)) == 0) ;
CC1000HPLWrite(0x0E, (
1 << 5) | (6 << 0));
CC1000HPLWrite(0x00, (((
1 << 7) | (1 << 6)) | (1 << 5)) | (
1 << 0));
CC1000HPLWrite(0x09, CC1000ControlM_gCurrentParameters[29]);
CC1000HPLWrite(0x0B, 0x00);
CC1000HPLWrite(0x0E, ((
1 << 7) | (
1 << 5)) | (6 << 0));
while ((CC1000HPLRead(0x0E) & (1 << 3)) == 0) ;
CC1000HPLWrite(0x0E, (
1 << 5) | (6 << 0));
return SUCCESS;
}
void CC1000ControlCC1000SetFreq(void)
{
uint8_t i;
for (i = 1; i < 0x0d; i++) {
CC1000HPLWrite(i, CC1000ControlM_gCurrentParameters[i]);
}
CC1000HPLWrite(0x12, CC1000ControlM_gCurrentParameters[0x12]);
CC1000ControlChipconCal();
return;
}
uint32_t CC1000ControlComputeFreq(uint32_t desiredFreq)
{
62a: 2f 92 push r2
62c: 3f 92 push r3
62e: 4f 92 push r4
630: 5f 92 push r5
632: 6f 92 push r6
634: 7f 92 push r7
636: 8f 92 push r8
638: 9f 92 push r9
63a: af 92 push r10
63c: bf 92 push r11
63e: cf 92 push r12
640: df 92 push r13
642: ef 92 push r14
644: ff 92 push r15
646: 0f 93 push r16
648: 1f 93 push r17
64a: cf 93 push r28
64c: df 93 push r29
64e: cd b7 in r28, 0x3d ; 61
650: de b7 in r29, 0x3e ; 62
652: 6e 97 sbiw r28, 0x1e ; 30
654: 0f b6 in r0, 0x3f ; 63
656: f8 94 cli
658: de bf out 0x3e, r29 ; 62
65a: 0f be out 0x3f, r0 ; 63
65c: cd bf out 0x3d, r28 ; 61
65e: 69 83 std Y+1, r22 ; 0x01
660: 7a 83 std Y+2, r23 ; 0x02
662: 8b 83 std Y+3, r24 ; 0x03
664: 9c 83 std Y+4, r25 ; 0x04
uint32_t ActualChannel = 0;
666: 1d 82 std Y+5, r1 ; 0x05
668: 1e 82 std Y+6, r1 ; 0x06
66a: 1f 82 std Y+7, r1 ; 0x07
66c: 18 86 std Y+8, r1 ; 0x08
uint32_t RXFreq = 0;
66e: 20 e0 ldi r18, 0x00 ; 0
670: 30 e0 ldi r19, 0x00 ; 0
672: 40 e0 ldi r20, 0x00 ; 0
674: 50 e0 ldi r21, 0x00 ; 0
676: 29 87 std Y+9, r18 ; 0x09
678: 3a 87 std Y+10, r19 ; 0x0a
67a: 4b 87 std Y+11, r20 ; 0x0b
67c: 5c 87 std Y+12, r21 ; 0x0c
uint32_t TXFreq = 0;
67e: 2d 87 std Y+13, r18 ; 0x0d
680: 3e 87 std Y+14, r19 ; 0x0e
682: 4f 87 std Y+15, r20 ; 0x0f
684: 58 8b std Y+16, r21 ; 0x10
int32_t Offset = 0x7fffffff;
686: 2f ef ldi r18, 0xFF ; 255
688: 3f ef ldi r19, 0xFF ; 255
68a: 4f ef ldi r20, 0xFF ; 255
68c: 5f e7 ldi r21, 0x7F ; 127
68e: 29 8b std Y+17, r18 ; 0x11
690: 3a 8b std Y+18, r19 ; 0x12
692: 4b 8b std Y+19, r20 ; 0x13
694: 5c 8b std Y+20, r21 ; 0x14
uint16_t FSep = 0;
696: 1d 8e std Y+29, r1 ; 0x1d
698: 1e 8e std Y+30, r1 ; 0x1e
uint8_t RefDiv = 0;
69a: 1d 8a std Y+21, r1 ; 0x15
uint8_t i;
for (i = 0; i < 9; i++) {
69c: 3d 89 ldd r19, Y+21 ; 0x15
69e: 3e 8b std Y+22, r19 ; 0x16
6a0: 44 e2 ldi r20, 0x24 ; 36
6a2: 51 e0 ldi r21, 0x01 ; 1
6a4: 4f 8b std Y+23, r20 ; 0x17
6a6: 58 8f std Y+24, r21 ; 0x18
6a8: 82 e1 ldi r24, 0x12 ; 18
6aa: 91 e0 ldi r25, 0x01 ; 1
6ac: 89 8f std Y+25, r24 ; 0x19
6ae: 9a 8f std Y+26, r25 ; 0x1a
6b0: a0 e0 ldi r26, 0x00 ; 0
6b2: b0 e0 ldi r27, 0x00 ; 0
6b4: ab 8f std Y+27, r26 ; 0x1b
6b6: bc 8f std Y+28, r27 ; 0x1c
uint32_t NRef = desiredFreq + CC1000ControlM_IF;
6b8: 29 81 ldd r18, Y+1 ; 0x01
6ba: 3a 81 ldd r19, Y+2 ; 0x02
6bc: 4b 81 ldd r20, Y+3 ; 0x03
6be: 5c 81 ldd r21, Y+4 ; 0x04
6c0: 20 51 subi r18, 0x10 ; 16
6c2: 36 4b sbci r19, 0xB6 ; 182
6c4: 4d 4f sbci r20, 0xFD ; 253
6c6: 5f 4f sbci r21, 0xFF ; 255
uint32_t FRef = CC1000ControlM_FRefTbl[i];
6c8: ef 89 ldd r30, Y+23 ; 0x17
6ca: f8 8d ldd r31, Y+24 ; 0x18
6cc: a1 90 ld r10, Z+
6ce: b1 90 ld r11, Z+
6d0: c1 90 ld r12, Z+
6d2: d1 90 ld r13, Z+
6d4: ef 8b std Y+23, r30 ; 0x17
6d6: f8 8f std Y+24, r31 ; 0x18
uint32_t Channel = 0;
6d8: ee 24 eor r14, r14
6da: ff 24 eor r15, r15
6dc: 87 01 movw r16, r14
uint32_t RXCalc = 0;
6de: 17 01 movw r2, r14
6e0: 28 01 movw r4, r16
uint32_t TXCalc = 0;
int32_t diff;
NRef = ((desiredFreq + CC1000ControlM_IF) << 2) / FRef;
6e2: 72 e0 ldi r23, 0x02 ; 2
6e4: 22 0f add r18, r18
6e6: 33 1f adc r19, r19
6e8: 44 1f adc r20, r20
6ea: 55 1f adc r21, r21
6ec: 7a 95 dec r23
6ee: d1 f7 brne .-12 ; 0x6e4
6f0: ca 01 movw r24, r20
6f2: b9 01 movw r22, r18
6f4: a6 01 movw r20, r12
6f6: 95 01 movw r18, r10
6f8: 0e 94 f6 10 call 0x21ec
if (NRef & 0x1) {
6fc: da 01 movw r26, r20
6fe: c9 01 movw r24, r18
700: 81 70 andi r24, 0x01 ; 1
702: 90 70 andi r25, 0x00 ; 0
704: a0 70 andi r26, 0x00 ; 0
706: b0 70 andi r27, 0x00 ; 0
708: 89 2b or r24, r25
70a: 21 f0 breq .+8 ; 0x714
NRef++;
70c: 2f 5f subi r18, 0xFF ; 255
70e: 3f 4f sbci r19, 0xFF ; 255
710: 4f 4f sbci r20, 0xFF ; 255
712: 5f 4f sbci r21, 0xFF ; 255
}
if (NRef & 0x2) {
714: da 01 movw r26, r20
716: c9 01 movw r24, r18
718: b6 95 lsr r27
71a: a7 95 ror r26
71c: 97 95 ror r25
71e: 87 95 ror r24
720: 81 70 andi r24, 0x01 ; 1
722: 90 70 andi r25, 0x00 ; 0
724: 89 2b or r24, r25
726: 59 f0 breq .+22 ; 0x73e
RXCalc = 16384 >> 1;
728: 21 2c mov r2, r1
72a: f0 e2 ldi r31, 0x20 ; 32
72c: 3f 2e mov r3, r31
72e: 41 2c mov r4, r1
730: 51 2c mov r5, r1
Channel = FRef >> 1;
732: 86 01 movw r16, r12
734: 75 01 movw r14, r10
736: 16 95 lsr r17
738: 07 95 ror r16
73a: f7 94 ror r15
73c: e7 94 ror r14
}
NRef >>= 2;
73e: 72 e0 ldi r23, 0x02 ; 2
740: 56 95 lsr r21
742: 47 95 ror r20
744: 37 95 ror r19
746: 27 95 ror r18
748: 7a 95 dec r23
74a: d1 f7 brne .-12 ; 0x740
RXCalc += NRef * 16384 - 8192;
74c: da 01 movw r26, r20
74e: c9 01 movw r24, r18
750: 6e e0 ldi r22, 0x0E ; 14
752: 88 0f add r24, r24
754: 99 1f adc r25, r25
756: aa 1f adc r26, r26
758: bb 1f adc r27, r27
75a: 6a 95 dec r22
75c: d1 f7 brne .-12 ; 0x752
75e: 82 0d add r24, r2
760: 93 1d adc r25, r3
762: a4 1d adc r26, r4
764: b5 1d adc r27, r5
766: 21 2c mov r2, r1
768: f0 ee ldi r31, 0xE0 ; 224
76a: 3f 2e mov r3, r31
76c: ff ef ldi r31, 0xFF ; 255
76e: 4f 2e mov r4, r31
770: ff ef ldi r31, 0xFF ; 255
772: 5f 2e mov r5, r31
774: 28 0e add r2, r24
776: 39 1e adc r3, r25
778: 4a 1e adc r4, r26
77a: 5b 1e adc r5, r27
if (RXCalc < CC1000ControlM_FREQ_MIN || RXCalc > CC1000ControlM_FREQ_MAX) {
77c: 80 50 subi r24, 0x00 ; 0
77e: 90 42 sbci r25, 0x20 ; 32
780: a0 44 sbci r26, 0x40 ; 64
782: b0 40 sbci r27, 0x00 ; 0
784: 80 50 subi r24, 0x00 ; 0
786: 9c 49 sbci r25, 0x9C ; 156
788: af 4b sbci r26, 0xBF ; 191
78a: b0 40 sbci r27, 0x00 ; 0
78c: 08 f0 brcs .+2 ; 0x790
78e: 64 c0 rjmp .+200 ; 0x858
continue;
}
TXCalc = RXCalc - CC1000ControlM_CorTbl[i];
790: a9 8d ldd r26, Y+25 ; 0x19
792: ba 8d ldd r27, Y+26 ; 0x1a
794: 8d 91 ld r24, X+
796: 9c 91 ld r25, X
798: aa 27 eor r26, r26
79a: bb 27 eor r27, r27
79c: 42 01 movw r8, r4
79e: 31 01 movw r6, r2
7a0: 68 1a sub r6, r24
7a2: 79 0a sbc r7, r25
7a4: 8a 0a sbc r8, r26
7a6: 9b 0a sbc r9, r27
if (TXCalc < CC1000ControlM_FREQ_MIN || TXCalc > CC1000ControlM_FREQ_MAX) {
7a8: d4 01 movw r26, r8
7aa: c3 01 movw r24, r6
7ac: 80 50 subi r24, 0x00 ; 0
7ae: 90 40 sbci r25, 0x00 ; 0
7b0: a0 44 sbci r26, 0x40 ; 64
7b2: b0 40 sbci r27, 0x00 ; 0
7b4: 80 50 subi r24, 0x00 ; 0
7b6: 9c 49 sbci r25, 0x9C ; 156
7b8: af 4b sbci r26, 0xBF ; 191
7ba: b0 40 sbci r27, 0x00 ; 0
7bc: 08 f0 brcs .+2 ; 0x7c0
7be: 4c c0 rjmp .+152 ; 0x858
continue;
}
Channel += NRef * FRef;
7c0: ca 01 movw r24, r20
7c2: b9 01 movw r22, r18
7c4: a6 01 movw r20, r12
7c6: 95 01 movw r18, r10
7c8: 0e 94 d7 10 call 0x21ae
7cc: dc 01 movw r26, r24
7ce: cb 01 movw r24, r22
7d0: e8 0e add r14, r24
7d2: f9 1e adc r15, r25
7d4: 0a 1f adc r16, r26
7d6: 1b 1f adc r17, r27
Channel -= CC1000ControlM_IF;
7d8: 20 e1 ldi r18, 0x10 ; 16
7da: 36 eb ldi r19, 0xB6 ; 182
7dc: 4d ef ldi r20, 0xFD ; 253
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