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📄 syn_std_dsc.tdf

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-------------------------------------------------------------------------
-------------------------------------------------------------------------
--
-- Revision Control Information
--
-- $Workfile:   syn_std_dsc.tdf  $
-- $Archive:   P:/RS_std/units/Dec_dsc/ahdl/syn_std_dsc.tdv  $
--
-- $Revision:   1.0  $
-- $Date:   23 Jul 1999 15:12:06  $
-- $Author			:  Alejandro Diaz-Manero
--
-- Project      :  RS_std
--
-- Description	: 
--
-- Copyright 1999 (c) Altera Corporation
-- All rights reserved
--
-------------------------------------------------------------------------
-------------------------------------------------------------------------

FUNCTION lpm_ram_dq (data[LPM_WIDTH-1..0], address[LPM_WIDTHAD-1..0], we, 
				     inclock, outclock)
   RETURNS (q[LPM_WIDTH-1..0]);

FUNCTION lpm_counter (data[LPM_WIDTH-1..0], clock, clk_en, cnt_en, updown, aclr, 
					  aset, aconst, aload, sclr, sset, sconst, sload)
   RETURNS (q[LPM_WIDTH-1..0], eq[15..0]);

FUNCTION gfmul (a[m..1], b[m..1]) 
   RETURNS (c[m..1]);

PARAMETERS
(
n = 204,		-- length of code ((check+1) to 255)
m = 8,			-- GF size (2^m)	(3 to 8)
irrpol = 285,	-- field polynomial
check = 16, 		-- number of check symbols (= # of syndromes) - (3 to 20)
root1 = 1, root2 = 2,	root3 = 4, root4 = 8,	root5 = 16,	root6 = 32,	root7 = 64,	root8 = 128,
root9 = 29,	root10 = 58, root11 = 116,	root12 = 232,	root13 = 205,	root14 = 135,	root15 = 19,
root16 = 38, root17 = 76,	root18 = 152,	root19 = 45,	root20 = 90,	root21 = 180,	root22 = 117,
root23 = 234,	root24 = 201,	root25 = 143,	root26 = 3,	root27 = 6,	root28 = 12,	root29 = 24,
root30 = 48,	root31 = 96,	root32 = 192,	root33 = 157,	root34 = 39, root35 = 78, root36 = 156,
root37 = 37,	root38 = 74,	root39 = 148,	root40 = 53,	root41 = 106,	root42 = 212,	root43 = 181,
root44 = 119,	root45 = 238,	root46 = 193,	root47 = 159,	root48 = 35,	root49 = 70,	root50 = 140
);

constant errs = floor(check DIV 2);
constant size = ceil(log2(n+1));


subdesign syn_std_dsc
(
 sysclk, reset, r[m..1], dsin, dsout : INPUT;
 bypass : INPUT;
 gofinal : INPUT;
 errvec[errs..1][m..1], errloc[errs..1][size..1] : INPUT;
 rdyin, outvalid : OUTPUT;
 syn[check..1][m..1], startmass, rsout[m..1] : OUTPUT;
)

VARIABLE

  rr[m..1], reg[check..1][m..1], deldone, deladd[2..1][size..1] : dffe;
  ovdel[4..1], rsoutff[m..1] : dffe;
  synout[check..1][m..1], mulout[check..1][m..1] : node;
  alpha[check..1][m..1] : node;
  addmux[size..1], dummy[m..1], addzero[size..1] : node;
  addeq[errs..1][size..1], errmux[errs..1][m..1] : node;
  adden, loadread, writedis, oval, counten : node;
  nval[size..1] : node;

  lcnta : lpm_counter WITH (LPM_WIDTH = size, LPM_DIRECTION = "DOWN" );

  ss : MACHINE OF BITS (state[3..1])
  WITH STATES (s0  = B"100", 
			   s1  = B"101",
			   s2  = B"011",
			   s99 = B"001");

  --ss : MACHINE OF BITS (state[1..3])
  --WITH STATES (s0  = B"001", 
--			   s1  = B"101",
--			   s2  = B"110",
--			   s99 = B"100");

BEGIN

startmass = state[1];
loadread = state[2];
writedis = state[3];

ss.clk = sysclk;
ss.reset = reset;

CASE ss IS
 
	WHEN s0 =>
		IF (addzero[size] == VCC) THEN
		  ss = s0;
		ELSE
		  ss = s1;
		END IF;

-- start massey-berlekamp algorithm
	WHEN s1 =>
		IF (gofinal == GND) THEN
		  ss = s1;
		ELSE
		  ss = s2;
		END IF;

-- load address for read
	WHEN s2 =>
		ss = s99;

	WHEN s99 =>
		ss = s99;

END CASE;

reg[][].clk = sysclk;
reg[][].clrn = !reset;
reg[][].ena = addzero[size] & dsin;

rr[].clk = sysclk;
rr[].clrn = !reset;
rr[] = r[]; 
rr[].ena = (addzero[size] & dsin); 

FOR k IN 1 TO check GENERATE
  synout[k][m..1] = rr[m..1] $ mulout[k][m..1];
END GENERATE;

reg[][] = synout[][];

alpha[1][] = root1;
alpha[2][] = root2;
IF (check >= 3) GENERATE
  alpha[3][] = root3;
END GENERATE;
IF (check >= 4) GENERATE
  alpha[4][] = root4;
END GENERATE;
IF (check >= 5) GENERATE
  alpha[5][] = root5;
END GENERATE;
IF (check >= 6) GENERATE
  alpha[6][] = root6;
END GENERATE;
IF (check >= 7) GENERATE
  alpha[7][] = root7;
END GENERATE;
IF (check >= 8) GENERATE
  alpha[8][] = root8;
END GENERATE;
IF (check >= 9) GENERATE
  alpha[9][] = root9;
END GENERATE;
IF (check >= 10) GENERATE
  alpha[10][] = root10;
END GENERATE;
IF (check >= 11) GENERATE
  alpha[11][] = root11;
END GENERATE;
IF (check >= 12) GENERATE
  alpha[12][] = root12;
END GENERATE;
IF (check >= 13) GENERATE
  alpha[13][] = root13;
END GENERATE;
IF (check >= 14) GENERATE
  alpha[14][] = root14;
END GENERATE;
IF (check >= 15) GENERATE
  alpha[15][] = root15;
END GENERATE;
IF (check >= 16) GENERATE
  alpha[16][] = root16;
END GENERATE;
IF (check >= 17) GENERATE
  alpha[17][] = root17;
END GENERATE;
IF (check >= 18) GENERATE
  alpha[18][] = root18;
END GENERATE;
IF (check >= 19) GENERATE
  alpha[19][] = root19;
END GENERATE;
IF (check >= 20) GENERATE
  alpha[20][] = root20;
END GENERATE;
IF (check >= 21) GENERATE
  alpha[21][] = root21;
END GENERATE;
IF (check >= 22) GENERATE
  alpha[22][] = root22;
END GENERATE;
IF (check >= 23) GENERATE
  alpha[23][] = root23;
END GENERATE;
IF (check >= 24) GENERATE
  alpha[24][] = root24;
END GENERATE;
IF (check >= 25) GENERATE
  alpha[25][] = root25;
END GENERATE;
IF (check >= 26) GENERATE
  alpha[26][] = root26;
END GENERATE;
IF (check >= 27) GENERATE
  alpha[27][] = root27;
END GENERATE;
IF (check >= 28) GENERATE
  alpha[28][] = root28;
END GENERATE;
IF (check >= 29) GENERATE
  alpha[29][] = root29;
END GENERATE;
IF (check >= 30) GENERATE
  alpha[30][] = root30;
END GENERATE;
IF (check >= 31) GENERATE
  alpha[31][] = root31;
END GENERATE;
IF (check >= 32) GENERATE
  alpha[32][] = root32;
END GENERATE;
IF (check >= 33) GENERATE
  alpha[33][] = root33;
END GENERATE;
IF (check >= 34) GENERATE
  alpha[34][] = root34;
END GENERATE;
IF (check >= 35) GENERATE
  alpha[35][] = root35;
END GENERATE;
IF (check >= 36) GENERATE
  alpha[36][] = root36;
END GENERATE;
IF (check >= 37) GENERATE
  alpha[37][] = root37;
END GENERATE;
IF (check >= 38) GENERATE
  alpha[38][] = root38;
END GENERATE;
IF (check >= 39) GENERATE
  alpha[39][] = root39;
END GENERATE;
IF (check >= 40) GENERATE
  alpha[40][] = root40; 
END GENERATE;
	IF (check >= 41) GENERATE
  alpha[41][] = root41;
END GENERATE;
IF (check >= 42) GENERATE
  alpha[42][] = root42;
END GENERATE;
IF (check >= 43) GENERATE
  alpha[43][] = root43;
END GENERATE;
IF (check >= 44) GENERATE
  alpha[44][] = root44;
END GENERATE;
IF (check >= 45) GENERATE
  alpha[45][] = root45;
END GENERATE;
IF (check >= 46) GENERATE
  alpha[46][] = root46;
END GENERATE;
IF (check >= 47) GENERATE
  alpha[47][] = root47;
END GENERATE;
IF (check >= 48) GENERATE
  alpha[48][] = root48;
END GENERATE;
IF (check >= 49) GENERATE
  alpha[49][] = root49;
END GENERATE;
IF (check >= 50) GENERATE
  alpha[50][] = root50;
END GENERATE;

FOR k IN 1 TO check GENERATE
  mulout[k][] = gfmul(reg[k][],alpha[k][]) WITH (m=m, irrpol=irrpol);    
END GENERATE;

syn[][] = synout[][];

nval[] = n;

addmux[] = lcnta.q[];
lcnta.data[] = nval[];
lcnta.clock = sysclk;
lcnta.cnt_en = counten;
lcnta.aload = reset;
lcnta.sload = loadread;

counten = adden & 
		    (dsin # startmass) &
		    (dsout # !startmass);

addzero[1] = addmux[1];
FOR k IN 2 TO size GENERATE
  addzero[k] = addzero[k-1] # addmux[k];
END GENERATE; 

adden = addzero[size];

deldone.clk = sysclk;
deldone = adden & writedis; -- write last symbol
deldone.clrn = !reset;

dummy[] = lpm_ram_dq ( rr[], addmux[], deldone,sysclk,sysclk)
		     WITH (LPM_WIDTH = m, LPM_WIDTHAD = size, LPM_INDATA = "REGISTERED", 
				   LPM_ADDRESS_CONTROL = "REGISTERED", LPM_OUTDATA = "REGISTERED");

-- delay address 2clks to line up add with data on output
deladd[][].clk = sysclk;
deladd[][].clrn = !reset;
deladd[1][] = addmux[];
deladd[2][] = deladd[1][];

FOR j IN 1 TO errs GENERATE
  addeq[j][1] = errloc[j][1] $ deladd[2][1];
  FOR k IN 2 TO size GENERATE
    addeq[j][k] = addeq[j][k-1] # (errloc[j][k] $ deladd[2][k]);
  END GENERATE;
END GENERATE;

errmux[1][] = errvec[1][] & !(addeq[1][size]);
IF (errs >1) GENERATE
  FOR k IN 2 TO errs GENERATE
    errmux[k][] = errmux[k-1][] # (errvec[k][] & !(addeq[k][size]));
  END GENERATE;
END GENERATE;

rsoutff[].clk = sysclk;
rsoutff[].clrn = ! reset;
rsoutff[m..1] = dummy[m..1] $ (errmux[errs][m..1] & !bypass);

rsout[] = rsoutff[];

oval = (startmass & !loadread & !writedis) & adden;
ovdel[].clk = sysclk;
ovdel[].clrn = !reset;
ovdel[1] = oval;
ovdel[2] = ovdel[1];
ovdel[3] = ovdel[2];
ovdel[4] = ovdel[3];

outvalid = ovdel[4];

rdyin = addzero[size] & !startmass;

END; 

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