mmx_toc.htm

MMX即多媒体可扩展指令集

<tr><td>4.3.2.1.</td><td>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;<a href="mmx_chp4.htm#4.3.2.1" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#4.3.2.1">ALIASING SUMMARY</a></td><td>4-8</td></tr>
<tr><td>4.3.3.</td><td>&nbsp;&nbsp;&nbsp;<a href="mmx_chp4.htm#4.3.3" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#4.3.3">Context Switch Support</a></td><td>4-8</td></tr>
<tr><td>4.3.4.</td><td>&nbsp;&nbsp;&nbsp;<a href="mmx_chp4.htm#4.3.4" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#4.3.4">Floating-Point Exceptions</a></td><td>4-8</td></tr>
<tr><td>4.3.5.</td><td>&nbsp;&nbsp;&nbsp;<a href="mmx_chp4.htm#4.3.5" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#4.3.5">Debugging</a></td><td>4-9</td></tr>
<tr><td>4.3.6.</td><td>&nbsp;&nbsp;&nbsp;<a href="mmx_chp4.htm#4.3.6" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#4.3.6">Emulation of the Instruction Set</a></td><td>4-9</td></tr>
<tr><td>4.3.7.</td><td>&nbsp;&nbsp;&nbsp;<a href="mmx_chp4.htm#4.3.7" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#4.3.7">Exception handling in Operating Systems</a></td><td>4-9</td></tr>

<tr><td colspan=3 ALIGN=CENTER>&nbsp;</td></tr>
 
<tr><td colspan=3><b><a href="mmx_chp5.htm" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm">CHAPTER 5<br>INTEL ARCHITECTURE MMX TECHNOLOGY INSTRUCTION SET</a></b><td><tr>
<tr><td>5.1.</td><td><a href="mmx_chp5.htm#5.1" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#5.1">INSTRUCTION SYNTAX</a></td><td>5-1</td></tr>
<tr><td>5.2.</td><td><a href="mmx_chp5.htm#5.2" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#5.2">INSTRUCTION FORMAT</a></td><td>5-2</td></tr>
<tr><td>5.3.</td><td><a href="mmx_chp5.htm#5.3" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#5.3">NOTATIONAL CONVENTIONS</a></td><td>5-3</td></tr>
<tr><td>5.4.</td><td><a href="mmx_chp5.htm#5.4" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#5.4">HOW TO READ THE INSTRUCTION SET PAGES</a></td><td>5-4</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#EMMS" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#EMMS">EMMS--Empty MMX Technology State</a></td><td>5-8</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#MOVD" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#MOVD">MOVD--Move 32 Bits</a></td><td>5-10</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#MOVQ" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#MOVQ">MOVQ--Move 64 Bits</a></td><td>5-12</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PACKSSWB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PACKSSWB">PACKSSWB/PACKSSDW--Pack with Signed Saturation</a></td><td>5-14</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PACKUSWB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PACKUSWB">PACKUSWB--Pack with Unsigned Saturation</a></td><td>5-16</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PADDB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PADDB">PADDB/PADDW/PADDD--Packed Add</a></td><td>5-18</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PADDSB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PADDSB">PADDSB/PADDSW--Packed Add with Saturation</a></td><td>5-21</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PADDUSB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PADDUSB">PADDUSB/PADDUSW--Packed Add Unsigned with Saturation</a></td><td>5-23</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PAND" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PAND">PAND--Bitwise Logical And</a></td><td>5-26</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PANDN" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PANDN">PANDN--Bitwise Logical And Not</a></td><td>5-28</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PCMPEQB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PCMPEQB">PCMPEQB/PCMPEQW/PCMPEQD--Packed Compare for Equal</a></td><td>5-30</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PCMPGTB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PCMPGTB">PCMPGTB/PCMPGTW/PCMPGTD--Packed Compare for Greater Than</a></td><td>5-33</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PMADDWD" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PMADDWD">PMADDWD--Packed Multiply and Add</a></td><td>5-36</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PMULHW" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PMULHW">PMULHW--Packed Multiply High</a></td><td>5-38</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PMULLW" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PMULLW">PMULLW--Packed Multiply Low</a></td><td>5-40</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#POR" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#POR">POR--Bitwise Logical Or</a></td><td>5-42</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PSLLW" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PSLLW">PSLLW/PSLLD/PSLLQ--Packed Shift Left Logical</a></td><td>5-44</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PSRAW" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PSRAW">PSRAW/PSRAD--Packed Shift Right Arithmetic</a></td><td>5-47</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PSRLW" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PSRLW">PSRLW/PSRLD/PSRLQ--Packed Shift Right Logical</a></td><td>5-50</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PSUBB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PSUBB">PSUBB/PSUBW/PSUBD--Packed Subtract</a></td><td>5-53</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PSUBSB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PSUBSB">PSUBSB/PSUBSW--Packed Subtract with Saturation</a></td><td>5-56</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PSUBUSB" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PSUBUSB">PSUBUSB/PSUBSW--Packed Subtract Unsigned with Saturation</a></td><td>5-58</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PUNPCKHBW" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PUNPCKHBW">PUNPCKHBW/PUNPCKHWD/PUNPCKHDQ--Unpack High Packed Data</a></td><td>5-60</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PUNPCKLBW" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PUNPCKLBW">PUNPCKLBW/PUNPCKLWD/PUNPCKLDQ--Unpack Low Packed Data</a></td><td>5-63</td></tr>
<tr><td colspan=2><a href="mmx_chp5.htm#PXOR" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#PXOR">PXOR--Bitwise Logical Exclusive OR</a></td><td>5-66</td></tr>

<tr><td colspan=3 ALIGN=CENTER>&nbsp;</td></tr>

<tr><td colspan=3><b><a href="mmx_appa.htm" tppabs="http://freemind.163.net/database/mmx/mmx_appa.htm">APPENDIX A<br>IA MMX TECHNOLOGY INSTRUCTION SET SUMMARY</a></b></td><tr>

<tr><td colspan=3><b><a href="mmx_appb.htm" tppabs="http://freemind.163.net/database/mmx/mmx_appb.htm">APPENDIX B</b><br><b>IA MMX TECHNOLOGY INSTRUCTION FORMATS AND ENCODINGS</a></b></td><tr>

<tr><td colspan=3><b><a href="mmx_appc.htm" tppabs="http://freemind.163.net/database/mmx/mmx_appc.htm">APPENDIX C</b><br><b>ALPHABETICAL LIST OF IA MMX TECHNOLOGY INSTRUCTION SET MNEMONICS</a></b></td><tr>

<tr><td colspan=3><b><a href="mmx_appd.htm" tppabs="http://freemind.163.net/database/mmx/mmx_appd.htm">APPENDIX D</b><br><b>IA MMX TECHNOLOGY INSTRUCTION SET OPCODE MAP</a></b></td><tr>

<tr><td colspan=3 ALIGN=CENTER>&nbsp;</td></tr>

<tr><td colspan=3 ALIGN=CENTER><b>Figures</b></td></tr>
<tr><td><b>Figure</b></td><td><b>Title</b></td><td><b>Page</b></td></tr>
<tr><td>2-1.</td><td><a href="mmx_chp2.htm#Figure2-1" tppabs="http://freemind.163.net/database/mmx/mmx_chp2.htm#Figure2-1">Packed Data Types</a></td><td>2-2</td></tr>
<tr><td>2-2.</td><td><a href="mmx_chp2.htm#Figure2-2" tppabs="http://freemind.163.net/database/mmx/mmx_chp2.htm#Figure2-2">MMX Technology Register Set</a></td><td>2-3</td></tr>
<tr><td>3-1.</td><td><a href="mmx_chp3.htm#Figure3-1" tppabs="http://freemind.163.net/database/mmx/mmx_chp3.htm#Figure3-1">Eight Packed Bytes in Memory (at address 1000H)</a></td><td>3-2</td></tr>
<tr><td>4-1.</td><td><a href="mmx_chp4.htm#Figure4-1" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#Figure4-1">Example of FP and MMX Technology State Saving in Operating System</a></td><td>4-2</td></tr>
<tr><td>4-2.</td><td><a href="mmx_chp4.htm#Figure4-2" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#Figure4-2">Aliasing of MMX Technology to Floating-Point Registers</a></td><td>4-5</td></tr>
<tr><td>4-3.</td><td><a href="mmx_chp4.htm#Figure4-3" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#Figure4-3">Mapping of MMX Technology Registers to Floating Point Registers</a></td><td>4-6</td></tr>
<tr><td>5-1.</td><td><a href="mmx_chp5.htm#Figure5-1" tppabs="http://freemind.163.net/database/mmx/mmx_chp5.htm#Figure5-1">Floating Point Tag Word Format</a></td><td>5-8</td></tr>
<tr><td>B-1.</td><td><a href="mmx_appb.htm#FigureB-1" tppabs="http://freemind.163.net/database/mmx/mmx_appb.htm#FigureB-1">Key to Codes for Datatype Cross-Reference</a></td><td>B-3</td></tr>

<tr><td colspan=3 ALIGN=CENTER>&nbsp;</td></tr>

<tr><td colspan=3 ALIGN=CENTER><b>Tables</b></td></tr>
<tr><td><b>Table</b></td><td><b>Title</b></td><td><b>Page</b></td></tr>
<tr><td>2-1.</td><td><a href="mmx_chp2.htm#Table2-1" tppabs="http://freemind.163.net/database/mmx/mmx_chp2.htm#Table2-1">Data Range Limits for Saturation</a></td><td>2-4</td></tr>
<tr><td>3-1.</td><td><a href="mmx_chp3.htm#Table3-1" tppabs="http://freemind.163.net/database/mmx/mmx_chp3.htm#Table3-1">IA MMX Technology Instruction Behavior with Prefixes Used by Application Programs</a></td><td>3-3</td></tr>
<tr><td>4-1.</td><td><a href="mmx_chp4.htm#Table4-1" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#Table4-1">Effect of the FP and MMX Technology Instructions on the FP Tag Word</a></td><td>4-7</td></tr>
<tr><td>4-2.</td><td><a href="mmx_chp4.htm#Table4-2" tppabs="http://freemind.163.net/database/mmx/mmx_chp4.htm#Table4-2">Effects of MMX Technology Instruction on FP State</a></td><td>4-8</td></tr>
<tr><td>A-1.</td><td><a href="mmx_appa.htm#TableA-1" tppabs="http://freemind.163.net/database/mmx/mmx_appa.htm#TableA-1">IA MMX Technology Instruction Set Summary, Grouped into Functional Categories</a></td><td>A-2</td></tr>
<tr><td>B-1.</td><td><a href="mmx_appb.htm#TableB-1" tppabs="http://freemind.163.net/database/mmx/mmx_appb.htm#TableB-1">Encoding of Granularity of Data (gg) Field</a></td><td>B-1</td></tr>
<tr><td>B-2.</td><td><a href="mmx_appb.htm#TableB-2" tppabs="http://freemind.163.net/database/mmx/mmx_appb.htm#TableB-2">Encoding of 32-bit General Purpose (reg) Field for Register-to-Register Operations</a></td><td>B-2</td></tr>
<tr><td>B-3.</td><td><a href="mmx_appb.htm#TableB-3" tppabs="http://freemind.163.net/database/mmx/mmx_appb.htm#TableB-3">Encoding of 64-bit MMX Technology Register (mmxreg) Field</a></td><td>B-2</td></tr>
<tr><td>B-4.</td><td><a href="mmx_appb.htm#TableB-4" tppabs="http://freemind.163.net/database/mmx/mmx_appb.htm#TableB-4">IA MMX Technology Instruction Formats and Encodings</a></td><td>B-3</td></tr>
<tr><td>C-1.</td><td><a href="mmx_appc.htm#TableC-1" tppabs="http://freemind.163.net/database/mmx/mmx_appc.htm#TableC-1">IA MMX Technology Instruction Set Mnemonics</a></td><td>C-1</td></tr>
<tr><td>D-1.</td><td><a href="mmx_appd.htm#TableD-1" tppabs="http://freemind.163.net/database/mmx/mmx_appd.htm#TableD-1">Opcode Map (First Byte is 0FH)</a></td><td>D-3</td></tr>
<tr><td>D-2.</td><td><a href="mmx_appd.htm#TableD-2" tppabs="http://freemind.163.net/database/mmx/mmx_appd.htm#TableD-2">Opcodes Determined by Bits 5, 4, 3 of Mod R/M Byte</a></td><td>D-5</td></tr>

<tr><td colspan=3 ALIGN=CENTER>&nbsp;</td></tr>

<tr><td colspan=3 ALIGN=CENTER><b>Examples</b></td></tr>
<tr><td><b>Example</b></td><td><b>Title</b></td><td><b>Page</b></td></tr>
<tr><td>3-1.</td><td><a href="mmx_chp3.htm#X_ExampleOne" tppabs="http://freemind.163.net/database/mmx/mmx_chp3.htm#X_ExampleOne">Partial sequence of IA MMX technology detection by CPUID</a></td><td>3-4</td></tr>
<tr><td>3-2.</td><td><a href="mmx_chp3.htm#X_ExampleTwo" tppabs="http://freemind.163.net/database/mmx/mmx_chp3.htm#X_ExampleTwo">Floating-point and MMX Technology Code</a></td><td>3-7</td></tr>

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