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📄 sd_def.h

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/*****************************************************************************
*  Copyright Statement:
*  --------------------
*  This software is protected by Copyright and the information contained
*  herein is confidential. The software may not be copied and the information
*  contained herein may not be used or disclosed except with the written
*  permission of MediaTek Inc. (C) 2005
*
*  BY OPENING THIS FILE, BUYER HEREBY UNEQUIVOCALLY ACKNOWLEDGES AND AGREES
*  THAT THE SOFTWARE/FIRMWARE AND ITS DOCUMENTATIONS ("MEDIATEK SOFTWARE")
*  RECEIVED FROM MEDIATEK AND/OR ITS REPRESENTATIVES ARE PROVIDED TO BUYER ON
*  AN "AS-IS" BASIS ONLY. MEDIATEK EXPRESSLY DISCLAIMS ANY AND ALL WARRANTIES,
*  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF
*  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT.
*  NEITHER DOES MEDIATEK PROVIDE ANY WARRANTY WHATSOEVER WITH RESPECT TO THE
*  SOFTWARE OF ANY THIRD PARTY WHICH MAY BE USED BY, INCORPORATED IN, OR
*  SUPPLIED WITH THE MEDIATEK SOFTWARE, AND BUYER AGREES TO LOOK ONLY TO SUCH
*  THIRD PARTY FOR ANY WARRANTY CLAIM RELATING THERETO. MEDIATEK SHALL ALSO
*  NOT BE RESPONSIBLE FOR ANY MEDIATEK SOFTWARE RELEASES MADE TO BUYER'S
*  SPECIFICATION OR TO CONFORM TO A PARTICULAR STANDARD OR OPEN FORUM.
*
*  BUYER'S SOLE AND EXCLUSIVE REMEDY AND MEDIATEK'S ENTIRE AND CUMULATIVE
*  LIABILITY WITH RESPECT TO THE MEDIATEK SOFTWARE RELEASED HEREUNDER WILL BE,
*  AT MEDIATEK'S OPTION, TO REVISE OR REPLACE THE MEDIATEK SOFTWARE AT ISSUE,
*  OR REFUND ANY SOFTWARE LICENSE FEES OR SERVICE CHARGE PAID BY BUYER TO
*  MEDIATEK FOR SUCH MEDIATEK SOFTWARE AT ISSUE. 
*
*  THE TRANSACTION CONTEMPLATED HEREUNDER SHALL BE CONSTRUED IN ACCORDANCE
*  WITH THE LAWS OF THE STATE OF CALIFORNIA, USA, EXCLUDING ITS CONFLICT OF
*  LAWS PRINCIPLES.  ANY DISPUTES, CONTROVERSIES OR CLAIMS ARISING THEREOF AND
*  RELATED THERETO SHALL BE SETTLED BY ARBITRATION IN SAN FRANCISCO, CA, UNDER
*  THE RULES OF THE INTERNATIONAL CHAMBER OF COMMERCE (ICC).
*
*****************************************************************************/

/*****************************************************************************
 *
 * Filename:
 * ---------
 *   Sd_def.h
 *
 * Project:
 * --------
 *   Maui_Software
 *
 * Description:
 * ------------
 *   Header file of SD/MMC driver
 *
 * Author:
 * -------
 * -------
 *
 *============================================================================
 *             HISTORY
 * Below this line, this part is controlled by PVCS VM. DO NOT MODIFY!!
 *------------------------------------------------------------------------------
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 *============================================================================ 
 ****************************************************************************/
#ifndef SD_DEF_H
#define SD_DEF_H

// registers address definition
#define SDC_CFG			(MSDC_ADRS+0x20)
#define SDC_CMD			(MSDC_ADRS+0x24)
#define SDC_ARG			(MSDC_ADRS+0x28)
#define SDC_STA			(MSDC_ADRS+0x2c)
#define SDC_RESP0		(MSDC_ADRS+0x30)
#define	SDC_RESP1	(MSDC_ADRS+0x34)
#define	SDC_RESP2	(MSDC_ADRS+0x38)
#define	SDC_RESP3	(MSDC_ADRS+0x3c)
// updated at 9/27
// #define SDC_EXESTA		(MSDC_ADRS+0x30)
#define SDC_CMDSTA		(MSDC_ADRS+0x40) // 16bits
#define SDC_DATSTA		(MSDC_ADRS+0x44) // 16bits	

#define SDC_CSTA			(MSDC_ADRS+0x48)
#define SDC_IRQMASK0		(MSDC_ADRS+0x4c)
#define SDC_IRQMASK1		(MSDC_ADRS+0x50)

// masks for SDC_CFG
#define SDC_CFG_BLKLEN		0x00000fff
#define SDC_CFG_BSYDLY		0x0000f000
// updated at 10/17
#define SDC_CFG_SIEN		0x00010000
#define SDC_CFG_MDLEN	0x00020000
#define SDC_CFG_WDOD		0x00f00000
#define SDC_CFG_DTOC		0xff000000
//#if defined(MT6228) || defined(MT6229) || defined (MT6227)
#define SDC_CFG_MDLEN8	0x00060000	// support MMC4.0 8-bit bus width
//#endif

// masks for SDC_CMD
#define SDC_CMD_CMD		0x003f
#define SDC_CMD_BREAK	0x0040
#define SDC_CMD_RSPTYP	0x0380
#define SDC_CMD_IDRT		0x0400
#define SDC_CMD_DTYPE	0x1800
#define SDC_CMD_RW		0x2000
#define SDC_CMD_STOP		0x4000
#define SDC_CMD_INTC		0x8000

// masks for SDC_STA
#define SDC_STA_SDCBUSY		0x0001
#define SDC_STA_CMDBUSY		0x0002
#define SDC_STA_DATBUSY		0x0004
#define SDC_STA_R1BSY		0x0010
#define SDC_STA_WP			0x8000

// masks for SDC_CMDSTA
#define SDC_CMDSTA_CMDRDY		0x0001
#define SDC_CMDSTA_CMDTO		0x0002
#define SDC_CMDSTA_RSPCRCERR	0x0004
#define SDC_CMDSTA_MMCIRQ		0x0008

// maske for SDC_DATSTA
#define SDC_DATSTA_BLKDONE		0x0001
#define SDC_DATSTA_DATTO		0x0002
#define SDC_DATSTA_DATCRCERR	0x0004

//masks for command error response(32) of SDC_CSTA
#define SDC_OUT_OF_RANGE			0x80000000
#define SDC_ADDRESS_ERROR			0x40000000
#define SDC_BLOCK_LEN_ERROR		0X20000000
#define SDC_ERASE_SEQ_ERROR		0X10000000
#define SDC_ERASE_PARAM				0X08000000
#define SDC_WP_VIOLATION			0X04000000
#define SDC_CARD_IS_LOCKED			0x02000000
#define SDC_LOCK_UNLOCK_FAILED	0X01000000
#define SDC_COM_CRC_ERROR			0X00800000
#define SDC_ILLEGAL_COMMAND		0X00400000
#define SDC_CARD_ECC_FAILED			0X00200000
#define SDC_CC_ERROR					0X00100000
#define SDC_ERROR						0X00080000
#define SDC_UNDERRUN					0X00040000
#define SDC_OVERRUN					0X00020000
#define SDC_CIDCSD_OVERWRITE		0X00010000
#define SDC_AKE_SEQ_ERROR			0X00000008

#define SDC_CSTA_MASK 				0xffff0000

//masks for card status contained in R1
#define R1_AKE_SEQ_ERROR_3				0x00000004
#define R1_APP_CMD_5						0x00000020
#define R1_READY_FOR_DATA_8			0x00000100
#define R1_CURRENT_STATE_9_12			0x00001e00
#define R1_ERASE_RESET_13				0x00002000
#define R1_CARD_ECC_DISABLE_14			0x00004000
#define R1_WP_ERASE_SKIP_15			0x00008000
#define R1_CID_CSD_OVERWRITE_16		0x00010000
#define R1_OVERRUN_17					0x00020000
#define R1_UNDERRUN_18					0x00040000
#define R1_ERROR_19						0x00080000
#define R1_CC_ERROR_20					0x00100000
#define R1_CARD_ECC_FAILED_21			0x00200000
#define R1_ILLEGAL_COMMAND_22			0x00400000
#define R1_COM_CRC_ERROR_23			0x00800000
#define R1_LOCK_UNLOCK_FAILED_24		0x01000000
#define R1_CARD_IS_LOCKED_25			0x02000000
#define R1_WP_VIOLATION_26				0x04000000
#define R1_ERASE_PARAM_27				0x08000000
#define R1_ERASE_SEQ_ERROR_28			0x10000000
#define R1_BLOCK_LEN_ERROR_29			0x20000000
#define R1_ADDRESS_ERROR_30			0x40000000
#define R1_OUT_OF_RANGE_31				0x80000000
#define R1_CUR_STATE						0x00001E00

#define CurState(a)	(kal_uint32)(((a) & R1_CUR_STATE) >> 9)

#define SD_RW_ERRORS	(R1_OUT_OF_RANGE_31|R1_ADDRESS_ERROR_30|R1_ERASE_PARAM_27|R1_WP_VIOLATION_26|R1_CARD_IS_LOCKED_25|R1_LOCK_UNLOCK_FAILED_24 \
						|R1_COM_CRC_ERROR_23|R1_ILLEGAL_COMMAND_22|R1_CARD_ECC_FAILED_21|R1_CC_ERROR_20|R1_ERROR_19 \
						|R1_UNDERRUN_18|R1_OVERRUN_17|R1_CID_CSD_OVERWRITE_16|R1_WP_ERASE_SKIP_15|R1_CARD_ECC_DISABLE_14\
						|R1_ERASE_RESET_13)

#define SD_COM_ERRORS	(R1_OUT_OF_RANGE_31|R1_ERASE_PARAM_27|R1_WP_VIOLATION_26|R1_CARD_IS_LOCKED_25|R1_LOCK_UNLOCK_FAILED_24 \
						|R1_COM_CRC_ERROR_23|R1_ILLEGAL_COMMAND_22|R1_CARD_ECC_FAILED_21|R1_CC_ERROR_20|R1_ERROR_19 \
						|R1_UNDERRUN_18|R1_OVERRUN_17|R1_CID_CSD_OVERWRITE_16|R1_WP_ERASE_SKIP_15|R1_CARD_ECC_DISABLE_14\
						|R1_ERASE_RESET_13)

/* MMC bus commands */
#define CMD0_GO_IDLE_STATE          0x00    /* Resets the MMC */
#define CMD1_SEND_OP_COND           0x01    /* Activates the card's initialization process */
#define CMD2_ALL_SEND_CID           0x02    /* Asks all cards in ready state to send their CID */
#define CMD3_SET_RELATIVE_ADDR      0x03    /* Assigns relative address to the card in identification state */
#define CMD4_SET_DSR                0x04    /* Sets drive stage register DSR */
#define CMD7_SELECT_CARD            0x07
#define CMD9_SEND_CSD               0x09    /* Asks the selected card to send its CSD */
#define CMD10_SEND_CID              0x0A    /* Asks the selected card to send its CID */
#define CMD11_READ_DAT_UNTIL_STOP_MMC   0x0B
#define CMD12_STOP_TRANSMISSION     0x0C    /* Stop data transmission */
#define CMD13_SEND_STATUS           0x0D    /* Asks the selected card to send its status register */
#define CMD15_GO_INACTIVE_STATE     0x0F
#define CMD16_SET_BLOCKLEN          0x10    /* Selects a block length for all following block commands */
#define CMD17_READ_SINGLE_BLOCK     0x11    /* Reads a block of the size selected by the SET_BLOCKLEN command */
#define CMD18_READ_MULTIPLE_BLOCK   0x12
#define CMD20_WRITE_DAT_UNTIL_STOP_MMC  0x14
#define CMD24_WRITE_SINGLE_BLOCK    0x18    /* Writes a block of the size selected by SET_BLOCKLEN command */
#define CMD25_WRITE_MULTIPLE_BLOCK  0x19     /* Writes multiple block until CMD 12 */
#define CMD26_PROGRAM_CID           0x1A
#define CMD27_PROGRAM_CSD           0x1B    /* Programming of the programmable bits of the CSD */
#define CMD28_SET_WRITE_PROT        0x1C    /* If the card has write protection features, sets the write protection bit */
#define CMD29_CLR_WRITE_PROT        0x1D    /* If with write protection features, clears the write protection bit */
#define CMD30_SEND_WRITE_PROT       0x1E    /* If with write protection features, asks the card to send status of write protection bit */
#define CMD32_TAG_SECTOR_START      0x20    /* Sets the address of the first sector */
#define CMD33_TAG_SECTOR_END        0x21    /* Sets the address of the last sectore */
#define CMD34_UNTAG_SECTOR          0x22    /* Removes one previously selected sector */
#define CMD35_TAG_ERASE_GROUP_START 0x23    /* Sets the address of the first erase group */
#define CMD36_TAG_ERASE_GROUP_END   0x24    /* Sets the address of the last erase group */
#define CMD37_UNTAG_ERASE_GROUP     0x25    /* Removes on previously selected erase group */
#define CMD38_ERASE                 0x26    /* Erases all previously selected sectors */
#define CMD39_FAST_IO_MMC           0x27
#define CMD40_GO_IRQ_STATE          0x28    
#define CMD42_LOCK_UNLOCK           0x2A    /* Used to set/reset the password or lock/unlock the card */
#define CMD55_APP					0x37	/* Indicates to the card the next cmd is an application specific command */
#define CMD56_GEN					0x38	/* Used either to transfer a data block or to get a data block form the card for general purpse */

// commnad value for MSDC controller SDC_CMD
#define SDC_CMD_CMD0	         0x0000
#define SDC_CMD_CMD1	         0x0181
#define SDC_CMD_CMD2	         0x0502
#define SDC_CMD_CMD3_SD	     0x0303
#define SDC_CMD_CMD3_MMC    0x0083
#define SDC_CMD_CMD4	         0x0004
#define SDC_CMD_CMD7	         0x0387
//#define SDC_CMD_CMD7	         0x0087
#define SDC_CMD_CMD8				0x0088
#define SDC_CMD_CMD9	         0x0109
#define SDC_CMD_CMD10	         0x010a	// the response time delay is not NID(5 cycles)
#define SDC_CMD_CMD11_MMC		 0x188b 
#define SDC_CMD_CMD12	         0x438c	
//#define SDC_CMD_CMD12	         0x038c	// remove STOP bit 
#define SDC_CMD_CMD13	         0x008d
#define SDC_CMD_CMD15	         0x000f
#define SDC_CMD_CMD16	         0x0090
#define SDC_CMD_CMD17	         0x0891
#define SDC_CMD_CMD18	         0x1092
#define SDC_CMD_CMD20_MMC        0x3894
#define SDC_CMD_CMD24	         0x2898
//#define SDC_CMD_CMD24	         0x2b98	// use R1b to replace R1 write single block
#define SDC_CMD_CMD25	         0x3099
//#define SDC_CMD_CMD25	         0x3399	// use R1b to replace R1 write single block
#define SDC_CMD_CMD26	         0x009a
#define SDC_CMD_CMD27	         0x009b
#define SDC_CMD_CMD28	         0x039c
#define SDC_CMD_CMD29	         0x039d
#define SDC_CMD_CMD30	         0x089e
#define SDC_CMD_CMD32	         0x00a0
#define SDC_CMD_CMD33	         0x00a1
#define SDC_CMD_CMD34_MMC        0x00a2
#define SDC_CMD_CMD35_MMC        0x00a3
#define SDC_CMD_CMD36_MMC        0x00a4
#define SDC_CMD_CMD37_MMC        0x00a5
#define SDC_CMD_CMD38	         0x03a6
#define SDC_CMD_CMD39_MMC        0x0227
#define SDC_CMD_CMD40_MMC        0x82a8
#define SDC_CMD_CMD41_SD         0x01a9     
#define SDC_CMD_CMD42	         0x2baa     
#define SDC_CMD_CMD55	         0x00b7     
#define SDC_CMD_CMD56	         0x00b8
#define SDC_CMD_ACMD6			 0x0086
#define SDC_CMD_ACMD13			 0x088d
#define SDC_CMD_ACMD22			 0x0896
#define SDC_CMD_ACMD23			 0x0097	
#define SDC_CMD_ACMD42			 0x00aa
#define SDC_CMD_ACMD51			 0x08b3	

// for MMC4.0
#define SDC_CMD_CMD6_MMC40			0x0386	// SWITCH
#define SDC_CMD_CMD8_MMC40			0x0888	// SEND_EXT_CSD

#define SDC_CMD_CMD6_SD11			0x0886	// SWITCH
/* SDIO command*/
#define SDC_CMD_CMD5				0x0185	// use R3 to replace R4
#define SDC_CMD_CMD52			0x02b4	// STOp field will be set while used to Stop data transfer
#define SDC_CMD_CMD53			0x01b5	// the RWand DTYPE will be changed according request
// bit masks     
#define BIT_MASK_1 0x01

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