📄 fftdsp.mdl
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Open off
NumInputPorts "4"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
axes3 "%<SignalLabel>"
axes4 "%<SignalLabel>"
}
YMin "-5~-5~-5~-5"
YMax "5~5~5~5"
SaveName "ScopeData1"
DataFormat "StructureWithTime"
}
Block {
BlockType Scope
Name "Scope3"
Ports [4]
Position [1915, 475, 1975, 605]
Location [5, 56, 1029, 741]
Open off
NumInputPorts "4"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
axes3 "%<SignalLabel>"
axes4 "%<SignalLabel>"
}
YMin "-5~-5~-5~-5"
YMax "5~5~5~5"
SaveName "ScopeData2"
DataFormat "StructureWithTime"
}
Block {
BlockType Reference
Name "Shift Taps"
Ports [1, 8]
Position [160, 108, 205, 537]
ForegroundColor "blue"
FontSize 10
SourceBlock "store_alteradspbuilder/Shift Taps"
SourceType "ShiftTaps Altera Blockset"
bwaddr "8"
depth "1"
cst off
clken off
eab "None"
}
Block {
BlockType Reference
Name "SignalCompiler"
Ports []
Position [1084, 538, 1153, 585]
ForegroundColor "blue"
FontSize 10
SourceBlock "ALTELINK/AltLab/SignalCompiler"
SourceType "SignalCompiler"
family "Stratix"
opt "Speed"
synthtool "Others"
vstim on
SynthAct "None"
workdir "F:\\DSPBuilder\\fft"
Procetype "prod"
UseReset on
ResetPin "Active High"
ClockPin "Output to Pin"
ClockPeriod "20"
UseSignalTap off
CreatePtfFile off
SignalTapDepth "128"
VerilogSupport off
}
Block {
BlockType Sin
Name "Sine Wave"
Ports [0, 1]
Position [15, 310, 45, 340]
SineType "Time based"
SampleTime "0"
}
Block {
BlockType Reference
Name "input"
Description "Sign Binary Fractionnal"
Ports [1, 1]
Position [60, 317, 125, 333]
ForegroundColor "blue"
FontSize 10
SourceBlock "bus_alteradspbuilder/AltBus"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Input Port"
bwl "8"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
LocPin "any"
cst "0"
modulename "input"
ppat "F:\\DSPBuilder\\fft\\DSPBuilder_fftdsp"
nSgCpl "1"
}
Block {
BlockType Reference
Name "w0"
Ports [0, 1]
Position [380, 194, 450, 216]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "8"
bwr "0"
cst "127"
slval "0"
}
Block {
BlockType Reference
Name "w01"
Ports [0, 1]
Position [385, 284, 455, 306]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "8"
bwr "0"
cst "127"
slval "0"
}
Block {
BlockType Reference
Name "w02"
Ports [0, 1]
Position [385, 384, 455, 406]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "8"
bwr "0"
cst "127"
slval "0"
}
Block {
BlockType Reference
Name "w03"
Ports [0, 1]
Position [385, 469, 455, 491]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "8"
bwr "0"
cst "127"
slval "0"
}
Block {
BlockType Reference
Name "w04"
Ports [0, 1]
Position [740, 374, 810, 396]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "16"
bwr "0"
cst "0"
slval "127"
}
Block {
BlockType Reference
Name "w06"
Ports [0, 1]
Position [735, 194, 805, 216]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "16"
bwr "0"
cst "1"
slval "0"
}
Block {
BlockType Reference
Name "w08"
Ports [0, 1]
Position [1120, 189, 1190, 211]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "8"
bwr "0"
cst "127"
slval "0"
}
Block {
BlockType Reference
Name "w19"
Ports [0, 1]
Position [1120, 279, 1190, 301]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "8"
bwr "0"
cst "90"
slval "90"
}
Block {
BlockType Reference
Name "w210"
Ports [0, 1]
Position [1115, 369, 1185, 391]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "8"
bwr "0"
cst "0"
slval "127"
}
Block {
BlockType Reference
Name "w25"
Ports [0, 1]
Position [740, 289, 810, 311]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "16"
bwr "0"
cst "1"
slval "0"
}
Block {
BlockType Reference
Name "w27"
Ports [0, 1]
Position [745, 454, 815, 476]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "16"
bwr "0"
cst "0"
slval "127"
}
Block {
BlockType Reference
Name "w311"
Ports [0, 1]
Position [1115, 449, 1185, 471]
ForegroundColor "blue"
FontSize 10
SourceBlock "cplx_alteradspbuilder/Complex Constant"
SourceType "Complex Constant Altera BlockSet"
BusType "Signed Integer"
bwl "8"
bwr "0"
cst "90"
slval "90"
}
Block {
BlockType Reference
Name "x0"
Description "Sign Binary Fractionnal"
Ports [0, 1]
Position [210, 136, 260, 154]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/Constant"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Constant"
bwl "8"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
ncstsamp "-1"
cst "0"
modulename "Constant"
nSgCpl "0"
}
Block {
BlockType Reference
Name "x1"
Description "Sign Binary Fractionnal"
Ports [0, 1]
Position [210, 191, 260, 209]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/Constant"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Constant"
bwl "8"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
ncstsamp "-1"
cst "0"
modulename "Constant"
nSgCpl "0"
}
Block {
BlockType Reference
Name "x2"
Description "Sign Binary Fractionnal"
Ports [0, 1]
Position [215, 246, 265, 264]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/Constant"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Constant"
bwl "8"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
ncstsamp "-1"
cst "0"
modulename "Constant"
nSgCpl "0"
}
Block {
BlockType Reference
Name "x3"
Description "Sign Binary Fractionnal"
Ports [0, 1]
Position [210, 301, 260, 319]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/Constant"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Constant"
bwl "8"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
ncstsamp "-1"
cst "0"
modulename "Constant"
nSgCpl "0"
}
Block {
BlockType Reference
Name "x4"
Description "Sign Binary Fractionnal"
Ports [0, 1]
Position [215, 356, 265, 374]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/Constant"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Constant"
bwl "8"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
ncstsamp "-1"
cst "0"
modulename "Constant"
nSgCpl "0"
}
Block {
BlockType Reference
Name "x5"
Description "Sign Binary Fractionnal"
Ports [0, 1]
Position [210, 411, 260, 429]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/Constant"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Constant"
bwl "8"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
ncstsamp "-1"
cst "0"
modulename "Constant"
nSgCpl "0"
}
Block {
BlockType Reference
Name "x6"
Description "Sign Binary Fractionnal"
Ports [0, 1]
Position [210, 466, 260, 484]
ForegroundColor "blue"
SourceBlock "bus_alteradspbuilder/Constant"
SourceType "AltBus AlteraBlockSet"
sgn "Signed Integer"
nodetype "Constant"
bwl "8"
bwr "0"
sat off
rnd off
bp off
mask_cst "0"
ncstsamp "-1"
cst "0"
modulename "Constant"
nSgCpl "0"
}
Block {
BlockType Reference
Name "x7"
Description "Sign Binary Fractionnal"
Ports [0, 1]
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