📄 example_280xswprioritizeddefaultisr.c
字号:
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
//Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0021;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER2_2 (use MINT2 and MG22 masks):
#if (G22PL != 0)
interrupt void EPWM2_TZINT_ISR(void) // ePWM2 Trip Zone
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG22; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0022;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER2_3 (use MINT2 and MG23 masks):
#if (G23PL != 0)
interrupt void EPWM3_TZINT_ISR(void) // ePWM3 Trip Zone
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG23; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0023;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER2_4 (use MINT2 and MG24 masks):
#if (G24PL != 0)
interrupt void EPWM4_TZINT_ISR(void) // ePWM4 Trip Zone
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG24; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0024;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER2_5 (use MINT2 and MG25 masks):
#if (G25PL != 0)
interrupt void EPWM5_TZINT_ISR(void) // ePWM5 Trip Zone
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG25; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0025;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER2_6 (use MINT2 and MG26 masks):
#if (G26PL != 0)
interrupt void EPWM6_TZINT_ISR(void) // ePWM6 Trip Zone
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG26; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0026;
ISRTraceIndex++;
}
#endif
// -----------------------------------------------------------
// PIE Group 3 - MUXed into CPU INT3
// -----------------------------------------------------------
// Connected to PIEIER3_1 (use MINT3 and MG31 masks):
#if (G31PL != 0)
interrupt void EPWM1_INT_ISR(void) // ePWM1 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
IER |= M_INT3;
IER &= MINT3; // Set "global" priority
PieCtrlRegs.PIEIER3.all &= MG31; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER3.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0031;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER3_2 (use MINT3 and MG32 masks):
#if (G32PL != 0)
interrupt void EPWM2_INT_ISR(void) // ePWM2 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
IER |= M_INT3;
IER &= MINT3; // Set "global" priority
PieCtrlRegs.PIEIER3.all &= MG32; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER3.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0032;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER3_3 (use MINT3 and MG33 masks):
#if (G33PL != 0)
interrupt void EPWM3_INT_ISR(void) // ePWM3 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
IER |= M_INT3;
IER &= MINT3; // Set "global" priority
PieCtrlRegs.PIEIER3.all &= MG33; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER3.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0033;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER3_4 (use MINT3 and MG34 masks):
#if (G34PL != 0)
interrupt void EPWM4_INT_ISR(void) // ePWM4 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
IER |= M_INT3;
IER &= MINT3; // Set "global" priority
PieCtrlRegs.PIEIER3.all &= MG34; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER3.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0034;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER3_5 (use MINT3 and MG35 masks):
#if (G35PL != 0)
interrupt void EPWM5_INT_ISR(void) // ePWM5 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
IER |= M_INT3;
IER &= MINT3; // Set "global" priority
PieCtrlRegs.PIEIER3.all &= MG35; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER3.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0035;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER3_6 (use MINT3 and MG36 masks):
#if (G36PL != 0)
interrupt void EPWM6_INT_ISR(void) // ePWM6 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
IER |= M_INT3;
IER &= MINT3; // Set "global" priority
PieCtrlRegs.PIEIER3.all &= MG36; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER3.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0036;
ISRTraceIndex++;
}
#endif
// -----------------------------------------------------------
// PIE Group 4 - MUXed into CPU INT4
// -----------------------------------------------------------
// Connected to PIEIER4_1 (use MINT4 and MG41 masks):
#if (G41PL != 0)
interrupt void ECAP1_INT_ISR(void) // eCAP1 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
IER |= M_INT4;
IER &= MINT4; // Set "global" priority
PieCtrlRegs.PIEIER4.all &= MG41; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER4.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0041;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER4_2 (use MINT4 and MG42 masks):
#if (G42PL != 0)
interrupt void ECAP2_INT_ISR(void) // eCAP2 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
IER |= M_INT4;
IER &= MINT4; // Set "global" priority
PieCtrlRegs.PIEIER4.all &= MG42; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER4.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0042;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER4_3 (use MINT4 and MG43 masks):
#if (G43PL != 0)
interrupt void ECAP3_INT_ISR(void) // eCAP3 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
IER |= M_INT4;
IER &= MINT4; // Set "global" priority
PieCtrlRegs.PIEIER4.all &= MG43; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER4.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0043;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER4_4 (use MINT4 and MG44 masks):
#if (G44PL != 0)
interrupt void ECAP4_INT_ISR(void) // eCAP4 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
IER |= M_INT4;
IER &= MINT4; // Set "global" priority
PieCtrlRegs.PIEIER4.all &= MG44; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER4.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0044;
ISRTraceIndex++;
}
#endif
// -----------------------------------------------------------
// PIE Group 5 - MUXed into CPU INT5
// -----------------------------------------------------------
// Connected to PIEIER5_1 (use MINT5 and MG51 masks):
#if (G51PL != 0)
interrupt void EQEP1_INT_ISR(void) // eQEP1 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER5.all;
IER |= M_INT5;
IER &= MINT5; // Set "global" priority
PieCtrlRegs.PIEIER5.all &= MG51; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER5.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0051;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER5_2 (use MINT5 and MG52 masks):
#if (G52PL != 0)
interrupt void EQEP2_INT_ISR(void) // eQEP2 Interrupt
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER5.all;
IER |= M_INT5;
IER &= MINT5; // Set "global" priority
PieCtrlRegs.PIEIER5.all &= MG52; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER5.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0052;
ISRTraceIndex++;
}
#endif
// -----------------------------------------------------------
// PIE Group 6 - MUXed into CPU INT6
// -----------------------------------------------------------
// Connected to PIEIER6_1 (use MINT6 and MG61 masks):
#if (G61PL != 0)
interrupt void SPIRXINTA_ISR(void) // SPI-A
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER6.all;
IER |= M_INT6;
IER &= MINT6; // Set "global" priority
PieCtrlRegs.PIEIER6.all &= MG61; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
// Insert ISR Code here.......
for(i = 1; i <= 10; i++) {}
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER6.all = TempPIEIER;
// Add ISR to Trace
ISRTrace[ISRTraceIndex] = 0x0061;
ISRTraceIndex++;
}
#endif
// Connected to PIEIER6_2 (use MINT6 and MG62 masks):
#if (G62PL != 0)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -