sja1000.h

该程序完成了c8051外围电路的驱动和串口协议的编写。希望能给大家学习51单片机带来帮助

#define   SJA_BaseAddr    0x8000           /*Address of SJA1000 chip*/
#define   SJA_MOD         SJA_BaseAddr+0   /* Mode,PeliCAN mode */
#define   SJA_CMR         SJA_BaseAddr+1   /* command */
#define   SJA_SR          SJA_BaseAddr+2   /* status */
#define   SJA_IR          SJA_BaseAddr+3   /* interrupt */
#define   SJA_IER         SJA_BaseAddr+4   /* interrupt enable */
#define   SJA_REV1        SJA_BaseAddr+5   /* RESERVED */
#define   SJA_BTR0        SJA_BaseAddr+6   /* bus timing 0 */
#define   SJA_BTR1        SJA_BaseAddr+7   /* bus timing 1 */
#define   SJA_OCR         SJA_BaseAddr+8   /* output control */

#define   SJA_TST         SJA_BaseAddr+9   /* test */

#define   SJA_REV2       SJA_BaseAddr+10   /* Reserved */
#define   SJA_ALC        SJA_BaseAddr+11   /* Arbitration lost capture */
#define   SJA_ECC        SJA_BaseAddr+12   /* Error code capture */
#define   SJA_EWLR       SJA_BaseAddr+13   /* Error warning limit */
#define   SJA_RXERR      SJA_BaseAddr+14   /* RX error counter */
#define   SJA_TXERR      SJA_BaseAddr+15   /* TX error counter */
#define   SJA_DLC        SJA_BaseAddr+16   /* TX/RX frame information:EFF,RTR,DLC; ACR0 for reset mode */
#define   SJA_ID1        SJA_BaseAddr+17   /* ID28~ID21; ACR1 for reset mode */
#define   SJA_ID2        SJA_BaseAddr+18   /* ID20~ID13; ACR2 for reset mode*/
#define   SJA_ID3        SJA_BaseAddr+19   /* ID12~ID5;  ACR3 for reset mode*/
#define   SJA_ID4        SJA_BaseAddr+20   /* ID4~ID0 ;  AMR0 for reset mode*/
#define   SJA_DAT1       SJA_BaseAddr+21   /* TX/RX data byte 1;  AMR1 for reset mode*/
#define   SJA_DAT2       SJA_BaseAddr+22   /* TX/RX data byte 2;  AMR2 for reset mode*/
#define   SJA_DAT3       SJA_BaseAddr+23   /* TX/RX data byte 3;  AMR3 for reset mode */
#define   SJA_DAT4       SJA_BaseAddr+24   /* TX/RX data byte 4 */
#define   SJA_DAT5       SJA_BaseAddr+25   /* TX/RX data byte 5 */
#define   SJA_DAT6       SJA_BaseAddr+26   /* TX/RX data byte 6 */
#define   SJA_DAT7       SJA_BaseAddr+27   /* TX/RX data byte 7 */
#define   SJA_DAT8       SJA_BaseAddr+28   /* TX/RX data byte 8 */
#define   SJA_RMC        SJA_BaseAddr+29   /* RX message counter */
#define   SJA_RBSA       SJA_BaseAddr+30   /* RX buffer start address */
#define   SJA_CDR        SJA_BaseAddr+31   /* clock divider */
#define   SJA_ADDR       SJA_BaseAddr+32   /* internal RAM address 0 */

/* ---end of SJA1000 register addresses --- */