adc12.h

Mplab C30编译器

#define ADC_CONV_CLK_26Tcy          0xFFF3
#define ADC_CONV_CLK_51Tcy2         0xFFF2
#define ADC_CONV_CLK_25Tcy          0xFFF1
#define ADC_CONV_CLK_49Tcy2         0xFFF0
#define ADC_CONV_CLK_24Tcy          0xFFEF
#define ADC_CONV_CLK_47Tcy2         0xFFEE
#define ADC_CONV_CLK_23Tcy          0xFFED
#define ADC_CONV_CLK_45Tcy2         0xFFEC
#define ADC_CONV_CLK_22Tcy          0xFFEB
#define ADC_CONV_CLK_43Tcy2         0xFFEA
#define ADC_CONV_CLK_21Tcy          0xFFE9
#define ADC_CONV_CLK_41Tcy2         0xFFE8
#define ADC_CONV_CLK_20Tcy          0xFFE7
#define ADC_CONV_CLK_39Tcy2         0xFFE6
#define ADC_CONV_CLK_19Tcy          0xFFE5
#define ADC_CONV_CLK_37Tcy2         0xFFE4
#define ADC_CONV_CLK_18Tcy          0xFFE3
#define ADC_CONV_CLK_35Tcy2         0xFFE2
#define ADC_CONV_CLK_17Tcy          0xFFE1
#define ADC_CONV_CLK_33Tcy2         0xFFE0
#define ADC_CONV_CLK_16Tcy          0xFFDF
#define ADC_CONV_CLK_31Tcy2         0xFFDE
#define ADC_CONV_CLK_15Tcy          0xFFDD
#define ADC_CONV_CLK_29Tcy2         0xFFDC
#define ADC_CONV_CLK_14Tcy          0xFFDB
#define ADC_CONV_CLK_27Tcy2         0xFFDA
#define ADC_CONV_CLK_13Tcy          0xFFD9
#define ADC_CONV_CLK_25Tcy2         0xFFD8
#define ADC_CONV_CLK_12Tcy          0xFFD7
#define ADC_CONV_CLK_23Tcy2         0xFFD6
#define ADC_CONV_CLK_11Tcy          0xFFD5
#define ADC_CONV_CLK_21Tcy2         0xFFD4
#define ADC_CONV_CLK_10Tcy          0xFFD3
#define ADC_CONV_CLK_19Tcy2         0xFFD2
#define ADC_CONV_CLK_9Tcy           0xFFD1
#define ADC_CONV_CLK_17Tcy2         0xFFD0
#define ADC_CONV_CLK_8Tcy           0xFFCF
#define ADC_CONV_CLK_15Tcy2         0xFFCE
#define ADC_CONV_CLK_7Tcy           0xFFCD
#define ADC_CONV_CLK_13Tcy2         0xFFCC
#define ADC_CONV_CLK_6Tcy           0xFFCB
#define ADC_CONV_CLK_11Tcy2         0xFFCA
#define ADC_CONV_CLK_5Tcy           0xFFC9
#define ADC_CONV_CLK_9Tcy2          0xFFC8
#define ADC_CONV_CLK_4Tcy           0xFFC7
#define ADC_CONV_CLK_7Tcy2          0xFFC6
#define ADC_CONV_CLK_3Tcy           0xFFC5
#define ADC_CONV_CLK_5Tcy2          0xFFC4
#define ADC_CONV_CLK_2Tcy           0xFFC3
#define ADC_CONV_CLK_3Tcy2          0xFFC2
#define ADC_CONV_CLK_Tcy            0xFFC1  /* A/D Conversion Clock Select bits */
#define ADC_CONV_CLK_Tcy2           0xFFC0  /* A/D Conversion Clock Select bits */

/* Input select register (ADCHS) configuration defines */
#define ADC_CH0_POS_SAMPLEA_AN15    0xFFFF  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN15 */
#define ADC_CH0_POS_SAMPLEA_AN14    0xFFFE  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN14 */
#define ADC_CH0_POS_SAMPLEA_AN13    0xFFFD  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN13 */
#define ADC_CH0_POS_SAMPLEA_AN12    0xFFFC  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN12 */
#define ADC_CH0_POS_SAMPLEA_AN11    0xFFFB  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN11 */
#define ADC_CH0_POS_SAMPLEA_AN10    0xFFFA  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN10 */
#define ADC_CH0_POS_SAMPLEA_AN9     0xFFF9  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN9 */   
#define ADC_CH0_POS_SAMPLEA_AN8     0xFFF8  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN8 */   
#define ADC_CH0_POS_SAMPLEA_AN7     0xFFF7  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN7 */ 
#define ADC_CH0_POS_SAMPLEA_AN6     0xFFF6  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN6 */   
#define ADC_CH0_POS_SAMPLEA_AN5     0xFFF5  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN5 */   
#define ADC_CH0_POS_SAMPLEA_AN4     0xFFF4  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN4 */   
#define ADC_CH0_POS_SAMPLEA_AN3     0xFFF3  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN3 */   
#define ADC_CH0_POS_SAMPLEA_AN2     0xFFF2  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN2 */   
#define ADC_CH0_POS_SAMPLEA_AN1     0xFFF1  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN1 */   
#define ADC_CH0_POS_SAMPLEA_AN0     0xFFF0  /* A/D Chan 0 pos i/p sel for SAMPLE A is AN0 */   

#define ADC_CH0_NEG_SAMPLEA_AN1     0xFFFF  /* A/D Chan 0 neg i/p sel for SAMPLE A is AN1 */
#define ADC_CH0_NEG_SAMPLEA_NVREF   0xFFEF  /* A/D Chan 0 neg i/p sel for SAMPLE A is -Vref */

#define ADC_CH0_POS_SAMPLEB_AN15    0xFFFF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN15 */
#define ADC_CH0_POS_SAMPLEB_AN14    0xFEFF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN14 */
#define ADC_CH0_POS_SAMPLEB_AN13    0xFDFF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN13 */
#define ADC_CH0_POS_SAMPLEB_AN12    0xFCFF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN12 */
#define ADC_CH0_POS_SAMPLEB_AN11    0xFBFF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN11 */
#define ADC_CH0_POS_SAMPLEB_AN10    0xFAFF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN10 */
#define ADC_CH0_POS_SAMPLEB_AN9     0xF9FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN9 */
#define ADC_CH0_POS_SAMPLEB_AN8     0xF8FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN8 */
#define ADC_CH0_POS_SAMPLEB_AN7     0xF7FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN7 */
#define ADC_CH0_POS_SAMPLEB_AN6     0xF6FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN6 */
#define ADC_CH0_POS_SAMPLEB_AN5     0xF5FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN5 */
#define ADC_CH0_POS_SAMPLEB_AN4     0xF4FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN4 */
#define ADC_CH0_POS_SAMPLEB_AN3     0xF3FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN3 */
#define ADC_CH0_POS_SAMPLEB_AN2     0xF2FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN2 */
#define ADC_CH0_POS_SAMPLEB_AN1     0xF1FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN1 */
#define ADC_CH0_POS_SAMPLEB_AN0     0xF0FF  /* A/D Chan 0 pos i/p sel for SAMPLE B is AN0 */

#define ADC_CH0_NEG_SAMPLEB_AN1     0xFFFF  /* A/D Channel 0 negative input select for SAMPLE B */
#define ADC_CH0_NEG_SAMPLEB_NVREF   0xEFFF  /* A/D Channel 0 negative input select for SAMPLE B */

/* ADC read buffer starting point defines */
#define ADC_RESULT_FIRST                0x0000  /* A/D read results from 00h address */
#define ADC_RESULT_SECOND               0x0008  /* A/D read results from the 08h address */

/*defines for ADCSSL register */

#define SKIP_SCAN_AN0                   0xFFFE /*Skip AN0 for Input Scan */
#define SKIP_SCAN_AN1                   0xFFFD /*Skip AN1 for Input Scan */    
#define SKIP_SCAN_AN2                   0xFFFB /*Skip AN2 for Input Scan */
#define SKIP_SCAN_AN3                   0xFFF7 /*Skip AN3 for Input Scan */
#define SKIP_SCAN_AN4                   0xFFEF /*Skip AN4 for Input Scan */
#define SKIP_SCAN_AN5                   0xFFDF /*Skip AN5 for Input Scan */    
#define SKIP_SCAN_AN6                   0xFFBF /*Skip AN6 for Input Scan */
#define SKIP_SCAN_AN7                   0xFF7F /*Skip AN7 for Input Scan */
#define SKIP_SCAN_AN8                   0xFEFF /*Skip AN8 for Input Scan */
#define SKIP_SCAN_AN9                   0xFDFF /*Skip AN9 for Input Scan */    
#define SKIP_SCAN_AN10                  0xFBFF /*Skip AN10 for Input Scan */
#define SKIP_SCAN_AN11                  0xF7FF /*Skip AN11 for Input Scan */
#define SKIP_SCAN_AN12                  0xEFFF /*Skip AN12 for Input Scan */
#define SKIP_SCAN_AN13                  0xDFFF /*Skip AN13 for Input Scan */   
#define SKIP_SCAN_AN14                  0xBFFF /*Skip AN14 for Input Scan */
#define SKIP_SCAN_AN15                  0x7FFF /*Skip AN15 for Input Scan */
 
#define SCAN_NONE                       0x0000 /*Skip AN0-AN15 for Input Scan */
#define SCAN_ALL                        0xFFFF /*Enable AN0-AN15 for Input Scan */

/*defines for ADPCFG register */

#define ENABLE_AN0_ANA                  0xFFFE /*Enable AN0 in analog mode */
#define ENABLE_AN1_ANA                  0xFFFD /*Enable AN1 in analog mode */
#define ENABLE_AN2_ANA                  0xFFFB /*Enable AN2 in analog mode */
#define ENABLE_AN3_ANA                  0xFFF7 /*Enable AN3 in analog mode */
#define ENABLE_AN4_ANA                  0xFFEF /*Enable AN4 in analog mode */
#define ENABLE_AN5_ANA                  0xFFDF /*Enable AN5 in analog mode */
#define ENABLE_AN6_ANA                  0xFFBF /*Enable AN6 in analog mode */
#define ENABLE_AN7_ANA                  0xFF7F /*Enable AN7 in analog mode */
#define ENABLE_AN8_ANA                  0xFEFF /*Enable AN8 in analog mode */
#define ENABLE_AN9_ANA                  0xFDFF /*Enable AN9 in analog mode */
#define ENABLE_AN10_ANA                 0xFBFF /*Enable AN10 in analog mode */
#define ENABLE_AN11_ANA                 0xF7FF /*Enable AN11 in analog mode */
#define ENABLE_AN12_ANA                 0xEFFF /*Enable AN12 in analog mode */
#define ENABLE_AN13_ANA                 0xDFFF /*Enable AN13 in analog mode */
#define ENABLE_AN14_ANA                 0xBFFF /*Enable AN14 in analog mode */
#define ENABLE_AN15_ANA                 0x7FFF /*Enable AN15 in analog mode */

#define ENABLE_ALL_ANA                  0x0000 /*Enable AN0-AN15 in analog mode */
#define ENABLE_ALL_DIG                  0xFFFF /*Enable AN0-AN15 in Digital mode */

/* Setting the priority of adc interrupt */
#define ADC_INT_PRI_0                   0xFFF8
#define ADC_INT_PRI_1                   0xFFF9
#define ADC_INT_PRI_2                   0xFFFA
#define ADC_INT_PRI_3                   0xFFFB
#define ADC_INT_PRI_4                   0xFFFC
#define ADC_INT_PRI_5                   0xFFFD
#define ADC_INT_PRI_6                   0xFFFE
#define ADC_INT_PRI_7                   0xFFFF

/* enable / disable interrupts */

#define ADC_INT_ENABLE                  0xFFFF
#define ADC_INT_DISABLE                 0xFFF7

/* Macros to  Enable/Disable interrupts and set Interrupt priority */
#define EnableIntADC                    IEC0bits.ADIE = 1
#define DisableIntADC                   IEC0bits.ADIE = 0
#define SetPriorityIntADC(priority)     IPC2bits.ADIP = (priority)

/* A/D Converter Function Prototypes */

#define StopSampADC12               ConvertADC12

void OpenADC12(unsigned int, unsigned int,
     unsigned int,unsigned int,unsigned int) __attribute__ ((section (".libperi"))); /* config ADC */

void ConvertADC12(void) __attribute__ ((section (".libperi")));                      /* Start an A/D conversion */

void SetChanADC12(unsigned int) __attribute__ ((section (".libperi")));              /* Set A/D to specified channel */

unsigned int ReadADC12(unsigned char) __attribute__ ((section (".libperi")));        /* Read A/D result */

void CloseADC12(void) __attribute__ ((section (".libperi")));                        /* Turn off A/D */

char BusyADC12(void) __attribute__ ((section (".libperi")));                         /* Check status of A/D conversion */

void ConfigIntADC12(unsigned int) __attribute__ ((section (".libperi")));

#endif

#endif