📄 pwm12.h
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void ConfigIntMCPWM1(unsigned int config) __attribute__ ((section (".libperi")));
void OpenMCPWM1(unsigned int period, unsigned int sptime,unsigned int
config1, unsigned int config2, unsigned int config3) __attribute__ ((section (".libperi")));
void OverrideMCPWM1(unsigned int config) __attribute__ ((section (".libperi")));
void SetDCMCPWM1(unsigned int dutycyclereg, unsigned int dutycycle,
char updatedisable) __attribute__ ((section (".libperi")));
void SetMCPWM1DeadTimeGeneration(unsigned int config) __attribute__ ((section (".libperi")));
void SetMCPWM1FaultA(unsigned int config) __attribute__ ((section (".libperi")));
/* Definitions for devices that have 4 PWM outputs and a Fault B input */
#ifdef _FLTBIF
/* PWM1CON1 Configuration Bit Definitions */
#define PWM1_MOD4_COMP 0x07FF /*4th channel in complimentary mode*/
#define PWM1_MOD4_IND 0x0FFF /*4th channel in independant mode*/
#define PWM1_PEN4H 0x0FFF /*H of channel 4 works as PWM*/
#define PWM1_PDIS4H 0x0F7F /*H of channel 4 works as IO*/
#define PWM1_PEN4L 0x0FFF /*L of channel 4 works as PWM*/
#define PWM1_PDIS4L 0x0FF7 /*L of channel 4 works as IO*/
/* DTCON2 Configuration Bit Definitions */
#define PWM1_DTS4A_UB 0x00FF /*Dead time for channel 4 to get Active controlled by unit B*/
#define PWM1_DTS4I_UB 0x00FF /*Dead time for channel 4 to get Inactive controlled by unit B*/
#define PWM1_DTS4A_UA 0x007F /*Dead time for channel 4 to get Active controlled by unit A*/
#define PWM1_DTS4I_UA 0x00BF /*Dead time for channel 4 to get Inactive controlled by unit A*/
/* OVDCON Configuration Bit Definitions */
#define PWM1_GEN_4H 0xFFFF /*controlled by the PWM generator.*/
#define PWM1_GEN_4L 0xFFFF /*controlled by the PWM generator.*/
#define PWM1_POUT_4H 0x7FFF /*controlled by the value in the corresponding POUT bit.*/
#define PWM1_POUT_4L 0xBFFF /*controlled by the value in the corresponding POUT bit.*/
#define PWM1_POUT4H_ACT 0xFFFF /*I/O pin is driven ACTIVE when the corresponding POVDxx bit is cleared.*/
#define PWM1_POUT4H_INACT 0xFF7F /*I/O pin is driven INACTIVE when the corresponding POVDxx bit is cleared.*/
#define PWM1_POUT4L_ACT 0xFFFF /*I/O pin is driven ACTIVE when the corresponding POVDxx bit is cleared.*/
#define PWM1_POUT4L_INACT 0xFFBF /*I/O pin is driven INACTIVE when the corresponding POVDxx bit is cleared.*/
/* FLTACON Register */
#define PWM1_OVA4H_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVA4L_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVA4H_INACTIVE 0x7FFF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_OVA4L_INACTIVE 0xBFFF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_FLTA4_EN 0xFFFF /* PWM4H/PWM4L pin pair is controlled by Fault Input A.*/
#define PWM1_FLTA4_DIS 0xFFF7 /* PWM4H/PWM4L pin pair is not controlled by Fault Input A.*/
/* Enable/Disable FaultB Interrupt */
#define PWM1_FLTB_EN_INT 0xFFFF /*Enable Fault B Interrupt */
#define PWM1_FLTB_DIS_INT 0xF7FF /*Disable Fault B Interrupt */
/* Setting the priority of PWM FaultB interrupt */
#define PWM1_FLTB_INT_PR0 0xF8FF /* FaultB interrupt priority 0*/
#define PWM1_FLTB_INT_PR1 0xF9FF /* FaultB interrupt priority 1*/
#define PWM1_FLTB_INT_PR2 0xFAFF /* FaultB interrupt priority 2*/
#define PWM1_FLTB_INT_PR3 0xFBFF /* FaultB interrupt priority 3*/
#define PWM1_FLTB_INT_PR4 0xFCFF /* FaultB interrupt priority 4*/
#define PWM1_FLTB_INT_PR5 0xFDFF /* FaultB interrupt priority 5*/
#define PWM1_FLTB_INT_PR6 0xFEFF /* FaultB interrupt priority 6*/
#define PWM1_FLTB_INT_PR7 0xFFFF /* FaultB interrupt priority 7*/
/* FLTBCON Register */
#define PWM1_OVB4H_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVB4L_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVB3H_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVB2H_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVB1H_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVB3L_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVB2L_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVB1L_ACTIVE 0xFFFF /*The PWM output pin is driven ACTIVE on an external fault input event.*/
#define PWM1_OVB4H_INACTIVE 0x7FFF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_OVB3H_INACTIVE 0xDFFF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_OVB2H_INACTIVE 0xF7FF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_OVB1H_INACTIVE 0xFDFF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_OVB4L_INACTIVE 0xBFFF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_OVB3L_INACTIVE 0xEFFF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_OVB2L_INACTIVE 0xFBFF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_OVB1L_INACTIVE 0xFEFF /*The PWM output pin is driven INACTIVE on an external fault input event.*/
#define PWM1_FLTB_MODE_CYCLE 0xFFFF /* The Fault B input pin functions in the cycle-by-cycle limit mode.*/
#define PWM1_FLTB_MODE_LATCH 0xFF7F /* The Fault B input pin latches all control pins to the programmed states.*/
#define PWM1_FLTB4_EN 0xFFFF /* PWM4H/PWM4L pin pair is controlled by Fault Input B.*/
#define PWM1_FLTB3_EN 0xFFFF /* PWM3H/PWM3L pin pair is controlled by Fault Input B.*/
#define PWM1_FLTB2_EN 0xFFFF /* PWM2H/PWM2L pin pair is controlled by Fault Input B.*/
#define PWM1_FLTB1_EN 0xFFFF /* PWM1H/PWM1L pin pair is controlled by Fault Input B.*/
#define PWM1_FLTB4_DIS 0xFFF7 /* PWM4H/PWM4L pin pair is not controlled by Fault Input B.*/
#define PWM1_FLTB3_DIS 0xFFFB /* PWM3H/PWM3L pin pair is not controlled by Fault Input B.*/
#define PWM1_FLTB2_DIS 0xFFFD /* PWM2H/PWM2L pin pair is not controlled by Fault Input B.*/
#define PWM1_FLTB1_DIS 0xFFFE /* PWM1H/PWM1L pin pair is not controlled by Fault Input B.*/
#define EnableMCPWM1IntFLTB _FLTBIE = 1
#define DisableMCPWM1IntFLTB _FLTBIE = 0
#define SetPriorityMCPWM1IntFLTB(priority) _FLTBIP = priority
void SetMCPWM1DeadTimeAssignment(unsigned int config) __attribute__ ((section (".libperi")));
void SetMCPWM1FaultB(unsigned int config) __attribute__ ((section (".libperi")));
#endif
#else
/* MCPWM2 macros start here */
/* List of SFRs for PWM2 */
/* This list contains the SFRs with default (POR) values to be used for configuring PWM */
/* The user can modify this based on the requirement */
#define P2TCON_VALUE 0x0000
#define P2TMR_VALUE 0x0000
#define P2TPER_VALUE 0x0000
#define P2SECMP_VALUE 0x0000
#define PWM2CON1_VALUE 0x0077
#define PWM2CON2_VALUE 0x0000
#define P2DTCON1_VALUE 0x0000
#define P2DTCON2_VALUE 0x0000
#define P2FLTACON_VALUE 0x0000
#define P2OVDCON_VALUE 0x3F00
#define P2DC1_VALUE 0x0000
/* P2TCON Configuration Bit Definitions */
#define PWM2_EN 0xA0FF /*Module enable*/
#define PWM2_DIS 0x20FF /*Module disable*/
#define PWM2_IDLE_STOP 0xA0FF /*stop in Idle mode*/
#define PWM2_IDLE_CON 0x80FF /*operate in Idle mode*/
#define PWM2_OP_SCALE1 0xA00F /*Out put post scaler 1:1*/
#define PWM2_OP_SCALE2 0xA01F /*Out put post scaler 1:2*/
#define PWM2_OP_SCALE3 0xA02F /*Out put post scaler 1:3*/
#define PWM2_OP_SCALE4 0xA03F /*Out put post scaler 1:4*/
#define PWM2_OP_SCALE5 0xA04F /*Out put post scaler 1:5*/
#define PWM2_OP_SCALE6 0xA05F /*Out put post scaler 1:6*/
#define PWM2_OP_SCALE7 0xA06F /*Out put post scaler 1:7*/
#define PWM2_OP_SCALE8 0xA07F /*Out put post scaler 1:8*/
#define PWM2_OP_SCALE9 0xA08F /*Out put post scaler 1:9*/
#define PWM2_OP_SCALE10 0xA09F /*Out put post scaler 1:10*/
#define PWM2_OP_SCALE11 0xA0AF /*Out put post scaler 1:11*/
#define PWM2_OP_SCALE12 0xA0BF /*Out put post scaler 1:12*/
#define PWM2_OP_SCALE13 0xA0CF /*Out put post scaler 1:13*/
#define PWM2_OP_SCALE14 0xA0DF /*Out put post scaler 1:14*/
#define PWM2_OP_SCALE15 0xA0EF /*Out put post scaler 1:15*/
#define PWM2_OP_SCALE16 0xA0FF /*Out put post scaler 1:16*/
#define PWM2_IPCLK_SCALE1 0xA0F3 /*Input pre scaler 1:1*/
#define PWM2_IPCLK_SCALE4 0xA0F7 /*Input pre scaler 1:4*/
#define PWM2_IPCLK_SCALE16 0xA0FB /*Input pre scaler 1:16*/
#define PWM2_IPCLK_SCALE64 0xA0FF /*Input pre scaler 1:64*/
#define PWM2_MOD_FREE 0xA0FC /*Mode of operation Free Running*/
#define PWM2_MOD_SING 0xA0FD /*Mode of operation Single shot*/
#define PWM2_MOD_UPDN 0xA0FE /*Mode of operation Up down */
#define PWM2_MOD_DBL 0xA0FF /*Mode of operation Updown with double update*/
/* PWM2CON1 Configuration Bit Definitions */
#define PWM2_MOD1_COMP 0x0EFF /*1st channel in complimentary mode*/
#define PWM2_MOD1_IND 0x0FFF /*1st channel in independant mode*/
#define PWM2_PEN1H 0x0FFF /*H of channel 1 works as PWM*/
#define PWM2_PDIS1H 0x0FEF /*H of channel 1 works as IO*/
#define PWM2_PEN1L 0x0FFF /*L of channel 1 works as PWM*/
#define PWM2_PDIS1L 0x0FFE /*L of channel 1 works as IO*/
/* PWM2CON2 Configuration Bit Definitions */
#define PWM2_SEVOPS1 0x0003 /*Special event post scaler 1:1*/
#define PWM2_SEVOPS2 0x0103 /*Special event post scaler 1:2*/
#define PWM2_SEVOPS3 0x0203 /*Special event post scaler 1:3*/
#define PWM2_SEVOPS4 0x0303 /*Special event post scaler 1:4*/
#define PWM2_SEVOPS5 0x0403 /*Special event post scaler 1:5*/
#define PWM2_SEVOPS6 0x0503 /*Special event post scaler 1:6*/
#define PWM2_SEVOPS7 0x0603 /*Special event post scaler 1:7*/
#define PWM2_SEVOPS8 0x0703 /*Special event post scaler 1:8*/
#define PWM2_SEVOPS9 0x0803 /*Special event post scaler 1:9*/
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