smpspwm.h

Mplab C30编译器

/*----------------------------------------------------------------------------------------------------*/
/* PWMCON4 Configuration Bit Definitions : */
/*----------------------------------------------------------------------------------------------------*/

#define PWM4_FLT_INT_STAT				0x0000 /* Fault Interrupt Status software cleared */

#define PWM4_CL_INT_STAT				0x0000  /* Current Limit Interrupt Status software cleared */

#define PWM4_TRG_INT_STAT				0x0000  /* Trigger  Interrupt Status software cleared */

#define PWM4_FLT_INT_EN					0x1000  /* PWM4 Fault Interrupt Enable  */
#define PWM4_FLT_INT_DIS				0x0000  /* PWM4 Fault Interrupt Disable */

#define PWM4_CL_INT_EN					0x0800  /* PWM4 Current Limit Interrupt Enable   */
#define PWM4_CL_INT_DIS					0x0000  /* PWM4 Current Limit Interrupt Disable  */

#define PWM4_TRG_INT_EN					0x0400  /* PWM4 Trigger Interrupt Enable   */
#define PWM4_TRG_INT_DIS				0x0000  /* PWM4 Trigger Interrupt Disable  */

#define PWM4_TB_MODE_PH4				0x0200  /* Phase4 reg provides Time base period for PWM Gen       */
#define PWM4_TB_MODE_PTB				0x0000  /* Primary time base provides timing for PWM Gen   */

#define PWM4_D_CYLE_MDC					0x0100  /* Master Duty Cycle reg provides duty cycle info for PWM Gen  */
#define PWM4_D_CYLE_DC4					0x0000  /* Duty Cycle4 reg provides duty cycle info for PWM Gen        */

#define PWM4_DT_POS						0x0000  /* Positive dead time applied to all o/p modes  */
#define PWM4_DT_NEG						0x0040  /* Negative dead time applied to all o/p modes  */
#define PWM4_DT_DIS						0x0080  /* Dead time function disabled                  */

#define PWM4_CL_RESET_TB_EN				0x0002 /* Current Limit source resets time base for this PWM gen in independent time base mode  */
#define PWM4_EXT_RESET_DIS				0x0000 /* External pins do not affect PWM time base   */

#define PWM4_PDC_UPDATE_IMM				0x0001  /* Updates to active PDC regs are immediate  */
#define PWM4_PDC_UPDATE_SYNC			0x0000  /* Updates to active PDC regs are sync with PWM time base */

/*----------------------------------------------------------------------------------------------------*/
/* IOCON1 Configuration Bit Definitions : */
/*----------------------------------------------------------------------------------------------------*/

#define PWM1_H_PIN_EN					0x8000  /* PWM module controls PWM1H */
#define PWM1_H_PIN_GPIO					0x0000  /* GPIO module controls PWM1H   */

#define PWM1_L_PIN_EN					0x4000  /* PWM module controls PWM1L */
#define PWM1_L_PIN_GPIO					0x0000  /* GPIO module controls PWM1L   */

#define PWM1_H_PIN_ACTLOW				0x2000  /* PWM1H pin is low active */
#define PWM1_H_PIN_ACTHIGH				0x0000  /* PWM1H pin is high active */

#define PWM1_L_PIN_ACTLOW				0x1000  /* PWM1L pin is low active */
#define PWM1_L_PIN_ACTHIGH				0x0000  /* PWM1L pin is high active */

#define PWM1_IO_PIN_PAIR_COMP			0x0000  /* PWM1 I/O Pair in complementary output mode  */
#define PWM1_IO_PIN_PAIR_IND			0x0400  /* PWM1 I/O Pair in Independent output mode  */
#define PWM1_IO_PIN_PAIR_PUSHPULL		0x0800  /* PWM1 I/O Pair in Push-Pull output mode  */

#define PWM1_ORENH_OVRDAT				0x0200  /* OVRDAT<1> provides data for output on PWM1H pin  */
#define PWM1_ORENH_PWMGEN				0x0000  /* PWM1 generator provides data for PWM1H pin  */

#define PWM1_ORENL_OVRDAT				0x0100  /* OVRDAT<0> provides data for output on PWM1L pin  */
#define PWM1_ORENL_PWMGEN				0x0000  /* PWM1 generator provides data for PWM1L pin  */

#define PWM1_ORENH1_OVRDAT_LL			0x0000  /* If OVERNH=1 then OVRDAT<1>  provides data for PWM1H */
#define PWM1_ORENH1_OVRDAT_LH			0x0040  /* If OVERNH=1 then OVRDAT<1>  provides data for PWM1H */
#define PWM1_ORENL1_OVRDAT_HL			0x0080  /* If OVERNL=1 then OVRDAT<0>  provides data for PWM1L */
#define PWM1_ORENL1_OVRDAT_HH			0x00C0  /* If OVERNL=1 then OVRDAT<0>  provides data for PWM1L */

#define PWM1_FLT_EN_FLTDAT_LL			0x0000  /* If Fault active  then FLTDAT<1>  provides data for PWM1H */
#define PWM1_FLT_EN_FLTDAT_LH			0x0010  /* If Fault active  then FLTDAT<1>  provides data for PWM1H */
#define PWM1_FLT_EN_FLTDAT_HL			0x0020  /* If Fault active  then FLTDAT<0>  provides data for PWM1L */
#define PWM1_FLT_EN_FLTDAT_HH			0x0030  /* If Fault active  then FLTDAT<0>  provides data for PWM1L */

#define PWM1_CL_EN_CLDAT_LL				0x0000  /* If Current Limit active  then CLDAT<1>  provides data for PWM1H */
#define PWM1_CL_EN_CLDAT_LH				0x0004  /* If Current Limit active  then CLDAT<1>  provides data for PWM1H */
#define PWM1_CL_EN_CLDAT_HL				0x0008  /* If Current Limit active  then CLDAT<0>  provides data for PWM1L */
#define PWM1_CL_EN_CLDAT_HH				0x000C  /* If Current Limit active  then CLDAT<0>  provides data for PWM1L */

#define PWM1_OR_OVRDAT_SYNC_PWM			0x0001  /* Output overrides via the OVRDAT<1:0> bits are sync to PWM time base */
#define PWM1_OR_OVRDAT_NXT_CLK			0x0000  /* Output overrides via the OVRDAT<1:0> bits occur on next clk boundary */


/*----------------------------------------------------------------------------------------------------*/
/* IOCON2 Configuration Bit Definitions : */
/*----------------------------------------------------------------------------------------------------*/

#define PWM2_H_PIN_EN					0x8000  /* PWM module controls PWM2H */
#define PWM2_H_PIN_GPIO					0x0000  /* GPIO module controls PWM2H  */

#define PWM2_L_PIN_EN					0x4000  /* PWM module controls PWM2L */
#define PWM2_L_PIN_GPIO					0x0000  /* GPIO module controls PWM2L  */

#define PWM2_H_PIN_ACTLOW				0x2000  /* PWM2H pin is low active */
#define PWM2_H_PIN_ACTHIGH				0x0000  /* PWM2H pin is high active */

#define PWM2_L_PIN_ACTLOW				0x1000  /* PWM2L pin is low active */
#define PWM2_L_PIN_ACTHIGH				0x0000  /* PWM2L pin is high active */

#define PWM2_IO_PIN_PAIR_COMP			0x0000  /* PWM2 I/O Pair in complementary output mode  */
#define PWM2_IO_PIN_PAIR_IND			0x0400  /* PWM2 I/O Pair in Independent output mode  */
#define PWM2_IO_PIN_PAIR_PUSHPULL		0x0800  /* PWM2 I/O Pair in Push-Pull output mode  */

#define PWM2_ORENH_OVRDAT				0x0200  /* OVRDAT<1> provides data for output on PWM2H pin  */
#define PWM2_ORENH_PWMGEN				0x0000  /* PWM2 generator provides data for PWM2H pin  */

#define PWM2_ORENL_OVRDAT				0x0100  /* OVRDAT<0> provides data for output on PWM2L pin  */
#define PWM2_ORENL_PWMGEN				0x0000  /* PWM2 generator provides data for PWM2L pin  */

#define PWM2_ORENH1_OVRDAT_LL			0x0000  /* If OVERNH=1 then OVRDAT<1>  provides data for PWM2H */
#define PWM2_ORENH1_OVRDAT_LH			0x0040  /* If OVERNH=1 then OVRDAT<1>  provides data for PWM2H */
#define PWM2_ORENL1_OVRDAT_HL			0x0080  /* If OVERNL=1 then OVRDAT<0>  provides data for PWM2L */
#define PWM2_ORENL1_OVRDAT_HH			0x00C0  /* If OVERNL=1 then OVRDAT<0>  provides data for PWM2L */

#define PWM2_FLT_EN_FLTDAT_LL			0x0000  /* If Fault active  then FLTDAT<1>  provides data for PWM2H */
#define PWM2_FLT_EN_FLTDAT_LH			0x0010  /* If Fault active  then FLTDAT<1>  provides data for PWM2H */
#define PWM2_FLT_EN_FLTDAT_HL			0x0020  /* If Fault active  then FLTDAT<0>  provides data for PWM2L */
#define PWM2_FLT_EN_FLTDAT_HH			0x0030  /* If Fault active  then FLTDAT<0>  provides data for PWM2L */

#define PWM2_CL_EN_CLDAT_LL				0x0000  /* If Current Limit active  then CLDAT<1>  provides data for PWM2H */
#define PWM2_CL_EN_CLDAT_LH				0x0004  /* If Current Limit active  then CLDAT<1>  provides data for PWM2H */
#define PWM2_CL_EN_CLDAT_HL				0x0008  /* If Current Limit active  then CLDAT<0>  provides data for PWM2L */
#define PWM2_CL_EN_CLDAT_HH				0x000C  /* If Current Limit active  then CLDAT<0>  provides data for PWM2L */

#define PWM2_OR_OVRDAT_SYNC_PWM			0x0001  /* Output overrides via the OVRDAT<1:0> bits are sync to PWM time base */
#define PWM2_OR_OVRDAT_NXT_CLK			0x0000  /* Output overrides via the OVRDAT<1:0> bits occur on next clk boundary */

/*----------------------------------------------------------------------------------------------------*/
/* IOCON3 Configuration Bit Definitions : */
/*----------------------------------------------------------------------------------------------------*/

#define PWM3_H_PIN_EN					0x8000  /* PWM module controls PWM3H */
#define PWM3_H_PIN_GPIO					0x0000  /* GPIO module controls PWM3H   */

#define PWM3_L_PIN_EN					0x4000  /* PWM module controls PWM3L */
#define PWM3_L_PIN_GPIO					0x0000  /* GPIO module controls PWM3L   */

#define PWM3_H_PIN_ACTLOW				0x2000  /* PWM3H pin is low active */
#define PWM3_H_PIN_ACTHIGH				0x0000  /* PWM3H pin is high active */

#define PWM3_L_PIN_ACTLOW				0x1000  /* PWM3L pin is low active */
#define PWM3_L_PIN_ACTHIGH				0x0000  /* PWM3L pin is high active */

#define PWM3_IO_PIN_PAIR_COMP			0x0000  /* PWM3 I/O Pair in complementary output mode  */
#define PWM3_IO_PIN_PAIR_IND			0x0400  /* PWM3 I/O Pair in Independent output mode  */
#define PWM3_IO_PIN_PAIR_PUSHPULL		0x0800  /* PWM3 I/O Pair in Push-Pull output mode  */

#define PWM3_ORENH_OVRDAT				0x0200  /* OVRDAT<1> provides data for output on PWM3H pin  */
#define PWM3_ORENH_PWMGEN				0x0000  /* PWM3 generator provides data for PWM3H pin  */

#define PWM3_ORENL_OVRDAT				0x0100  /* OVRDAT<0> provides data for output on PWM3L pin  */
#define PWM3_ORENL_PWMGEN				0x0000  /* PWM generator provides data for PWM3L pin  */

#define PWM3_ORENH1_OVRDAT_LL			0x0000  /* If OVERNH=1 then OVRDAT<1>  provides data for PWM3H */
#define PWM3_ORENH1_OVRDAT_LH			0x0040  /* If OVERNH=1 then OVRDAT<1>  provides data for PWM3H */
#define PWM3_ORENL1_OVRDAT_HL			0x0080  /* If OVERNL=1 then OVRDAT<0>  provides data for PWM3L */
#define PWM3_ORENL1_OVRDAT_HH			0x00C0  /* If OVERNL=1 then OVRDAT<0>  provides data for PWM3L */

#define PWM3_FLT_EN_FLTDAT_LL			0x0000  /* If Fault active  then FLTDAT<1>  provides data for PWM3H */
#define PWM3_FLT_EN_FLTDAT_LH			0x0010  /* If Fault active  then FLTDAT<1>  provides data for PWM3H */
#define PWM3_FLT_EN_FLTDAT_HL			0x0020  /* If Fault active  then FLTDAT<0>  provides data for PWM3L */
#define PWM3_FLT_EN_FLTDAT_HH			0x0030  /* If Fault active  then FLTDAT<0>  provides data for PWM3L */

#define PWM3_CL_EN_CLDAT_LL				0x0000  /* If Current Limit active  then CLDAT<1>  provides data for PWM3H */
#define PWM3_CL_EN_CLDAT_LH				0x0004  /* If Current Limit active  then CLDAT<1>  provides data for PWM3H */
#define PWM3_CL_EN_CLDAT_HL				0x0008  /* If Current Limit active  then CLDAT<0>  provides data for PWM3L */
#define PWM3_CL_EN_CLDAT_HH				0x000C  /* If Current Limit active  then CLDAT<0>  provides data for PWM3L */

#define PWM3_OR_OVRDAT_SYNC_PWM			0x0001  /* Output overrides via the OVRDAT<1:0> bits are sync to PWM time base */
#define PWM3_OR_OVRDAT_NXT_CLK			0x0000  /* Output overrides via the OVRDAT<1:0> bits occur on next clk boundary */


/*----------------------------------------------------------------------------------------------------*/
/* IOCON4 Configuration Bit Definitions : */
/*----------------------------------------------------------------------------------------------------*/

#define PWM4_H_PIN_EN					0x8000  /* PWM module controls PWM4H */
#define PWM4_H_PIN_GPIO					0x0000  /* GPIO module controls PWM4H   */

#define PWM4_L_PIN_EN					0x4000  /* PWM module controls PWM4L */
#define PWM4_L_PIN_GPIO					0x0000  /* GPIO module controls PWM4L   */

#define PWM4_H_PIN_ACTLOW				0x2000  /* PWM4H pin is low active */
#define PWM4_H_PIN_ACTHIGH				0x0000  /* PWM4H pin is high active */

#define PWM4_L_PIN_ACTLOW				0x1000  /* PWM4L pin is low active */
#define PWM4_L_PIN_ACTHIGH				0x0000  /* PWM4L pin is high active */

#define PWM4_IO_PIN_PAIR_COMP			0x0000  /* PWM4 I/O Pair in complementary output mode  */
#define PWM4_IO_PIN_PAIR_IND			0x0400  /* PWM4 I/O Pair in Independent output mode  */
#define PWM4_IO_PIN_PAIR_PUSHPULL		0x0800  /* PWM4 I/O Pair in Push-Pull output mode  */

#define PWM4_ORENH_OVRDAT				0x0200  /* OVRDAT<1> provides data for output on PWM4H pin  */
#define PWM4_ORENH_PWMGEN				0x0000  /* PWM4 generator provides data for PWM4H pin  */

#define PWM4_ORENL_OVRDAT				0x0100  /* OVRDAT<0> provides data for output on PWM4L pin  */
#define PWM4_ORENL_PWMGEN				0x0000  /* PWM generator provides data for PWM4L pin  */

#define PWM4_ORENH1_OVRDAT_LL			0x0000  /* If OVERNH=1 then OVRDAT<1>  provides data for PWM4H */
#define PWM4_ORENH1_OVRDAT_LH			0x0040  /* If OVERNH=1 then OVRDAT<1>  provides data for PWM4H */
#define PWM4_ORENL1_OVRDAT_HL			0x0080  /* If OVERNL=1 then OVRDAT<0>  provides data for PWM4L */
#define PWM4_ORENL1_OVRDAT_HH			0x00C0  /* If OVERNL=1 then OVRDAT<0>  provides data for PWM4L */

#define PWM4_FLT_EN_FLTDAT_LL			0x0000  /* If Fault active  then FLTDAT<1>  provides data for PWM4H */
#define PWM4_FLT_EN_FLTDAT_LH			0x0010  /* If Fault active  then FLTDAT<1>  provides data for PWM4H */
#define PWM4_FLT_EN_FLTDAT_HL			0x0020  /* If Fault active  then FLTDAT<0>  provides data for PWM4L */
#define PWM4_FLT_EN_FLTDAT_HH			0x0030  /* If Fault active  then FLTDAT<0>  provides data for PWM4L */

#define PWM4_CL_EN_CLDAT_LL				0x0000  /* If Current Limit active  then CLDAT<1>  provides data for PWM4H */
#define PWM4_CL_EN_CLDAT_LH				0x0004  /* If Current Limit active  then CLDAT<1>  provides data for PWM4H */
#define PWM4_CL_EN_CLDAT_HL				0x0008  /* If Current Limit active  then CLDAT<0>  provides data for PWM4L */
#define PWM4_CL_EN_CLDAT_HH				0x000C  /* If Current Limit active  then CLDAT<0>  provides data for PWM4L */

#define PWM4_OR_OVRDAT_SYNC_PWM			0x0001  /* Output overrides via the OVRDAT<1:0> bits are sync to PWM time base */
#define PWM4_OR_OVRDAT_NXT_CLK			0x0000  /* Output overrides via the OVRDAT<1:0> bits occur on next clk boundary */

/*----------------------------------------------------------------------------------------------------*/
/* TRGCON1 Configuration Bit Definitions : */
/*----------------------------------------------------------------------------------------------------*/