device_fcy.h

Mplab C30编译器

 

/* Use one #define per the device speed selection. Base XTAL on the 
   dsPICDEM 1.1 board is 7.3728 MHz. Depending on PLL selection final 
   device speed will be:
   	7.3728 MIPs (for XTx4PLL) or
   	14.745600 MIPs (for XTx8PLL) or
   	29.491200 MIPs (for XTx16PLL) or
   	
   This file is included in the following source code files and is used to
   adjust timing specific parameters based on the instruction cycle rate:
   Files:
   device_config.c
*/

/* Set ONLY ONE of the following defines to TRUE */

#define XTx4PLL    0   //	7.3728 MIPs (for XTx4PLL)
#define XTx8PLL    1   //   14.745600 MIPs (for XTx8PLL)
#define XTx16PLL   0   //   29.491200 MIPs (for XTx16PLL)