📄 queue.s43
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// 623 xYieldRequired = pdTRUE;
MOV.W #0x1, R11
// 624 }
// 625 }
// 626 }
// 627 }
// 628 taskEXIT_CRITICAL();
??prvUnlockQueue_2:
CMP.W #0x0, &usCriticalNesting
JEQ ??prvUnlockQueue_3
ADD.W #0xffff, &usCriticalNesting
CMP.W #0x0, &usCriticalNesting
JNE ??prvUnlockQueue_3
EINT
// 629
// 630 return xYieldRequired;
??prvUnlockQueue_3:
MOV.W R11, R12
POP.W R11
CFI R11 SameValue
CFI CFA SP+4
POP.W R10
CFI R10 SameValue
CFI CFA SP+2
RET
CFI EndBlock cfiBlock7
// 631 }
// 632 /*-----------------------------------------------------------*/
// 633
RSEG CODE:CODE:REORDER:NOROOT(1)
// 634 static signed portBASE_TYPE prvIsQueueEmpty( const xQueueHandle pxQueue )
prvIsQueueEmpty:
CFI Block cfiBlock8 Using cfiCommon0
CFI Function prvIsQueueEmpty
// 635 {
MOV.W R12, R15
// 636 signed portBASE_TYPE xReturn;
// 637
// 638 taskENTER_CRITICAL();
DINT
NOP
ADD.W #0x1, &usCriticalNesting
// 639 xReturn = ( pxQueue->uxMessagesWaiting == ( unsigned portBASE_TYPE ) 0 );
CMP.W #0x0, 0x1c(R15)
JNE ??prvIsQueueEmpty_0
MOV.B #0x1, R12
JMP ??prvIsQueueEmpty_1
??prvIsQueueEmpty_0:
MOV.B #0x0, R12
??prvIsQueueEmpty_1:
AND.W #0xff, R12
// 640 taskEXIT_CRITICAL();
CMP.W #0x0, &usCriticalNesting
JEQ ??prvIsQueueEmpty_2
ADD.W #0xffff, &usCriticalNesting
CMP.W #0x0, &usCriticalNesting
JNE ??prvIsQueueEmpty_2
EINT
// 641
// 642 return xReturn;
??prvIsQueueEmpty_2:
RET
CFI EndBlock cfiBlock8
// 643 }
// 644 /*-----------------------------------------------------------*/
// 645
RSEG CODE:CODE:REORDER:NOROOT(1)
// 646 static signed portBASE_TYPE prvIsQueueFull( const xQueueHandle pxQueue )
prvIsQueueFull:
CFI Block cfiBlock9 Using cfiCommon0
CFI Function prvIsQueueFull
// 647 {
MOV.W R12, R15
// 648 signed portBASE_TYPE xReturn;
// 649
// 650 taskENTER_CRITICAL();
DINT
NOP
ADD.W #0x1, &usCriticalNesting
// 651 xReturn = ( pxQueue->uxMessagesWaiting == pxQueue->uxLength );
CMP.W 0x1e(R15), 0x1c(R15)
JNE ??prvIsQueueFull_0
MOV.B #0x1, R12
JMP ??prvIsQueueFull_1
??prvIsQueueFull_0:
MOV.B #0x0, R12
??prvIsQueueFull_1:
AND.W #0xff, R12
// 652 taskEXIT_CRITICAL();
CMP.W #0x0, &usCriticalNesting
JEQ ??prvIsQueueFull_2
ADD.W #0xffff, &usCriticalNesting
CMP.W #0x0, &usCriticalNesting
JNE ??prvIsQueueFull_2
EINT
// 653
// 654 return xReturn;
??prvIsQueueFull_2:
RET
CFI EndBlock cfiBlock9
// 655 }
RSEG CODE:CODE:REORDER:NOROOT(1)
?setjmp_save_r4:
REQUIRE ?setjmp_r4
REQUIRE ?longjmp_r4
RSEG CODE:CODE:REORDER:NOROOT(1)
?setjmp_save_r5:
REQUIRE ?setjmp_r5
REQUIRE ?longjmp_r5
END
// 656 /*-----------------------------------------------------------*/
// 657
// 658 #if configUSE_CO_ROUTINES == 1
// 659 signed portBASE_TYPE xQueueCRSend( xQueueHandle pxQueue, const void *pvItemToQueue, portTickType xTicksToWait )
// 660 {
// 661 signed portBASE_TYPE xReturn;
// 662
// 663 /* If the queue is already full we may have to block. A critical section
// 664 is required to prevent an interrupt removing something from the queue
// 665 between the check to see if the queue is full and blocking on the queue. */
// 666 portDISABLE_INTERRUPTS();
// 667 {
// 668 if( prvIsQueueFull( pxQueue ) )
// 669 {
// 670 /* The queue is full - do we want to block or just leave without
// 671 posting? */
// 672 if( xTicksToWait > ( portTickType ) 0 )
// 673 {
// 674 /* As this is called from a coroutine we cannot block directly, but
// 675 return indicating that we need to block. */
// 676 vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToSend ) );
// 677 portENABLE_INTERRUPTS();
// 678 return errQUEUE_BLOCKED;
// 679 }
// 680 else
// 681 {
// 682 portENABLE_INTERRUPTS();
// 683 return errQUEUE_FULL;
// 684 }
// 685 }
// 686 }
// 687 portENABLE_INTERRUPTS();
// 688
// 689 portNOP();
// 690
// 691 portDISABLE_INTERRUPTS();
// 692 {
// 693 if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
// 694 {
// 695 /* There is room in the queue, copy the data into the queue. */
// 696 prvCopyQueueData( pxQueue, pvItemToQueue );
// 697 xReturn = pdPASS;
// 698
// 699 /* Were any co-routines waiting for data to become available? */
// 700 if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) )
// 701 {
// 702 /* In this instance the co-routine could be placed directly
// 703 into the ready list as we are within a critical section.
// 704 Instead the same pending ready list mechansim is used as if
// 705 the event were caused from within an interrupt. */
// 706 if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
// 707 {
// 708 /* The co-routine waiting has a higher priority so record
// 709 that a yield might be appropriate. */
// 710 xReturn = errQUEUE_YIELD;
// 711 }
// 712 }
// 713 }
// 714 else
// 715 {
// 716 xReturn = errQUEUE_FULL;
// 717 }
// 718 }
// 719 portENABLE_INTERRUPTS();
// 720
// 721 return xReturn;
// 722 }
// 723 #endif
// 724 /*-----------------------------------------------------------*/
// 725
// 726 #if configUSE_CO_ROUTINES == 1
// 727 signed portBASE_TYPE xQueueCRReceive( xQueueHandle pxQueue, void *pvBuffer, portTickType xTicksToWait )
// 728 {
// 729 signed portBASE_TYPE xReturn;
// 730
// 731 /* If the queue is already empty we may have to block. A critical section
// 732 is required to prevent an interrupt adding something to the queue
// 733 between the check to see if the queue is empty and blocking on the queue. */
// 734 portDISABLE_INTERRUPTS();
// 735 {
// 736 if( prvIsQueueEmpty( pxQueue ) )
// 737 {
// 738 /* There are no messages in the queue, do we want to block or just
// 739 leave with nothing? */
// 740 if( xTicksToWait > ( portTickType ) 0 )
// 741 {
// 742 /* As this is a co-routine we cannot block directly, but return
// 743 indicating that we need to block. */
// 744 vCoRoutineAddToDelayedList( xTicksToWait, &( pxQueue->xTasksWaitingToReceive ) );
// 745 portENABLE_INTERRUPTS();
// 746 return errQUEUE_BLOCKED;
// 747 }
// 748 else
// 749 {
// 750 portENABLE_INTERRUPTS();
// 751 return errQUEUE_FULL;
// 752 }
// 753 }
// 754 }
// 755 portENABLE_INTERRUPTS();
// 756
// 757 portNOP();
// 758
// 759 portDISABLE_INTERRUPTS();
// 760 {
// 761 if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )
// 762 {
// 763 /* Data is available from the queue. */
// 764 pxQueue->pcReadFrom += pxQueue->uxItemSize;
// 765 if( pxQueue->pcReadFrom >= pxQueue->pcTail )
// 766 {
// 767 pxQueue->pcReadFrom = pxQueue->pcHead;
// 768 }
// 769 --( pxQueue->uxMessagesWaiting );
// 770 memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
// 771
// 772 xReturn = pdPASS;
// 773
// 774 /* Were any co-routines waiting for space to become available? */
// 775 if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) )
// 776 {
// 777 /* In this instance the co-routine could be placed directly
// 778 into the ready list as we are within a critical section.
// 779 Instead the same pending ready list mechansim is used as if
// 780 the event were caused from within an interrupt. */
// 781 if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
// 782 {
// 783 xReturn = errQUEUE_YIELD;
// 784 }
// 785 }
// 786 }
// 787 else
// 788 {
// 789 xReturn = pdFAIL;
// 790 }
// 791 }
// 792 portENABLE_INTERRUPTS();
// 793
// 794 return xReturn;
// 795 }
// 796 #endif
// 797 /*-----------------------------------------------------------*/
// 798
// 799
// 800
// 801 #if configUSE_CO_ROUTINES == 1
// 802 signed portBASE_TYPE xQueueCRSendFromISR( xQueueHandle pxQueue, const void *pvItemToQueue, signed portBASE_TYPE xCoRoutinePreviouslyWoken )
// 803 {
// 804 /* Cannot block within an ISR so if there is no space on the queue then
// 805 exit without doing anything. */
// 806 if( pxQueue->uxMessagesWaiting < pxQueue->uxLength )
// 807 {
// 808 prvCopyQueueData( pxQueue, pvItemToQueue );
// 809
// 810 /* We only want to wake one co-routine per ISR, so check that a
// 811 co-routine has not already been woken. */
// 812 if( !xCoRoutinePreviouslyWoken )
// 813 {
// 814 if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToReceive ) ) )
// 815 {
// 816 if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToReceive ) ) != pdFALSE )
// 817 {
// 818 return pdTRUE;
// 819 }
// 820 }
// 821 }
// 822 }
// 823
// 824 return xCoRoutinePreviouslyWoken;
// 825 }
// 826 #endif
// 827 /*-----------------------------------------------------------*/
// 828
// 829 #if configUSE_CO_ROUTINES == 1
// 830 signed portBASE_TYPE xQueueCRReceiveFromISR( xQueueHandle pxQueue, void *pvBuffer, signed portBASE_TYPE *pxCoRoutineWoken )
// 831 {
// 832 signed portBASE_TYPE xReturn;
// 833
// 834 /* We cannot block from an ISR, so check there is data available. If
// 835 not then just leave without doing anything. */
// 836 if( pxQueue->uxMessagesWaiting > ( unsigned portBASE_TYPE ) 0 )
// 837 {
// 838 /* Copy the data from the queue. */
// 839 pxQueue->pcReadFrom += pxQueue->uxItemSize;
// 840 if( pxQueue->pcReadFrom >= pxQueue->pcTail )
// 841 {
// 842 pxQueue->pcReadFrom = pxQueue->pcHead;
// 843 }
// 844 --( pxQueue->uxMessagesWaiting );
// 845 memcpy( ( void * ) pvBuffer, ( void * ) pxQueue->pcReadFrom, ( unsigned ) pxQueue->uxItemSize );
// 846
// 847 if( !( *pxCoRoutineWoken ) )
// 848 {
// 849 if( !listLIST_IS_EMPTY( &( pxQueue->xTasksWaitingToSend ) ) )
// 850 {
// 851 if( xCoRoutineRemoveFromEventList( &( pxQueue->xTasksWaitingToSend ) ) != pdFALSE )
// 852 {
// 853 *pxCoRoutineWoken = pdTRUE;
// 854 }
// 855 }
// 856 }
// 857
// 858 xReturn = pdPASS;
// 859 }
// 860 else
// 861 {
// 862 xReturn = pdFAIL;
// 863 }
// 864
// 865 return xReturn;
// 866 }
// 867 #endif
// 868 /*-----------------------------------------------------------*/
// 869
//
// 1 252 bytes in segment CODE
//
// 1 252 bytes of CODE memory
//
//Errors: none
//Warnings: none
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