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📄 serial.s43

📁 MSP430 IAR project with FreeRTOS port.
💻 S43
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        DS8 2
//   82 
//   83 /*-----------------------------------------------------------*/
//   84 

        RSEG CODE:CODE:REORDER:NOROOT(1)
//   85 xComPortHandle xSerialPortInitMinimal( unsigned portLONG ulWantedBaud, unsigned portBASE_TYPE uxQueueLength )
xSerialPortInitMinimal:
        CFI Block cfiBlock0 Using cfiCommon0
        CFI Function xSerialPortInitMinimal
//   86 {
        FUNCALL xSerialPortInitMinimal, xQueueCreate
        LOCFRAME CSTACK, 20, STACK
        FUNCALL xSerialPortInitMinimal, xQueueCreate
        LOCFRAME CSTACK, 20, STACK
        PUSH.W  R10
        CFI R10 Frame(CFA, -4)
        CFI CFA SP+4
        PUSH.W  R11
        CFI R11 Frame(CFA, -6)
        CFI CFA SP+6
        PUSH.W  R8
        CFI R8 Frame(CFA, -8)
        CFI CFA SP+8
        PUSH.W  R9
        CFI R9 Frame(CFA, -10)
        CFI CFA SP+10
        PUSH.W  R6
        CFI R6 Frame(CFA, -12)
        CFI CFA SP+12
        PUSH.W  R7
        CFI R7 Frame(CFA, -14)
        CFI CFA SP+14
        PUSH.W  R4
        CFI R4 Frame(CFA, -16)
        CFI CFA SP+16
        SUB.W   #0x4, SP
        CFI CFA SP+20
        MOV.W   R12, R10
        MOV.W   R13, R11
        MOV.W   R14, R6
//   87 	unsigned portLONG ulBaudRateCount;
//   88 	
//   89     unsigned long err;
//   90     unsigned char modctl;
//   91     unsigned int i;
//   92 
//   93 	/* Initialise the hardware. */
//   94 
//   95 	/* Generate the baud rate constants for the wanted baud rate. */
//   96 //	ulBaudRateCount = configCPU_CLOCK_HZ / ulWantedBaud;
//   97 
//   98 	portENTER_CRITICAL();
        DINT
        NOP
        ADD.W   #0x1, &usCriticalNesting
//   99 	{
//  100 		/* Create the queues used by the com test task. */
//  101 		xRxedChars = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
        MOV.W   #0x1, R14
        MOV.W   R6, R12
        CALL    #xQueueCreate
        MOV.W   R12, &xRxedChars
//  102 		xCharsForTx = xQueueCreate( uxQueueLength, ( unsigned portBASE_TYPE ) sizeof( signed portCHAR ) );
        MOV.W   #0x1, R14
        MOV.W   R6, R12
        CALL    #xQueueCreate
        MOV.W   R12, &xCharsForTx
//  103 		/* Reset UART. */
//  104 		// UCTL1 |= SWRST;
//  105          	U1CTL_bit.SWRST = 1;
        BIS.B   #0x1, &0x78
//  106 
//  107 		/* Set pin function. */
//  108 //		P4SEL |= serTX_AND_RX;
//  109 //		*P3SEL |= P3SEL_6 + P3SEL_7;
//  110 		P3SEL_bit.P3SEL_6 = 1;		// peripheral mode selected
        BIS.B   #0x40, &0x1b
//  111 		P3SEL_bit.P3SEL_7 = 1;		// peripheral mode selected	
        BIS.B   #0x80, &0x1b
//  112 //		*P3DIR |= P3DIR_6;
//  113 //		*P3DIR &= ~P3DIR_7;
//  114 		P3DIR_bit.P3DIR_6 = 1;		// 1 = output
        BIS.B   #0x40, &0x1a
//  115 		P3DIR_bit.P3DIR_7 = 0;		// 0 = input
        BIC.B   #0x80, &0x1a
//  116 
//  117 		/* All other bits remain at zero for n, 8, 1 interrupt driven operation.
//  118 		LOOPBACK MODE!*/
//  119 //		U1CTL |= CHAR + LISTEN;
//  120 //		U1CTL |= CHAR;
//  121 //		U1TCTL |= SSEL1;
//  122 		U1CTL_bit.SYNC = 0;	// UART MODE
        BIC.B   #0x4, &0x78
//  123 		U1CTL_bit.CHAR = 1;	// 8 bits
        BIS.B   #0x10, &0x78
//  124 		U1CTL_bit.LISTEN = 1;
        BIS.B   #0x8, &0x78
//  125 		U1CTL_bit.SPB = 0;	// one stop bit
        BIC.B   #0x20, &0x78
//  126 		U1CTL_bit.PENA = 0;	// no parity 
        BIC.B   #0x80, &0x78
//  127 		U1TCTL_bit.SSEL1 = 1;
        BIS.B   #0x20, &0x79
//  128 
//  129 
//  130 		/* Setup baud rate low byte. */
//  131 		U1BR0 = ( unsigned portCHAR ) ( HOST_DIVISOR & ( unsigned portLONG ) 0xff );
        MOV.B   #0x6, &0x7c
//  132 //		U1BR0 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
//  133 
//  134 		/* Setup baud rate high byte. */
//  135 //		ulBaudRateCount >>= 8UL;
//  136 		U1BR1 = ( unsigned portCHAR ) ( HOST_DIVISOR >> ( unsigned portLONG ) 8 );
        MOV.B   #0x0, &0x7d
//  137 //		U1BR1 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
//  138 
//  139     err = ulWantedBaud >> 1;
        MOV.W   R10, R14
        MOV.W   R11, R15
        CLRC
        RRC.W   R15
        RRC.W   R14
        MOV.W   R14, R8
        MOV.W   R15, R9
//  140     modctl = 0;
        MOV.B   #0x0, R7
//  141     for (i = 0; i < 8; i++)
        MOV.W   #0x0, R4
??xSerialPortInitMinimal_0:
        CMP.W   #0x8, R4
        JC      ??xSerialPortInitMinimal_1
//  142     {
//  143 	modctl >>= 1;
        CLRC
        RRC.B   R7
//  144 	err += HOST_REMAINDER;
        ADD.W   #0xe5b0, R8
        ADDC.W  #0x0, R9
//  145 	if (err >= ulWantedBaud)
        CMP.W   R11, R9
        JNC     ??xSerialPortInitMinimal_2
        JNE     ??xSerialPortInitMinimal_3
        CMP.W   R10, R8
        JNC     ??xSerialPortInitMinimal_2
//  146 	{
//  147 	    modctl |= 0x80;
??xSerialPortInitMinimal_3:
        BIS.B   #0x80, R7
//  148 	    err -= ulWantedBaud;
        SUB.W   R10, R8
        SUBC.W  R11, R9
//  149 	}
//  150     }
??xSerialPortInitMinimal_2:
        ADD.W   #0x1, R4
        JMP     ??xSerialPortInitMinimal_0
//  151 		/* Set. */
//  152     //		UCTL1 &= ~SWRST;
//  153     
//  154                 U1MCTL = modctl;
??xSerialPortInitMinimal_1:
        MOV.B   R7, &0x7b
//  155                 U1CTL_bit.SWRST = 0;
        BIC.B   #0x1, &0x78
//  156 
//  157                 U1RCTL_bit.RXERR = 0;
        BIC.B   #0x1, &0x7a
//  158 		U1RCTL_bit.RXWAKE = 0;
        BIC.B   #0x2, &0x7a
//  159 		U1RCTL_bit.URXWIE = 0;
        BIC.B   #0x4, &0x7a
//  160 		U1RCTL_bit.URXEIE= 0;
        BIC.B   #0x8, &0x7a
//  161 		U1RCTL_bit.BRK = 0;
        BIC.B   #0x10, &0x7a
//  162 		U1RCTL_bit.OE = 0;
        BIC.B   #0x20, &0x7a
//  163 		U1RCTL_bit.PE = 0;
        BIC.B   #0x40, &0x7a
//  164 		U1RCTL_bit.FE = 0;
        BIC.B   #0x80, &0x7a
//  165 		    
//  166 		/* Nothing in the buffer yet. */
//  167 		sTHREEmpty = pdTRUE;
        MOV.W   #0x1, &sTHREEmpty
//  168 		
//  169 		/* Enable ports. */
//  170 		ME2 |= UTXE1 + URXE1;
        BIS.B   #0x30, &0x5
//  171  
//  172 		/* Enable interrupts. */
//  173 		IE2 |= URXIE1 + UTXIE1;
        BIS.B   #0x30, &0x1
//  174 	}
//  175 	portEXIT_CRITICAL();
        CMP.W   #0x0, &usCriticalNesting
        JEQ     ??xSerialPortInitMinimal_4
        ADD.W   #0xffff, &usCriticalNesting
        CMP.W   #0x0, &usCriticalNesting
        JNE     ??xSerialPortInitMinimal_4
        EINT
//  176 	
//  177 	/* Unlike other ports, this serial code does not allow for more than one
//  178 	com port.  We therefore don't return a pointer to a port structure and can
//  179 	instead just return NULL. */
//  180 	return NULL;
??xSerialPortInitMinimal_4:
        MOV.W   #0x0, R12
        ADD.W   #0x4, SP
        CFI CFA SP+16
        BR      #?Epilogue7
        CFI EndBlock cfiBlock0
//  181 }
//  182 /*-----------------------------------------------------------*/
//  183 

        RSEG CODE:CODE:REORDER:NOROOT(1)
//  184 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
xSerialGetChar:
        CFI Block cfiBlock1 Using cfiCommon0
        CFI Function xSerialGetChar
//  185 {
        FUNCALL xSerialGetChar, xQueueReceive
        LOCFRAME CSTACK, 10, STACK
        PUSH.W  R10
        CFI R10 Frame(CFA, -4)
        CFI CFA SP+4
        PUSH.W  R11
        CFI R11 Frame(CFA, -6)
        CFI CFA SP+6
        PUSH.W  R8
        CFI R8 Frame(CFA, -8)
        CFI CFA SP+8
        MOV.W   R12, R10
        MOV.W   R14, R11
        MOV.W   0x8(SP), R8
//  186 	/* Get the next character from the buffer.  Return false if no characters
//  187 	are available, or arrive before xBlockTime expires. */
//  188 	if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
        PUSH.W  R8
        CFI CFA SP+10
        MOV.W   R11, R14
        MOV.W   &xRxedChars, R12
        CALL    #xQueueReceive
        ADD.W   #0x2, SP
        CFI CFA SP+8
        CMP.W   #0x0, R12
        JEQ     ??xSerialGetChar_0
//  189 	{
//  190 		return pdTRUE;
        MOV.W   #0x1, R12
        JMP     ??xSerialGetChar_1
//  191 	}
//  192 	else
//  193 	{
//  194 		return pdFALSE;
??xSerialGetChar_0:
        MOV.W   #0x0, R12
??xSerialGetChar_1:
        BR      #?Epilogue3
        CFI EndBlock cfiBlock1
//  195 	}
//  196 }
//  197 /*-----------------------------------------------------------*/
//  198 

        RSEG CODE:CODE:REORDER:NOROOT(1)
//  199 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
xSerialPutChar:
        CFI Block cfiBlock2 Using cfiCommon0
        CFI Function xSerialPutChar
//  200 {
        FUNCALL xSerialPutChar, xQueueSend
        LOCFRAME CSTACK, 12, STACK
        FUNCALL xSerialPutChar, xQueueReceive
        LOCFRAME CSTACK, 12, STACK
        PUSH.W  R10
        CFI R10 Frame(CFA, -4)
        CFI CFA SP+4
        PUSH.W  R11
        CFI R11 Frame(CFA, -6)
        CFI CFA SP+6
        PUSH.W  R8
        CFI R8 Frame(CFA, -8)
        CFI CFA SP+8
        PUSH.B  R14
        CFI CFA SP+10
        MOV.W   R12, R10
        MOV.W   0xa(SP), R11
//  201 signed portBASE_TYPE xReturn;
//  202 
//  203 	/* Transmit a character. */
//  204 
//  205 	portENTER_CRITICAL();
        DINT
        NOP
        ADD.W   #0x1, &usCriticalNesting
//  206 	{
//  207 		if( sTHREEmpty == pdTRUE )
        CMP.W   #0x1, &sTHREEmpty
        JNE     ??xSerialPutChar_0
//  208 		{
//  209 			/* If sTHREEmpty is true then the UART Tx ISR has indicated that 
//  210 			there are no characters queued to be transmitted - so we can
//  211 			write the character directly to the shift Tx register. */
//  212 			sTHREEmpty = pdFALSE;
        MOV.W   #0x0, &sTHREEmpty
//  213 			U1TXBUF = cOutChar;
        MOV.B   0x0(SP), &0x7f

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