📄 serial.lst
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109 // *P3SEL |= P3SEL_6 + P3SEL_7;
110 P3SEL_bit.P3SEL_6 = 1; // peripheral mode selected
\ 00003A F2D040001B00 BIS.B #0x40, &0x1b
111 P3SEL_bit.P3SEL_7 = 1; // peripheral mode selected
\ 000040 F2D080001B00 BIS.B #0x80, &0x1b
112 // *P3DIR |= P3DIR_6;
113 // *P3DIR &= ~P3DIR_7;
114 P3DIR_bit.P3DIR_6 = 1; // 1 = output
\ 000046 F2D040001A00 BIS.B #0x40, &0x1a
115 P3DIR_bit.P3DIR_7 = 0; // 0 = input
\ 00004C F2C080001A00 BIC.B #0x80, &0x1a
116
117 /* All other bits remain at zero for n, 8, 1 interrupt driven operation.
118 LOOPBACK MODE!*/
119 // U1CTL |= CHAR + LISTEN;
120 // U1CTL |= CHAR;
121 // U1TCTL |= SSEL1;
122 U1CTL_bit.SYNC = 0; // UART MODE
\ 000052 E2C27800 BIC.B #0x4, &0x78
123 U1CTL_bit.CHAR = 1; // 8 bits
\ 000056 F2D010007800 BIS.B #0x10, &0x78
124 U1CTL_bit.LISTEN = 1;
\ 00005C F2D27800 BIS.B #0x8, &0x78
125 U1CTL_bit.SPB = 0; // one stop bit
\ 000060 F2C020007800 BIC.B #0x20, &0x78
126 U1CTL_bit.PENA = 0; // no parity
\ 000066 F2C080007800 BIC.B #0x80, &0x78
127 U1TCTL_bit.SSEL1 = 1;
\ 00006C F2D020007900 BIS.B #0x20, &0x79
128
129
130 /* Setup baud rate low byte. */
131 U1BR0 = ( unsigned portCHAR ) ( HOST_DIVISOR & ( unsigned portLONG ) 0xff );
\ 000072 F24006007C00 MOV.B #0x6, &0x7c
132 // U1BR0 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
133
134 /* Setup baud rate high byte. */
135 // ulBaudRateCount >>= 8UL;
136 U1BR1 = ( unsigned portCHAR ) ( HOST_DIVISOR >> ( unsigned portLONG ) 8 );
\ 000078 C2437D00 MOV.B #0x0, &0x7d
137 // U1BR1 = ( unsigned portCHAR ) ( ulBaudRateCount & ( unsigned portLONG ) 0xff );
138
139 err = ulWantedBaud >> 1;
\ 00007C 0E4A MOV.W R10, R14
\ 00007E 0F4B MOV.W R11, R15
\ 000080 12C3 CLRC
\ 000082 0F10 RRC.W R15
\ 000084 0E10 RRC.W R14
\ 000086 084E MOV.W R14, R8
\ 000088 094F MOV.W R15, R9
140 modctl = 0;
\ 00008A 4743 MOV.B #0x0, R7
141 for (i = 0; i < 8; i++)
\ 00008C 0443 MOV.W #0x0, R4
\ ??xSerialPortInitMinimal_0:
\ 00008E 3492 CMP.W #0x8, R4
\ 000090 102C JC ??xSerialPortInitMinimal_1
142 {
143 modctl >>= 1;
\ 000092 12C3 CLRC
\ 000094 4710 RRC.B R7
144 err += HOST_REMAINDER;
\ 000096 3850B0E5 ADD.W #0xe5b0, R8
\ 00009A 0963 ADDC.W #0x0, R9
145 if (err >= ulWantedBaud)
\ 00009C 099B CMP.W R11, R9
\ 00009E 0728 JNC ??xSerialPortInitMinimal_2
\ 0000A0 0220 JNE ??xSerialPortInitMinimal_3
\ 0000A2 089A CMP.W R10, R8
\ 0000A4 0428 JNC ??xSerialPortInitMinimal_2
146 {
147 modctl |= 0x80;
\ ??xSerialPortInitMinimal_3:
\ 0000A6 77D08000 BIS.B #0x80, R7
148 err -= ulWantedBaud;
\ 0000AA 088A SUB.W R10, R8
\ 0000AC 097B SUBC.W R11, R9
149 }
150 }
\ ??xSerialPortInitMinimal_2:
\ 0000AE 1453 ADD.W #0x1, R4
\ 0000B0 EE3F JMP ??xSerialPortInitMinimal_0
151 /* Set. */
152 // UCTL1 &= ~SWRST;
153
154 U1MCTL = modctl;
\ ??xSerialPortInitMinimal_1:
\ 0000B2 C2477B00 MOV.B R7, &0x7b
155 U1CTL_bit.SWRST = 0;
\ 0000B6 D2C37800 BIC.B #0x1, &0x78
156
157 U1RCTL_bit.RXERR = 0;
\ 0000BA D2C37A00 BIC.B #0x1, &0x7a
158 U1RCTL_bit.RXWAKE = 0;
\ 0000BE E2C37A00 BIC.B #0x2, &0x7a
159 U1RCTL_bit.URXWIE = 0;
\ 0000C2 E2C27A00 BIC.B #0x4, &0x7a
160 U1RCTL_bit.URXEIE= 0;
\ 0000C6 F2C27A00 BIC.B #0x8, &0x7a
161 U1RCTL_bit.BRK = 0;
\ 0000CA F2C010007A00 BIC.B #0x10, &0x7a
162 U1RCTL_bit.OE = 0;
\ 0000D0 F2C020007A00 BIC.B #0x20, &0x7a
163 U1RCTL_bit.PE = 0;
\ 0000D6 F2C040007A00 BIC.B #0x40, &0x7a
164 U1RCTL_bit.FE = 0;
\ 0000DC F2C080007A00 BIC.B #0x80, &0x7a
165
166 /* Nothing in the buffer yet. */
167 sTHREEmpty = pdTRUE;
\ 0000E2 9243.... MOV.W #0x1, &sTHREEmpty
168
169 /* Enable ports. */
170 ME2 |= UTXE1 + URXE1;
\ 0000E6 F2D030000500 BIS.B #0x30, &0x5
171
172 /* Enable interrupts. */
173 IE2 |= URXIE1 + UTXIE1;
\ 0000EC F2D030000100 BIS.B #0x30, &0x1
174 }
175 portEXIT_CRITICAL();
\ 0000F2 8293.... CMP.W #0x0, &usCriticalNesting
\ 0000F6 0624 JEQ ??xSerialPortInitMinimal_4
\ 0000F8 B253.... ADD.W #0xffff, &usCriticalNesting
\ 0000FC 8293.... CMP.W #0x0, &usCriticalNesting
\ 000100 0120 JNE ??xSerialPortInitMinimal_4
\ 000102 32D2 EINT
176
177 /* Unlike other ports, this serial code does not allow for more than one
178 com port. We therefore don't return a pointer to a port structure and can
179 instead just return NULL. */
180 return NULL;
\ ??xSerialPortInitMinimal_4:
\ 000104 0C43 MOV.W #0x0, R12
\ 000106 2152 ADD.W #0x4, SP
\ 000108 3040.... BR #?Epilogue7
181 }
182 /*-----------------------------------------------------------*/
183
\ In segment CODE, align 2
184 signed portBASE_TYPE xSerialGetChar( xComPortHandle pxPort, signed portCHAR *pcRxedChar, portTickType xBlockTime )
^
Remark[Pe826]: parameter "pxPort" was never referenced
\ xSerialGetChar:
185 {
\ 000000 0A12 PUSH.W R10
\ 000002 0B12 PUSH.W R11
\ 000004 0812 PUSH.W R8
\ 000006 0A4C MOV.W R12, R10
\ 000008 0B4E MOV.W R14, R11
\ 00000A 18410800 MOV.W 0x8(SP), R8
186 /* Get the next character from the buffer. Return false if no characters
187 are available, or arrive before xBlockTime expires. */
188 if( xQueueReceive( xRxedChars, pcRxedChar, xBlockTime ) )
\ 00000E 0812 PUSH.W R8
\ 000010 0E4B MOV.W R11, R14
\ 000012 1C42.... MOV.W &xRxedChars, R12
\ 000016 B012.... CALL #xQueueReceive
\ 00001A 2153 ADD.W #0x2, SP
\ 00001C 0C93 CMP.W #0x0, R12
\ 00001E 0224 JEQ ??xSerialGetChar_0
189 {
190 return pdTRUE;
\ 000020 1C43 MOV.W #0x1, R12
\ 000022 013C JMP ??xSerialGetChar_1
191 }
192 else
193 {
194 return pdFALSE;
\ ??xSerialGetChar_0:
\ 000024 0C43 MOV.W #0x0, R12
\ ??xSerialGetChar_1:
\ 000026 3040.... BR #?Epilogue3
195 }
196 }
197 /*-----------------------------------------------------------*/
198
\ In segment CODE, align 2
199 signed portBASE_TYPE xSerialPutChar( xComPortHandle pxPort, signed portCHAR cOutChar, portTickType xBlockTime )
^
Remark[Pe826]: parameter "pxPort" was never referenced
\ xSerialPutChar:
200 {
\ 000000 0A12 PUSH.W R10
\ 000002 0B12 PUSH.W R11
\ 000004 0812 PUSH.W R8
\ 000006 4E12 PUSH.B R14
\ 000008 0A4C MOV.W R12, R10
\ 00000A 1B410A00 MOV.W 0xa(SP), R11
201 signed portBASE_TYPE xReturn;
202
203 /* Transmit a character. */
204
205 portENTER_CRITICAL();
\ 00000E 32C2 DINT
\ 000010 0343 NOP
\ 000012 9253.... ADD.W #0x1, &usCriticalNesting
206 {
207 if( sTHREEmpty == pdTRUE )
\ 000016 9293.... CMP.W #0x1, &sTHREEmpty
\ 00001A 0620 JNE ??xSerialPutChar_0
208 {
209 /* If sTHREEmpty is true then the UART Tx ISR has indicated that
210 there are no characters queued to be transmitted - so we can
211 write the character directly to the shift Tx register. */
212 sTHREEmpty = pdFALSE;
\ 00001C 8243.... MOV.W #0x0, &sTHREEmpty
213 U1TXBUF = cOutChar;
\ 000020 E2417F00 MOV.B 0x0(SP), &0x7f
214 xReturn = pdPASS;
\ 000024 1843 MOV.W #0x1, R8
\ 000026 1B3C JMP ??xSerialPutChar_1
215 }
216 else
217 {
218 /* sTHREEmpty is false, so there are still characters waiting to be
219 transmitted. We have to queue this character so it gets
220 transmitted in turn. */
221
222 /* Return false if after the block time there is no room on the Tx
223 queue. It is ok to block inside a critical section as each task
224 maintains it's own critical section status. */
225 xReturn = xQueueSend( xCharsForTx, &cOutChar, xBlockTime );
\ ??xSerialPutChar_0:
\ 000028 0B12 PUSH.W R11
\ 00002A 0E41 MOV.W SP, R14
\ 00002C 2E53 ADD.W #0x2, R14
\ 00002E 1C42.... MOV.W &xCharsForTx, R12
\ 000032 B012.... CALL #xQueueSend
\ 000036 084C MOV.W R12, R8
226
227 /* Depending on queue sizing and task prioritisation: While we
228 were blocked waiting to post on the queue interrupts were not
229 disabled. It is possible that the serial ISR has emptied the
230 Tx queue, in which case we need to start the Tx off again
231 writing directly to the Tx register. */
232 if( ( sTHREEmpty == pdTRUE ) && ( xReturn == pdPASS ) )
\ 000038 2153 ADD.W #0x2, SP
\ 00003A 9293.... CMP.W #0x1, &sTHREEmpty
\ 00003E 0F20 JNE ??xSerialPutChar_1
\ 000040 1893 CMP.W #0x1, R8
\ 000042 0D20 JNE ??xSerialPutChar_1
233 {
234 /* Get back the character we just posted. */
235 xQueueReceive( xCharsForTx, &cOutChar, serNO_BLOCK );
\ 000044 0312 PUSH.W #0x0
\ 000046 0E41 MOV.W SP, R14
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