📄 ads8343_crc7_pwm_proto_2_h.c
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/*
IMPLEMENTATIONS:
*Acquires from the ADS8343 and transmits to PC through UART1 115200 bps
*Packs the samples in 256 bytes with the DMA0 tied to UART1
*Main system clock is 8MHz crystal.
*Reception and collection of commands with help of the DMA1 tied to "URXIFG1".
*/
#include <msp430x16x.h>
#include "H_ADS8343_CRC7_PWM_Proto_2_H.h"
//=================================================================================================
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog
// WDTCTL = WDT_ARST_1000; // (WDTPW+WDTCNTCL+WDTSSEL) 1000ms
// WDTCTL = WDT_ARST_250; // (WDTPW+WDTCNTCL+WDTSSEL+WDTIS0) 250ms
// WDTCTL = WDT_ARST_16; // (WDTPW+WDTCNTCL+WDTSSEL+WDTIS1) 16ms
// WDTCTL = WDT_ARST_1_9; // (WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0) 1.9ms
int k = 0;
//------- INIT VARIABLES
orden = 1;
comando = Running = 1;
Rampa = 0;
result = TimerA_IntFlag = SampleNumber = NrResetCommands = WatchdogCounter = 0;
result = 32767-1500;
channel = CURRENT_CHANNEL;
BT_PairingResetCounter = KeepPairing = 0;
BT_KeepPairingCounter = StartBTPairingCounter = 0;
for(k=0 ; k<COMMAND_PACKET_LENGHT ; k++)
{ commands[k] = 0; }//End of for
//------- CONFIGURATIONS
config_MainCLK(); // Sets uC main system clock.
init_vectors(); // Init vectors to control ADC & MUXs
IO_control_lines(); // Prepare all the Port-lines
//set_USART0_UART();
set_USART0_SPI();
set_USART1_UART();
config_DMA();
config_Timer_A(); // Configs Timer A.
config_Timer_B(); // Configs Timer B.
//----- Enable Global Interrupts-----------------------------------------
_EINT();
//--------Prepare Analog MUXs -------
Signal_State = ExG_DATA;
// MUXs_Port4();
//--- If the watchdog resets => then the por twill be toggled
P4OUT ^= 0x40 ; // 0100 0000
//P4OUT &= 0xBF; // 1011 1111
//--- MAIN LOOP ---
while(1)
{
if(TimerA_IntFlag > 1)
{ TimerA_IntFlag=0;
//--- Startup BlueTooth Pairing Reset
if(BT_PairingResetCounter != 1110)
{ BT_StartResetBT();
}
//----
//WatchdogCounter++;
process_comand();
//===BT keep pairing control===============
if(StartBTPairingCounter == 1)
{//1st bean of this session
BT_KeepPairingCounter = 0; //Reset counter.
StartBTPairingCounter = 2; //Enable counter.
KeepPairing = 0;
}
else if(StartBTPairingCounter == 2)
{
BT_KeepPairingCounter = BT_KeepPairingCounter + 1;
if(BT_KeepPairingCounter > 4000) // START RESET & REPAIRING (a)4000
{ //Next when bigger than 3000
if(BT_KeepPairingCounter < 7500) // STOP RESET (a)7500
{ //Reset the BT module and reset pairing.
P1OUT = 0x00 ; // 0000 0000
P5OUT = 0x00 ; // 0000 0000
}
//Next when bigger than 4500
else if(BT_KeepPairingCounter < 9500) // RELEASE REPAIRING (a)9500
{ //release the reset
P1OUT = 0xFF ; // 1111 1111
}
//Next when bigger than 5500
else if(BT_KeepPairingCounter < 10500) // (a)10500
{ //re-enable pairing.
P5OUT = 0xFF ; // 0000 0000
StartBTPairingCounter = 0;
BT_KeepPairingCounter = 0;
KeepPairing = 0;
}
}
else if(KeepPairing == 1)
{
BT_KeepPairingCounter = 0;
KeepPairing = 0;
}
}
//==========================================
/*
// Clear WATCHDOG counter or RESET the processor
if(WatchdogCounter >= WATCHDOG_TICKS)
{
WatchdogCounter = 0;
//If "RESET" commands are received => Clear the counter without clearing WATCHDOG counter
if(NrResetCommands >= 0)
{ NrResetCommands = 0;
}
else //Normally "RESET" command is not received => WATCHDOG counter is cleared
{ WDTCTL = WDT_ARST_16; // (WDTPW+WDTCNTCL+WDTSSEL+WDTIS1) 16ms
//WDTCTL = WDT_ARST_250; // (WDTPW+WDTCNTCL+WDTSSEL+WDTIS0) 250ms
//WDTCTL = WDT_ARST_1000; // (WDTPW+WDTCNTCL+WDTSSEL) 1000ms
//NrResetCommands = 0;
}
}
*/
if(Running)
{
adc_convert(CURRENT_CHANNEL);
delay_time(20);
make_PACKET();
SampleNumber++;
// Enable DMA0 for transmitting a block of data
if(SampleNumber >= Nr_Samples)
{
DMA0CTL |= DMAEN; // Enable
SampleNumber = 0;
}
}
}// End of " if(TimerA_IntFlag > 0) "
}// End of " while(1) "
}// End of " main() "
//=======================================================================
//=======================================================================
//=========================INTERRUPTS ==================================
//=======================================================================
//=======================================================================
//====================== TIMER A Interrupt===============================
// Timer A0 interrupt service routine
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
TimerA_IntFlag++;
P4OUT ^= 0x40 ; // 0100 0000
}
//=======================================================================
//=======================================================================
//========================== APPLICATIONS =============================
//=======================================================================
//=======================================================================
//================== process_comand ( void) =============================
void process_comand(void)
{
unsigned char temp_orden, confirmation;
int L = 0;
if(commands[COMMAND_PACKET_LENGHT-1]!=0) // DETECT IF THERE IS A NEW COMMAND
{ temp_orden = commands[0];
confirmation = commands[1];
switch(temp_orden)
{
//------------
case BTpairing:
{ if(confirmation==BTpairing)
{ if(StartBTPairingCounter == 0) //1st keep pairing command of this session
{ //With this, the BT_KeepPairingCounter starts counting time before another bean.
StartBTPairingCounter = 1;
}
else
{ KeepPairing = 1;
}
}
Rampa = 0;
//orden = 1;
break;
}
//------------
case EEG:
{ if(confirmation==EEG)
{ Signal_State = ExG_DATA;
MUXs_Port4();
Rampa = 0;
orden = 1;
// P4OUT |= 0x40 ; // 0100 0000
// P4OUT ^= 0x40 ; // 0100 0000
}
break;
}
case Zpos:
{ if(confirmation==Zpos)
{ Signal_State = ExG_Zpos;
MUXs_Port4();
Rampa = 0;
orden = 2;
// P4OUT |= 0x40 ; // 0100 0000
}
break;
}
case Zneg:
{ if(confirmation==Zneg)
{ Signal_State = ExG_Zneg;
MUXs_Port4();
Rampa = 0;
orden = 3;
//P4OUT &= 0xBF; // 1011 1111
}
break;
}
case Z_DRL:
{ if(confirmation==Z_DRL)
{ Signal_State = ExG_DRL;
MUXs_Port4();
Rampa = 0;
orden = 4;
//P4OUT &= 0xBF; // 1011 1111
}
break;
}
case BATTERY:
{ if(confirmation==BATTERY)
{ comando = BATTERY; //
Rampa = 1;
orden = 1;
}
break;
}
case RESET:
{ if(confirmation==RESET)
{ //comando = RESET;
//NrResetCommands ++;
Signal_State = ExG_DATA;
MUXs_Port4();
Rampa = 0;
orden = 1;
}
break;
}
case START:
{ if(confirmation==START)
{ Running = 1; //
orden = 1;
}
break;
}
case STOP:
{ if(confirmation==STOP)
{ Running = 0; //
orden = 1;
}
break;
}
case SET_GAIN:
{ //if(confirmation==SET_GAIN)
//{
orden = 1;
//}
//set_gain(confirmation);
break;
}
default:
//orden = 1;
break;
}//End of switch
//CLEAR THE COMMANDS VECTOR
for(L=0 ; L<COMMAND_PACKET_LENGHT ; L++)
{ commands[L] = 0; }
DMA1CTL |= DMAEN; //ENABLE DMA1 DATA COLLECTION
}//End of " if(commands[COMMAND_PACKET_LENGHT-1]!=0) "
}
//================== set_gain(unsigned char gain_level)==================
void set_gain(unsigned char gain_level)
{
unsigned int TEMPO1 = 0;
TEMPO1 = MuxByte[Signal_State]; //CONTROL BYTE SEARCH
TEMPO1 &= 0xF9; // SET TEMPO1 BITs 1 y 2 TO 0 BEFORE "OR"
TEMPO1 |= 0x01; // SET TEMPO1 BIT 0 TO 1 BEFORE "&"
P4OUT &= TEMPO1; // SET THE ZEROS
switch(gain_level)
{
case GAIN_LEVEL_1:
{ TEMPO1 |= GAIN_CODE_1;
break;
}
case GAIN_LEVEL_2:
{ TEMPO1 |= GAIN_CODE_2;
break;
}
case GAIN_LEVEL_3:
{ TEMPO1 |= GAIN_CODE_3;
break;
}
case GAIN_LEVEL_4:
{ TEMPO1 |= GAIN_CODE_4;
break;
}
default:
break;
}//End of switch
P4OUT |= TEMPO1; // SET THE ONES.
}
//================== delay_time (int cycles) ============================
void delay_time(int cycles)
{ int i,j;
i=j=0;
for (i = cycles ; i > 0 ; i--)
{ for (j = 5; j > 0; j--);
}
}
//==================== adc_convert (int chann) ============================
// Description : This prototype does the adc conversion
void adc_convert(int chann)
{
byte0=byte1=byte2=byte3=byte4=0;
P3OUT &= ADC_CS_0; //Put P3.0 = 0 (1111 1110)=0xFE. Select ADC, switching CS to 0.
U0TXBUF = ADC_control[chann];//Send 1st 8 clocks along with the ADC control byte.
U0TXBUF = 0x00; // Send clocks to the ADC, to shift 1st 7 BITs in.
//THE FOLLOWING DATA RECEPTION IS NOT USEFUL
RX_complete(); // Wait until all bits have been received.
byte0 = U0RXBUF; // Store this data in this byte variable.
//Send 3rd 8 clocks
U0TXBUF = 0x00; // Send clocks to the ADC, to shitf 2nd 8 BITs in.
//THE FOLLOWING RECEPTION IS THE 1ST DATA BYTE
RX_complete(); // Wait until all 8 bits have been received.
byte1 = U0RXBUF; // Store this data in this byte variable.
//Send 4th 8 clocks
U0TXBUF = 0x00; // Send clocks to the ADC.
//THE FOLLOWING RECEPTION IS THE 2ND DATA BYTE
RX_complete(); // Wait 8 clock cycles.
byte2 = U0RXBUF;
//THE FOLLOWING RECEPTION IS THE 3RD DATA BYTE
RX_complete(); // Wait 8 clock cycles.
byte3 = U0RXBUF;
//De-Select ADC, switching CS to 1:
P3OUT |= ADC_CS_1; // Put P3.0 = 1 (0000 0001)=0x01
byte1 = byte1 << 9; // Left-shift the 1st 7 bits
byte2 = byte2 << 1;
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