📄 mpc.init
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######################################################################### File: mpc.init## use : powerpc-linux-gdb -x mpc.init## gdb setup and processor initialization for TQM860LDB0A3.100## Last Date: 2001/06/05# First Date: 1999/12/10# Author: FP# Copyright (c) 1999,2000,2001 VAS GmbH#########################################################################Macro for delaydefine delay set $cycle=500 while $cycle !=0 set $cycle=$cycle - 1 endend############################################################### processor memory configuration for TQM860LDB0A3.100##############################################################define TQMMem############################################################### setting up UPMA for SDRAM: 50MHz Processor Clock# using 2 + 1 + 1 + 1 + 2 = 7 Clock Timing Burst accesses############################################################### single read: offset 0x00 mpcbdm spr MDR = 0x1F0DFC04 mpcbdm spr MCR = 0x00002100 mpcbdm spr MDR = 0xEEAFBC04 mpcbdm spr MCR = 0x00002101 mpcbdm spr MDR = 0x11AF7C04 mpcbdm spr MCR = 0x00002102 mpcbdm spr MDR = 0xEFBAFC00 mpcbdm spr MCR = 0x00002103 mpcbdm spr MDR = 0x1FF5FC47 mpcbdm spr MCR = 0x00002104# init: offset 0x05 mpcbdm spr MDR = 0x1FF5FC34 mpcbdm spr MCR = 0x00002105 mpcbdm spr MDR = 0xEFEABC34 mpcbdm spr MCR = 0x00002106 mpcbdm spr MDR = 0x1FB57C35 mpcbdm spr MCR = 0x00002107# burst read: offset 0x08 mpcbdm spr MDR = 0x1F0DFC04 mpcbdm spr MCR = 0x00002108 mpcbdm spr MDR = 0xEEAFBC04 mpcbdm spr MCR = 0x00002109 mpcbdm spr MDR = 0x10AF7C04 mpcbdm spr MCR = 0x0000210A mpcbdm spr MDR = 0xF0AFFC00 mpcbdm spr MCR = 0x0000210B mpcbdm spr MDR = 0xF0AFFC00 mpcbdm spr MCR = 0x0000210C mpcbdm spr MDR = 0xF1AFFC00 mpcbdm spr MCR = 0x0000210D mpcbdm spr MDR = 0xEFBAFC00 mpcbdm spr MCR = 0x0000210E mpcbdm spr MDR = 0x1FF5FC47 mpcbdm spr MCR = 0x0000210F# single write: offset 0x18 mpcbdm spr MDR = 0x1F2DFC04 mpcbdm spr MCR = 0x00002118 mpcbdm spr MDR = 0xEEABBC00 mpcbdm spr MCR = 0x00002119 mpcbdm spr MDR = 0x01B27C04 mpcbdm spr MCR = 0x0000211A mpcbdm spr MDR = 0x1FF5FC47 mpcbdm spr MCR = 0x0000211B# burst write: offset 0x20 mpcbdm spr MDR = 0x1F0DFC04 mpcbdm spr MCR = 0x00002120 mpcbdm spr MDR = 0xEEABBC00 mpcbdm spr MCR = 0x00002121 mpcbdm spr MDR = 0x10A77C00 mpcbdm spr MCR = 0x00002122 mpcbdm spr MDR = 0xF0AFFC00 mpcbdm spr MCR = 0x00002123 mpcbdm spr MDR = 0xF0AFFC00 mpcbdm spr MCR = 0x00002124 mpcbdm spr MDR = 0xE1BAFC04 mpcbdm spr MCR = 0x00002125 mpcbdm spr MDR = 0x1FF5FC47 mpcbdm spr MCR = 0x00002126# refresh: offset 0x30 mpcbdm spr MDR = 0x1FFD7C84 mpcbdm spr MCR = 0x00002130 mpcbdm spr MDR = 0xFFFFFC04 mpcbdm spr MCR = 0x00002131 mpcbdm spr MDR = 0xFFFFFC04 mpcbdm spr MCR = 0x00002132 mpcbdm spr MDR = 0xFFFFFC04 mpcbdm spr MCR = 0x00002133 mpcbdm spr MDR = 0xFFFFFC84 mpcbdm spr MCR = 0x00002134 mpcbdm spr MDR = 0xFFFFFC07 mpcbdm spr MCR = 0x00002135# exception: offset 0x3c mpcbdm spr MDR = 0x7FFFFC07 mpcbdm spr MCR = 0x0000213C######################################## setting up memory######################################## Initialisation FLASH : 2 x 4 MByte FLASH AMD mpcbdm spr BR0 = 0x40000001 mpcbdm spr OR0 = 0xffc00f52 #0xE0000F52 mpcbdm spr OR1 = 0xffc00f52 #0xE0000F52 mpcbdm spr BR1 = 0x40400001 #0x060000001 mpcbdm spr MSTAT = 0x00000800 # set refresh timing MPTPR mpcbdm spr MAMR = 0xC3802114# Initialisation SDRAM: 16 MByte 100MHz#mpcbdm spr OR2 = 0xff000b00 #0xE0000B00 # cache: 0xE0000A00 mpcbdm spr OR2 = 0xff000a00 mpcbdm spr BR2 = 0x00000081 mpcbdm spr MAR = 0x00000088 # Pattern for SDRAM setup mpcbdm spr MCR = 0x80004105 # precharge and setup bank 0 CS2 mpcbdm spr MCR = 0x80004830 # run UPMA CS2 eight initial refreshsend##############################################################define InitPCMCIA############################################################### Init TQM Board PCMCIA###############################################################TQM Starter Kit Board (STK) uses slot B#kernel assumes three windows, for attribute, io 16 bit and io 8 bit space# size 64MBytes each mp spr pbr0 = 0xe0000000 # effective address of window 0: attr, 64MB, 8bit mp spr por0 = 0xb8024455 # (BSIZE=0x17|PSHT=0x2|PSST=0x4|PSL=0x8|PPS|PRS=0x2|PSLOT|PV) mp spr pbr1 = 0xe4000000 # effective address of window 1: io 1K 16bit mp spr por1 = 0x7802445d # (BSIZE=0xf|PSHT=0x2|PSST=0x4|PSL=0x8|PPS|PRS=0x3|PSLOT|PV) mp spr pbr2 = 0xe8000000 # effective address of window 2: io 1K 8bit mp spr por2 = 0x7802441d # (BSIZE=0xf|PSHT=0x2|PSST=0x4|PSL=0x8|PRS=0x3|PSLOT|PV) mp spr por3 = 0 #invalid mp spr por4 = 0 #invalid mp spr por5 = 0 #invalid mp spr por6 = 0 #invalid mp spr por7 = 0 #invalid mp spr pgcra = 0x0 mp spr pgcrb = 0x0 mp spr pcdir = 0x00060000 # dir | par : PC13 + 14 as output#mp spr pcso = 0x00000002 # so | dat : PC14 enable 3V mp spr pcso = 0x00000004 # so | dat : PC14 enable 5Vend##############################################################define SetupProc############################################################### Setup processor############################################################## mp spr MSR = 0x00001002 # ME | RI mp spr SRR1 = 0x00001002 # ME | RI mp spr IMMR = 0xfff00000 # set internal memory map mp spr SIUMCR = 0x01012440 # mp spr SYPCR = 0xffffff88 # disable software watchdog mp spr SCCR = 0x02000000 # TBS, Timebase Source is GLCK2/16 mp spr PLPRCR = 0x00000000 # mp spr ICTRL = 0x00000007 # disable show cycle and hw breakpoints mp spr DER = 0x7002400f # mp spr IC_CST = 0x04000000 # disable instruction cache mp spr DC_CST = 0x04000000 # disable data cache mp spr IC_CST = 0x0a000000 # unlock all instruction cache lines mp spr DC_CST = 0x0a000000 # unlock all data cache lines mp spr IC_CST = 0x0c000000 # invalidate instruction cache lines mp spr DC_CST = 0x0c000000 # invalidate data cache lines mp spr DEC = 0x7fffffff # set decrimenter max value (bit 0: 0->1 causes exception) mp spr TBSCR = 0x00030000 # enable timebase and decrimenter, stop at FRZend##############################################################define SetupBoardInfo############################################################### Setup bd_info, needed to start kernel, board specific, TQM:############################################################## set $BDINFO=0x3400# DRAM start set {long} ($BDINFO+0x0) = 0x00000000# DRAM size, 16MB set {long} ($BDINFO+0x4) = 0x01000000# FLASH start set {long} ($BDINFO+0x8) = 0x40000000# FLASH size set {long} ($BDINFO+0xc) = 0x00800000# FLASH monitor reserve set {long} ($BDINFO+0x10) = 0x00020000# SRAM start set {long} ($BDINFO+0x14) = 0x00000000# SRAM size set {long} ($BDINFO+0x18) = 0x00000000# IMMR base set {long} ($BDINFO+0x1c) = 0xfff00000# boot flag set {long} ($BDINFO+0x20) = 0x00000000# IP Addr: 192.168.1.127 set {long} ($BDINFO+0x24) = 0xc0a8017f# MAC: 6 bytes# !IMPORTANT! choose with care: has to be a unique MAC-Addr!# and please don't use mine! set {long} ($BDINFO+0x28) = 0x00d09300 set {long} ($BDINFO+0x2c) = 0x02b7ffff# intern. freq. in MHz set {long} ($BDINFO+0x30) = 50# bus freq. in MHz set {long} ($BDINFO+0x34) = 50# console baud rate set {long} ($BDINFO+0x38) = 115200# monitor I/O set {long} ($BDINFO+0x3c) = 0x00fe17c# monitor interrupts set {long} ($BDINFO+0x40) = 0# tell kernel where bd_info resides set $r3=0x3400end##############################################################define ClearVec############################################################### ClearVec set illegal codes to exception vectors############################################################## set $vec = 0 while $vec < 0x2000 set {int} $vec = 0 set $vec = $vec + 0x100 end mp spr der = 0x7002400fend##############################################################define DoInit############################################################### setup processor, TQM Board, bdinfo, load kernel, and start it############################################################## SetupProc TQMMem# set a pseudo stack for gdb-5.0 strange trampoline testing set {long}0x200300=0x0 set {long}0x200304=0x0 set {long}0x200308=0x0 mp spr lr = 0x200304 ClearVec InitPCMCIA SetupBoardInfo set $r11=$BDINFO load /Data2/Projekte/DNC/CrossGCC/Kernels/zvmlinux2 0x400000# include first and second stage loader symbols symbol-file /Data2/Projekte/DNC/CrossGCC/Kernels/zvmlinux2# load doesn't parse symbols, so set $LOADOFFSET manualy set $LOADOFFSET=0x400000# calcucate actual zvmlinux position in ram set $LOADADDR = (char*) &start + $LOADOFFSET# patch loader: jump over r11 = local_bdinfo assignment set {long}$LOADADDR=0x4800000d# set NIP, to loader offset set $pc=$LOADADDR# patch a new root_string for default cmd_line set {char[0x100]}0x200200="root=/dev/nfs rw nfsroot=192.168.0.22:/Data2/LinuxPPC ip=192.168.1.127:192.168.0.22:192.168.1.1:255.255.255.0:mpc860.nc1701.de" set $CMDLINE= (char*) &root_string + $LOADOFFSET set {long}$CMDLINE=0x200200# add linux kernel symbols set confirm off add-symbol-file /Data2/LinuxPPC1/usr/src/linux-2.4.4/vmlinux 0xc0000000 set confirm on# disable trap for bash/math execution without breaking into debugger mp spr der = 0x7000000fend##############################################################define DoInitRD############################################################### setup processor, TQM Board, bdinfo, load kernel, and start it############################################################## SetupProc TQMMem# set a pseudo stack for gdb-5.0 strange trampoline testing set {long}0x200300=0x0 set {long}0x200304=0x0 set {long}0x200308=0x0 mp spr lr = 0x200304 ClearVec InitPCMCIA SetupBoardInfo set $r11=$BDINFO load /Data2/Projekte/DNC/CrossGCC/Kernels/zvmlinux2.initrd 0x400000# include first and second stage loader symbols symbol-file /Data2/Projekte/DNC/CrossGCC/Kernels/zvmlinux2.initrd# load doesn't parse symbols, so set $LOADOFFSET manualy set $LOADOFFSET=0x400000# calcucate actual zvmlinux position in ram set $LOADADDR = (char*) &start + $LOADOFFSET# patch loader: jump over r11 = local_bdinfo assignment set {long}$LOADADDR=0x4800000d# set NIP, to loader offset, so we can do a 'c' for kernel start set $pc=$LOADADDR# patch a new root_string for default cmd_line set {char[0x100]}0x200200="root=/dev/ram ip=192.168.1.127:192.168.0.22:192.168.1.1:255.255.255.0:mpc860.nc1701.de" set $CMDLINE= (char*) &root_string + $LOADOFFSET set {long}$CMDLINE=0x200200# add linux kernel symbols set confirm off add-symbol-file /Data2/LinuxPPC1/usr/src/linux-2.4.4/vmlinux 0xc0000000 set confirm on# disable trap for bash/math execution without breaking into debugger mp spr der = 0x7000000f end##############################################################define Init############################################################### Init TQM Board############################################################### disable buggy automatic adapter detection set mpcbdm_adapter 2# reset mpc over bdm and enable debug mode target mpcbdm 0# disable software watchdog mpcbdm spr SYPCR = 0xffffff88# disable show cycle and hw breakpoints mpcbdm spr ICTRL = 0x00000007# set debug enable register for most gdb support mp spr der = 0x7002400fend#############################################################################################################################startup settings , this code is executed at start up##############################################################Initdefine kl############################################################### load kernel: deprecated, use doinit or doinirrd instead!############################################################## sym /Data2/LinuxPPC/usr/src/linux/vmlinux echo Loaded symbols\n load /Data2/Projekte/DNC/CrossGCC/Kernels/zvmlinux2 0x400000 mp spr der = 0x7000000f echo Loaded kernel to 0x500000\nend############################################################### Macro for loading object files with symbolsdefine ldload $arg0 0x0symbol-file $arg0set $pc=_startend# Macro for pretty printing gprsdefine rdprintf "[1mr00[0m=%08x [1mr01[0m=%08x [1mr02[0m=%08x [1mr03[0m=%08x [1mr04[0m=%08x\n", $r0, $r1, $r2, $r3, $r4printf "[1mr05[0m=%08x [1mr06[0m=%08x [1mr07[0m=%08x [1mr08[0m=%08x [1mr09[0m=%08x\n", $r5, $r6, $r7, $r8, $r9printf "[1mr10[0m=%08x [1mr11[0m=%08x [1mr12[0m=%08x [1mr13[0m=%08x [1mr14[0m=%08x\n", $r10, $r11, $r12, $r13, $r14printf "[1mr15[0m=%08x [1mr16[0m=%08x [1mr17[0m=%08x [1mr18[0m=%08x [1mr19[0m=%08x\n", $r15, $r16, $r17, $r18, $r19printf "[1mr20[0m=%08x [1mr21[0m=%08x [1mr22[0m=%08x [1mr23[0m=%08x [1mr24[0m=%08x\n", $r20, $r21, $r22, $r23, $r24printf "[1mr25[0m=%08x [1mr26[0m=%08x [1mr27[0m=%08x [1mr28[0m=%08x [1mr29[0m=%08x\n", $r25, $r26, $r27, $r28, $r29printf "[1mr30[0m=%08x [1mr31[0m=%08x\n", $r30, $r31end# Macro called after processor stoppeddefine hook-stoprdmpcbdm spr CRmpcbdm spr ICRx/i $pcend# Macro for memory dumpdefine mdx/128xh $arg0end
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