tblacpis.equ

dos下的ＵＳＢ源码（包括UHCI

	page	,132
	title	ACPI South Bridge equates
;*****************************************************************;
;*****************************************************************;
;**								**;
;**     (C)Copyright 1985-2000, American Megatrends Inc.        **;
;**								**;
;**			All Rights Reserved.			**;
;**								**;
;**		6145-F, Northbelt Parkway, Norcross,		**;
;**								**;
;**		Georgia - 30071, USA. Phone-(770)-246-8600.	**;
;**								**;
;*****************************************************************;
;*****************************************************************;
;*****************************************************************;
; $Header: /BIOS/Projects/800/AMD/Rhapsody/CSP/EM/ACPI/TBLACPIS.EQU 2     3/06/03 9:19p Krishnab $Revision: 
;
; $Date: 3/06/03 9:19p $Log:
;*****************************************************************;
;Inclusion guard
ifndef _acpi_css_equ_
_acpi_css_equ_	equ	1
;*****************************************************************;
; South Bridge Chipset specific ACPI Equates -- required for chipset porting
; NOTE: Use TBLACPIS.equ for any SouthBridge specific equates 
;	Use TBLACPIN.equ for any Northbridge specific equates
; Very important ... these MUST BE SETUP PROPERLY for OS to load
;*****************************************************************;
; Define all the chipset-dependant equates to be used to build FACP table
;*****************************************************************;
; South Bridge Chipset specific ACPI Equates -- required for chipset porting
; Very important ... these MUST BE SETUP PROPERLY for OS to load  ;
;*****************************************************************;
equ_pm1a_evt_blk_addr	equ	MKF_PM_BASE_ADDRESS
equ_pm1b_evt_blk_addr	equ	0
equ_pm1a_cnt_blk_addr	equ	MKF_PM_BASE_ADDRESS + 04h
equ_pm1b_cnt_blk_addr	equ	0
equ_pm2_cnt_blk_addr	equ	0 ; Not available in AMD766 SB
equ_pm_tmr_blk_addr	equ	MKF_PM_BASE_ADDRESS + 08h 
equ_gpe0_blk_addr	equ	MKF_PM_BASE_ADDRESS + 20h
equ_gpe1_blk_addr	equ	MKF_PM_BASE_ADDRESS + 0B0h ; Not available in AMD766 SB
equ_pm1_evt_length	equ	4
equ_pm1_cnt_length	equ	2
equ_pm2_cnt_length	equ	0
equ_pm_tmr_length	equ	4
equ_gpe0_blk_length	equ	4
equ_gpe1_blk_length	equ	8
equ_gpe1_base		equ	10h
equ_sci_vector		equ	0009h	; IRQ 9
equ_smi_cmd_port	equ	MKF_SMIPORT ;502Fh	; For AMD chipset
;0ABCF006->>>
; KrishnaB removed these equates as they were incorrect. 03/06/03
;equ_day_alarm		equ	0Dh	; RTC Equates
;equ_month_alarm	equ	00h
;equ_century		equ	00h
; <<<

;0ABCF006+>>>
; KrishnaB added these equates with the correct values. 03/06/03
equ_day_alarm		equ	7Dh	; RTC Equates
equ_month_alarm		equ	7Eh
;kwu34281 equ_century		equ	7Fh
equ_century		equ	32h		;kwu34281

; <<<

equ_duty_offset		equ	1	; Bit Index for start of throttle enable value
equ_duty_width		equ	3	; Width (in bits) of throttle enable value
; No C2 & C3 states available if correspondent values exceed 100mcs and 1000mcs
;------------------------------------------------
; ACPI 2.0 extensions
;------------------------------------------------
; GENERIC ADDRESS STRUCTURE FIELDS:
; Field     	    !byte   length ! offset ! Description
;------------------------------------------------
;Address_Space_ID     1       0   Describes which address space the given register can be found.
;                                  Defined values are:
;                                 0 - System Memory
;                                 1 - System I/O
;                                 2 - PCI Configuration Space
;                                 3-255 - Reserved
;Register_Bit_Width   1       1   The size in bits of the given register.
;Register_Bit_Offset  1       2   The bit offset of the given register at the given address.
;Reserved             1       3   Must be 0.
;Address              8       4   The address of the register in the given address space
;                                 (relative to the processor).
;                                  0 - System Memory       The 64-bit physical memory address of the register.
;                                                          32-bit platforms must have the high DWORD set to 0.
;                                  1 - System I/O         The 64-bit I/O address of the register.
;                                                          32-bit platforms must have the high DWORD set to 0.
;                                  2 - PCI Configuration Space    PCI Configuration space addresses
;                                                                 must be confined to devices on PCI bus 0.
;                                                                 The format of addresses is as follows:
;                                                                 WORD location   Description
;                                                                 Highest WORD    Reserved. Must be 0.
;